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Implementing VHDL Code On Fpga

This document discusses implementing VHDL code on an FPGA. It explains that an FPGA allows for very high sampling frequencies that enable digital regulators to function similar to analog regulators. Experimental results show improved performance of a Direct Current Power Flow Control application using an FPGA. The document also provides background on FPGAs, noting they contain programmable logic blocks and reconfigurable interconnects that can be wired together like logic gates. FPGAs offer advantages over ASICs such as the ability to reprogram functionality after shipping.

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vishesh
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26 views

Implementing VHDL Code On Fpga

This document discusses implementing VHDL code on an FPGA. It explains that an FPGA allows for very high sampling frequencies that enable digital regulators to function similar to analog regulators. Experimental results show improved performance of a Direct Current Power Flow Control application using an FPGA. The document also provides background on FPGAs, noting they contain programmable logic blocks and reconfigurable interconnects that can be wired together like logic gates. FPGAs offer advantages over ASICs such as the ability to reprogram functionality after shipping.

Uploaded by

vishesh
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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IMPLEMENTING VHDL CODE ON FPGA

ABSTRACT
The principle of an automatic VHDL code generator dedicated to the control of the electric systems is
presented in this paper. From the definition of classic regulator, it is possible to envisage a direct integration
of the digital regulator in a FPGA component. The advantage of using a FPGA rather than a micro-controller
lies in the fact of reaching very high sampling frequencies, allowing to obtain better performances with
important bandwidths. It can be then considered that the digital regulator works in a quasi-analog mode.
Experimental results are obtained for a Direct Current Power Flow Control (DCPFC) application to prove
the better overall performance. A field-programmable gate array (FPGA) is an integrated circuit designed to
be configured by a customer or a designer after manufacturing hence "field-programmable". The FPGA
configuration is generally specified using a hardware description language (HDL), similar to that used for an
application-specific integrated circuit (ASIC) (circuit diagrams were previously used to specify the
configuration, as they were for ASICs, but this is increasingly rare).
Contemporary FPGAs have large resources of logic gates and RAM blocks to implement complex digital
computations. As FPGA designs employ very fast I/Os and bidirectional data buses it becomes a challenge to
verify correct timing of valid data within setup time and hold time. Floor planning enables resources
allocation within FPGA to meet these time constraints. FPGAs can be used to implement any logical
function that an ASIC could perform. The ability to update the functionality after shipping, partial reconfiguration of a portion of the design and the low non-recurring engineering costs relative to an ASIC
design (notwithstanding the generally higher unit cost), offer advantages for many applications.
FPGAs contain programmable logic components called "logic blocks", and a hierarchy of reconfigurable
interconnects that allow the blocks to be "wired together" somewhat like many (changeable) logic gates
that can be inter-wired in (many) different configurations. Logic blocks can be configured to perform
complex combinational functions, or merely simple logic gates like AND and XOR. In most FPGAs, the
logic blocks also include memory elements, which may be simple flip-flops or more complete blocks of
memory.
SOFTWARE USED:
Xilinx ISE
SUBMITTED BY:
VIDUSHI GUPTA (2311236)

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