Programmable Logic Arrays

The programmable logic array (PLA) is a specialized circuit and layout design for two-level logic.
A programmable logic array (PLA) is a kind of programmable logic device used to
implement combinational logic circuits. The PLA has a set of programmable AND gate planes,
which link to a set of programmable OR gate planes, which can then be conditionally
complemented to produce an output. This layout allows for many logic functions to be synthesized
in the sum of products canonical forms.

The architecture of a PLA as shown in Figure below is very simple: it uses two levels of logic, one
implementing the ANDs (called product terms) and another implementing the ORs. One of the best
features of the PLA is that it can compute several functions at once, which can share product terms.

The most common form of the CMOS PLA uses precharged gates for both AND and OR planes. Using a
non-complementary gate lets us use very regular layouts for the wires: input signals are evenly spaced in
one direction and output signals are also evenly spaced in the perpendicular direction. The figure below
shows a logic diagram for a doubly-precharged PLA circuit. Setting the precharge lines low enables the p-
type pullup to precharge the planes; bringing the precharge lines low enables the n-type evaluation
transistor. The circuits in the AND and OR planes are identical, except for programming transistors,
which determine the PLA’s personality. //figure Precharged gates for the AND and OR planes of a PLA.
If the PLA is nearly full, we can complement the functions to produce a nearly empty PLA. PLAs are also
good for implementing several functions that share many common product terms, since the AND-OR
structure makes it easy to send one product term to many different ORs. CPU microcode often has these
characteristics. PLA is used to implement the control over a data path. It defines various states in an
instruction set, and produces the next state (by conditional branching).

 Field-Programmable Gate Array (FPGA)

A field-programmable gate array (FPGA) is an integrated circuit designed to be configured by a
customer or a designer after manufacturing. A field-programmable gate array (FPGA) is a block of
programmable logic that can implement multi-level logic functions. FPGAs are most commonly used as
separate commodity chips that can be programmed to implement large functions. However, small
blocks of FPGA logic can be useful components on-chip to allow the user of the chip to customize part of
the chip’s logical function.

FPGA  is now used in the mainstream of modern IC verification. Circuit design is done in Hardware
Description Language, which is then synthesized to bit streams before burning into FPGA core. It
can be used to realize simple digital logic gates to complex mathematical equations. 

The most common FPGA architecture consists of an array of logic blocks , I/O pads, and routing
channels. Generally, all the routing channels have the same width (number of wires). Most of the
circuitry built inside of an FPGA is synchronous circuitry that requires a clock signal. FPGAs contain
dedicated global and regional routing networks for clock and reset so they can be delivered with
minimal skew. Logic blocks in FPGA architecture are arranged in two dimensional arrays. Hierarchy
of reconfigurable interconnects is then programmed to implement complex circuits. Desired logic
function is implemented using this logic block, which is then connected together using programmable
switch boxes. The Figure below shows, architecture of FPGA containing array of Logic blocks,
interconnects, Switch blocks and I/O blocks.

Complex designs are first divided into small functions. Logic blocks are used to implement these sub
functions and connections are made using programmable interconnects. The figure shows the
architecture of programmed FPGA. Required sub functions are implemented using each logic
blocks, which is then programmed and interconnected using switch boxes.
  Logic Block: Logic Blocks in the FPGA are used to implement sub functions. Any type of
logic function (both combinational and sequential) circuits, can be implemented using a
logic block. Therefore, logic blocks are commonly referred to as configurable logic blocks
(CLBs). A basic Logic block contains:-

 Lookup table (LUT): to implement the combinational logic functions.

 Register (D flip flop): to store the output from the Lookup Table.
 Multiplexer: to select the output from the LUT. 
A simple block diagram of a logic block consists of a lookup table, register and a multiplexer as
shown in the figure. SRAM is used to implement lookup table. Therefore, desired logic function can
be implemented by varying the data stored in the SRAM. Output from the lookup table is given as
inputs to both multiplexer and D flip flop. D flip flop is used to delay the output. And depending on the
application, the multiplexer selects LUT output or delayed output. Therefore, by using select input of
the multiplexer we can implement both combinational and sequential circuits using logic blocks.
Many such logic blocks are configured and finally interconnected using the switch box to build the
desired complex circuits.   

To define the behavior of the FPGA, the user provides a design in a hardware description
language (HDL) or as a schematic design. The HDL form is more suited to work with large structures
because it's possible to specify high-level functional behavior rather than drawing every piece by
hand. Using an electronic design automation tool, a technology-mapped netlist is generated. The
netlist can then be fit to the actual FPGA architecture using a process called place-and-route, usually
performed by the FPGA company's proprietary place-and-route software. The user will validate the
map, place and route results via timing analysis, simulation, and other verification and
validation methodologies.

The most common HDLs are VHDL and Verilog as well as extensions such as SystemVerilog. To

simplify the design of complex systems in FPGAs, there exist libraries of predefined complex
functions and circuits that have been tested and optimized to speed up the design process. These
predefined circuits are commonly called intellectual property (IP) cores.

  

Compared to other logic devices FPGA has very high logic density. Which means, a single FPGA
chip contains ten thousand to eight million gates. Therefore, more complex logic circuits can be
implemented using FPGA.  FPGA undergo concurrent processing which is faster and more efficient
than other pipeline architectures.

After manufacturing, customer configures desired circuit in to FPGA. The main advantage of FPGA
is its ability to reprogram. Therefore, it is mostly preferred during the design phase where continuous
changes in the requirements can occur.  Whereas, Custom ICs are expensive, not programmable
and takes long time to design. Disadvantages of FPGA are that, they are slow and they draw more
power. The configuration of FPGA is stored in the RAM (volatile), so once they lose power its
configuration is lost. Therefore in practical applications, configurations are externally stored in non-
volatile flash memories and from there data is automatically restored after retaining the power.
Programmable Logic Device
A programmable logic device (PLD) is an electronic component used to build reconfigurable digital
circuits. Unlike integrated circuits (IC) which consist of logic gates and have a fixed function, a PLD
has an undefined function at the time of manufacture.

PLDs are semiconductor devices that can be programmed to obtain required logic device. Because
of the advantage of re-programmability, they have replaced special purpose logic devices like Logic
gates, flip-flops, counters and multiplexers in many semicustom applications. It reduces design
time and thus reduces time for the product to reach the market.  It consists of arrays of AND and OR
gates, which can be programmed to realize required logic function. Before the PLD can be used in a
circuit it must be programmed (reconfigured) by using a specialized program

Device programmer blows fuses on the PLD to control each gate operation. Inexpensive software
tools are used for quick development, simulation and testing, therefore design cost is comparatively
low. Another important advantage is that customer can modify their design, based on changes in
requirement. 

The most commonly used Programmable Logic Devices are :-

 Programmable Array Logic (PAL)

 Programmable Read Only Memory

 Field-Programmable Gate Array (FPGA)

 Programmable Logic Arrays