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PRBS Generator Using VHDL Final

This document describes a PRBS (Pseudo Random Bit Sequence) generator using VHDL. A PRBS generator produces a random-looking binary sequence using linear feedback shift registers (LFSRs). The document explains that an LFSR generates data that is almost random by shifting bits and XORing selected output bits. It provides a flowchart and description of a 16-bit PRBS generator that taps the 15th, 4th, 2nd, and 1st bit outputs of D flip-flops connected in series and feeds them back to the first flip-flop. The generator can be used for applications like data encryption and wireless communications.

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Divyesh
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
3K views

PRBS Generator Using VHDL Final

This document describes a PRBS (Pseudo Random Bit Sequence) generator using VHDL. A PRBS generator produces a random-looking binary sequence using linear feedback shift registers (LFSRs). The document explains that an LFSR generates data that is almost random by shifting bits and XORing selected output bits. It provides a flowchart and description of a 16-bit PRBS generator that taps the 15th, 4th, 2nd, and 1st bit outputs of D flip-flops connected in series and feeds them back to the first flip-flop. The generator can be used for applications like data encryption and wireless communications.

Uploaded by

Divyesh
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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PRBS Generator Using VHDL

Prepared By, Guided By,


Divyesh Patel Prof. B. M. Chaudhari
Alpesh Thesiya
Tejas Shah
PROPERTIES

 The maximal length LFSR (Linear feedback


shift registers)
 generates data that is almost random.
 Maximal length (2^n) -1.
 000..00 – A special case.
 The problem: Choose the place for the XOR
which provides the maximal length.
Pseudo Random Bit Sequence
(PRBS)
 A Pseudorandom bit generator (PRBS) is
used to generate a random sequence of 1’s
and 0’s
 It is a good approach to use a PRBS
sequence as a testing driver than a regular
pulse wave sequence
How to construct a PRBS

D D
:::::
Q Q D Q D Q D Q D Q
Data Data
IN 1 2 3 4 14 15 OUT
CLK CLK CLK CLK CLK CLK

Clock
LFSR
 A linear feedback shift register (LFSR) is a shift register
whose input bit is a linear function of its previous state. The
only linear functions of single bits are xor and inverse-xor;
thus it is a shift register whose input bit is driven by the
exclusive-or (xor) of some bits of the overall shift register
value.
 Types Of LFSR:

Galois Type Fibonacci Type


Flowchart
Start
Shift Left with carry

Clear Register

Set the Left shift Count Bit Shift Right with carry
(N)

Tapping the Register Output


RET
Set the initial counter to ‘0’

Increment
No
Shift Right Register a bit

Count =N ?
Description

 16 DFF connect in series, the output of the 15th ,4th


, 2nd and 1 DFF will connect to a XOR logic gate
and feedback to the 1st DFF
DFF Symbol

D Q

CLK
DFF Schematic
16bit PSRB
15bit PSRB schematic
Simulation
Application
 Data Encryption/Decryption
 Digital Signal Processing
 Wireless Communications
 Built-in Self Test (BIST)
 Data Integrity Checksums
 Data Compression
 Direct Sequence Spread Spectrum
 Scrambler/Descrambler
 Optimized Counters
Advantages
 Variable Length LFSR
 Variable Tapping Mechanism
 Two sequence generates with single program
Conclusion

As the PRBS generator using LFSR is easy


because of ease of construction from simple
electronics circuit, long periods, and very uniformly
distributed output. An LFSR is a linear system,
leading to fairly easy cryptanalysis.
THANK
YOU

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