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DM9368 7-Segment Decoder/Driver/Latch With Constant Current Source Outputs

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DM9368 7-Segment Decoder/Driver/Latch

with Constant Current Source Outputs


General Description
The DM9368 is a 7-segment decoder driver incorporating
input latches and constant current output circuits to drive
common cathode type LED displays directly.

Connection Diagram
Dual-In-Line Package

TL/F/9796 1

Order Number DM9368N


See NS Package Number N16E
Pin Name
A0A3
RBO
RBI
ag
LE

C1995 National Semiconductor Corporation

TL/F/9796

Description
Address (Data) Inputs
Ripple Blanking Output (Active Low)
Ripple Blanking Input (Active Low)
Segment Drivers-Outputs
Latch Enable Input (Active Low)

RRD-B30M115/Printed in U. S. A.

DM9368 7-Segment Decoder/Driver/Latch with Constant Current Source Outputs

December 1992

Absolute Maximum Ratings (Note)


Note: The Absolute Maximum Ratings are those values
beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The
parametric values defined in the Electrical Characteristics
table are not guaranteed at the absolute maximum ratings.
The Recommended Operating Conditions table will define
the conditions for actual device operation.

If Military/Aerospace specified devices are required,


please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
Input Voltage
Operating Free Air Temperature Range
Storage Temperature Range

7V
5.5V
0 C to a 70 C
b 65 C to a 150 C

Recommended Operating Conditions


Symbol

DM9368

Parameter

VCC

Supply Voltage

VIH

High Level Input Voltage

VIL

Low Level Input Voltage

Units

Min

Nom

Max

4.75

5.25

V
0.8

3.2

mA

70

b 80

IOH

High Level Output Current

IOL

Low Level Output Current RBO

TA

Free Air Operating Temperature

ts(H)

Setup Time High


An to LE

30

ns

th(H)

Hold Time HIGH


An to LE

ns

ts(L)

Setup Time LOW


An to LE

20

ns

th(L)

Hold Time LOW


An to LE

ns

mA

tw(L)

LE Pulse Width LOW

IOH

Segment Output HIGH Current

b 16

45
b 22

mA

ns

IOL

Segment Output LOW Current

b 250

250

mA

Electrical Characteristics
Over recommended operating free air temperature range (unless otherwise noted)
Symbol

Parameter

Conditions

Min

Typ
(Note 1)

Max

Units

b 1.5

VI

Input Clamp Voltage

VCC e Min, II e b12 mA

VOH

High Level
Output Voltage

VCC e Min, IOH e Max,


VIL e Max

VOL

Low Level
Output Voltage

VCC e Min, IOL e Max,


VIH e Min

II

Input Current @ Max


Input Voltage

VCC e Max, VI e 5.5V

IIH

High Level Input Current

VCC e Max, VI e 2.4V

40

mA

IIL

Low Level Input Current

VCC e Max, VI e 0.4V

b 1.6

mA

IOS

Short Circuit
Output Current

VCC e Max
(Note 2)

b 57

mA

ICC

Supply Current

VCC e Max, Outputs Open,


Data & Latch Inputs e 0V

67

mA

2.4

0.2

b 18

Note 1: All typicals are at VCC e 5V, TA e 25 C.


Note 2: Not more than one output should be shorted at a time.

3.4

V
0.4

mA

Switching Characteristics
VCC e 5.0V, TA e 25 C (See Section 1 for Waveforms and Load Configuations)
Symbol

CL e 15 pF
RL e 100X

Parameter
Min

Units
Max

tPLH
tPHL

Propagation Delay
An to ag

50
75

ns

tPLH
tPHL

Propagation Delay
LE to ag

70
90

ns

Functional Description
HIGH. This allows 68s to be driven from an MOS device in
multiplex mode without the need for drivers on the data
lines.
The 68 also has provision for automatic blanking of the
leading and/or trailing edge zeros in a multidigit decimal
number, resulting in an easily readable decimal display conforming to normal writing practice. In an eight digit mixed
integer fraction decimal representation, using the automatic
blanking capability, 0060.0300 would be displayed as 60.03.
Leading edge zero suppression is obtained by connecting
the Ripple Blanking Output (RBO) of a decoder to the Ripple Blanking Input (RBI) of the next lower stage device. The
most significant decoder stage should have the RBI input
grounded; and since suppression of the least significant integer zero in a number is not usually desired, the RBI input
of this decoder stage should be left open. A similar procedure for the fractional part of a display will provide automatic
suppression of trailing edge zeros. The RBO terminal of the
decoder can be OR-tied with a modulating signal via an isolating buffer to achieve pulse duration intensity modulation.
A suitable signal can be generated for this purpose by forming a variable frequency multivibrator with a cross coupled
pair of TTL or DTL gates.

The 68 is a 7-segment decoder driver designed to drive 7segment common cathode LED displays. The 68 drives any
common cathode LED display rated at a nominal 20 mA at
1.7V per segment without need for current limiting resistors.
This device accepts a 4-bit binary code and produces output
drive to the appropriate segments of the 7-segment display.
It has a hexadecimal decode format which produces numeric codes 0 thru 9 and alpha codes A through F
using upper and lower case fonts.
Latches on the four data inputs are controlled by an active
LOW latch enable LE. When the LE is LOW, the state of the
outputs is determined by the input data. When the LE goes
HIGH, the last data present at the inputs is stored in the
latches and the outputs remain stable. The LE pulse width
necessary to accept and store data is typically 30 ns which
allows data to be strobed into the 68 at normal TTL speeds.
This feature means that data can be routed directly from
high speed counters and frequency dividers into the display
without slowing down the system clock or providing intermediate data storage.
Another feature of the 68 is that the unit loading on the data
inputs is very low (b100 mA Max) when the latch enable is

Logic Symbol

VCC e Pin 16
GND e PIN 8
TL/F/9796 2

Truth Table

TL/F/9796 4

TL/F/9796 8

*The RBI will blank the display only if a binary zero is stored in the latches.
**The RBO used as an input overrides all other input conditions.
H e HIGH Voltage Level
L e LOW Voltage Level
X e Immaterial

Logic Diagram

TL/F/9796 3

Numerical Designations

TL/F/9796 5

Parallel Data Display System with Ripply Blanking


Common Cathode LED Display

TL/F/9796 6

Display Demultiplexing System with Ripple Blanking


Common Cathode LED Display

TL/F/9796 7

Note: Digit address data must be non-overlapping. Standard TTL decoders like the 9301, 9311, 7442 or 74155 must be strobed, since the address decoding
glitches could cause erroneous data to be strobed into the latches.

DM9368 7-Segment Decoder/Driver/Latch with Constant Current Source Outputs

Physical Dimensions inches (millimeters)

16-Lead Molded Dual-In-Line Package (N)


Order Number DM9368N
NS Package Number N16E

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SEMICONDUCTOR CORPORATION. As used herein:
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systems which, (a) are intended for surgical implant
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failure to perform, when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
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Corporation
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Arlington, TX 76017
Tel: 1(800) 272-9959
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support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
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effectiveness.

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Tel: 81-043-299-2309
Fax: 81-043-299-2408

National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.

This datasheet has been download from:


www.datasheetcatalog.com
Datasheets for electronics components.

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