Design of Resonant Converter with the Constraints of Efficiency, Power Factor and Converter KVA Rating

H. M. Suryawanshi hms_1963@rediffmail.com Department of Electrical Engineering, V.N.I.T, Nagpur-440011 (India)

S. S. Tanavade V. B. Borghate tanavadesatish@rediffmail.com Department of Electrical Department of Electrical Engineering,vi

Engineering, Dr.B.A.T.U., Lonere-402 103 (India)

V.N.I.T, Nagpur-440011 (India)

macavc@yahoo.com Department of Electrical Engineering, Y.C.C.E., Wanadongri, Nagpur-440011 (India)

M. A. Chaudhari

Abstract: This paper presents systematic and efficient design of modified series-parallel resonant converter (MSPRC). The converter design for high efficiency under the constraints of minimum losses and cost are discussed. Comparison of switching devices is given for selection of optimum device for the converter under consideration. A step-by-step design procedure for high power factor with reduction of the stresses on the resonant components of the converter is presented. Design procedure of litz wire is also given to reduce the winding losses of the magnetic components. To regulate the dc-output voltage, the variable frequency control and duty ratio control are used independently. Finally, simulation and experimental results on a typical modified series-parallel resonant converter
are shown to validate the design procedure.
I.

thus towards the efficient performance of the converter. In this paper, a comprehensive study of efficient design of a resonant converter is done and procedure for designing the resonant converter is presented. The optimal number and

dimete o nds in aostz-wirerwond the manet components under loss and cost constraints are determined for the converter. In order to select the switching device for the converter performance, comparison of different switches is carried out. A systematic design procedure of resonant converter for high input power factor without any active control of input current and for minimum converter VA rating is illustrated. MATLAB program is developed to rtn .MTA rga sdvlpdt implement design algorithms. Finally, simulation and
experimental results for designed modified series-parallel resonant converter are given to validate the design procedure.
II.

INTRODUCTION

To increase the power packing density, switching frequency is increased thereby reducing the size and weight of reactive components. The conventional PWM techniques suffer from excessive switching losses as switching frequency is increased. The solution to this is given by resonant converters where the power is processed in sinusoidal form. The switches are often turned-on and turned-off at zero-voltage (ZVS)/zero-current (ZCS). Number of advantages of resonant converters over PWM converters have been discussed in the literature [I]-[6].
An ideal resonant converter is characterized by high efficiency, unity input power factor, undistorted power frequency inputs, minimum component stresses and reduced EMI effects with minimum cost. Continuous efforts have been made by various researchers to improve the performance of basic resonant converter configurations. These efforts are towards the improvement of efficiency, power factor, reduction of harmonics, reduction of component stresses and
X.c

DESIGN OF MAGNETIC COMPONENTS UNDER LOSS AND COST CONSTRAINTS A modified Series-Parallel resonant converter of following ratings, as shown in Fig. 1, is taken up for its efficient design and analysis. Rated output power, P0= 500 W
I

Resonant frequency,f= 192 kHz Minimum switching frequency, f= 200 kHz Ratio of switching to resonant frequency, Y =1.13 The magnetic components in this converter, which include high frequency (HF) inductors in the resonant tank circuit LI, L2 and HF transformer, need to be designed to reduce the core and winding losses. The core losses are highly dependent on the core material used for the transformer or inductor. First, it is desired that B-H characteristics be as narrow as possible to reduce hysteresis losses.

Output voltage, V, = 1000 V

LL
1 3

L2

14

Dl

D3

C2 [t

Fig. 1 Modified Series-Parallel Resonant Converter (MSPRC)

Secondly, volume resistivity must be reasonably high to discourage the eddy current at high frequencies. Hysterisis loss also depends on flux excursion. In resonant converters Bmax is typically set at not higher than 10-15 percent of the saturation flux densities. Ferrite materials provide high specific resistance; hence the eddy current losses in the frequency range common today (1 kHz to 2 MHz) may be practically disregarded except in case of core having a large cross sectional area. The ferrite cores made of M33 and N87 materials are selected for the HF inductors and transformer respectively. Litz wires (conductors made up of multiple, individually insulated strands, twisted or woven together) are generally used within the frequency range of 10 kHz to 1 MHz to minimize the skin effect taking place in a winding. For the given number of turns and winding cross sectional area, maximum cross sectional area of each turn is fixed. As the number of strands in a litz wire is increased, cross sectional area of each strand must be decreased. This typically leads to reduction in eddy current loss. However, as the number of strands increase, the fraction of window area filled with copper decreases and fraction filled with insulation increases. This results in increased dc resistance. Eventually, eddy current loss is made small till increasing dc resistance offsets any further improvement in it. Thus there is an optimal number of strands that results in minimum winding loss [7]-[8]. The winding loss is represente by, PF.R(2

Fr'

2
E

I 05
0

Fr

io

F, 'is total resistance factor, Fd, and F, are dc & ac resistance factors Fig. 2 Variation in resistance factors with strands of a Litz wire
wound inductor.

nuamber of strards

10o2

1o

Where,
zz

7 p Equation (5) can be minimized with respect to 'n' to find optimal number of strands as below, l

2o2 /2 d, =

a 8. (F

Fl bbh

(6)

(7)t

Fr =1+

1+

w a) 768

2 f2d

N2

(2)

Where Ic is the rms value of sinusoidal current and F, is the AC resistance factor relating dc resistance (Rdc) to ac resistance. The diameter of copper in single strand,

(i-) - FF . F.lpbb h i2,8 d= dr 8 a Nb

(3)

Here, d, is any arbitrarily defined reference diameter for making the constants ax and fi unitless. The parameters ax and ,f found for single build insulation wire are i = 0.97 and ax =1.12, for d, chosen to be the diameter of AWG 40 wire). The total resistance factor equal to ratio of ac resistance of Litz~~~~~~~~~~~~~~~~~reitneo.qiaetigesrne iei wirto dc Litz wire to dc resistance of equivalent single stranded wire iS given by,

This will give non-integral number of strands, the nearest integral number of strands can be chosen to minimize ac resistance and hence to minimize winding loss. Fig. 2 shows the total calculated resistance factor and its components as a function ofnumber of strands. Fig. 2 reveals that a decrease from optimum of 866 strands to 225 strands entails only a small increase in ac resistance (from 1.9469 to 2.04) and hence in losses. Thus cost trade off becomes necessary. Table 1 shows the relative cost (cost of the design with 171/44 wire is taken as reference) and loss calculations for the optimal as well as sub-optimal strands. To have best cost-loss compromise, the design with 225 strands of 42 AWG is selected for inductance Ll. Similar design procedure is used to design inductance L2. Incorporating leakage inductance of HF transformer in resonant tank can reduce the size of resonant inductor. But, if the leakage is associated with secondary of the HF transformer, it will increase the peak reverse voltage seen by the rectifier diodes for a center tapped rectifier topology. This increase in the peak reverse voltage is due to the additional voltage across the secondary leakage reactance.
Table 1. Design table for L1 for optimal and sub-optimal stranding

Where, Fdc is ratio of dc resistance of litz wire to the dc resistance of a single strand winding using a wire with the
Combining equations (2), (3) and (4) results in
F
f 13 A

Fr = Fde Fr

(4)

AWG 49
44 42
~~~

Strands 866

Fr'
1.9469
1.9837

same diameter as that of litz bundle.

Relative Cost 16.43

.FAni +
L

(5)

~~~~ 135

2255

350

2.18 ~~~~~40

2.084

1.4047
1.088

2.040

Full bridge rectifier topology can be used to overcome this problem. However the secondary leakage inductance of the HF transformer increases the stresses on the HF output rectifier. Hence parallel resonant capacitor C,. is placed on the secondary side of the HF transformer. This will reduce the stresses on the HF rectifier. Further, by placing the resonant capacitor on the secondary side of HF transformer, the equivalent leakage inductance of the HF transformer is referred to the primary side and included in the resonant tank circuit. This reduces the required value of external resonant inductor. To design a HF transformer ofthe required ratio nt = 0. 1 15 on available PM50x39, N87 ferrite core, 10 and 90 turns on primary and secondary are wound. The design with 48 AWG wire although results in minimum loss, increases relative cost. Hence to have best cost-loss trade off, the design with 40 AWG wire is selected that gives slightly higher loss with lesser relative cost. In a winding of high frequency inductor, the core and particularly the air gap strongly affect the magnetic field in the winding area and thus determine the proximity effect loss. This loss which is proportional to ac field impinging on any given conductor of length / is given by,
'pe
~Bf .1-d4 2Tco2-1d BI
.

128. Pc

(8)

When compared to BJTs, presence of an isolated gate in MOSFET and IGBTs makes them simpler to drive than a BJT. BJTs require that the base current to be continuously supplied in a quantity sufficient enough to maintain saturation. Base currents of one-tenth of the collector current are typical to keep BJT in saturation. BJT drive circuits must be sensitive to variable load conditions. The base current of the BJT must be kept proportional to collector current to prevent desaturation under high current loads and excessive base drive under low-load conditions. This additional base current increases the power dissipation of the drive circuit. BJTs are minority carrier devices and charge storage effects including recombination slow the performance when compared to majority carrier device such as MOSFET. The conduction losses in MOSFETs are an exponential function of rated blocking voltage, so that such devices are suitable for low voltage or low current applications. In typical medium power applications, the conduction losses in MOSFETs become unacceptable. MOSFET requires a die size of 3 to 4 times larger than IGBT counterpart in order to lower conduction losses to acceptable level, therefore IGBTs are today widely used, as they own higher current capabilities and lower saturation voltage than MOSFETs. IGBTs, although lower the conduction losses considerably in high power applications due to the conductivity modulation phenomenon, also experience minority carrier
recombination in their base region during turn off that accounts for the current "tailing" at turn off. To select the switching device for the low power converter shown in Fig. 1, the device loss curves of various similar rated MOSFETs and IGBTs are plotted in Fig. 4. From the device loss curves ofFig. 4, it can be seen that for the converter under consideration the optimum switching device is MOSFET IRFP450, since its losses remain lower than the other similar rated devices.
16 15

This loss can be reduced by positioning the conductors in the region of low field (away from air gap), thus finding the optimal shape of winding to minimize this loss. A MATLAB program for shape optimization of gapped inductor windings is used to find the optimum shape for the inductor.

III. SELECTION OF SWITCHING DEVICE Power switching converter technology advances with the advances in semiconductor technology. Today, semiconductors have reached a high level of sophistication in regard to their applicability to converters. This rapid progress in semiconductor technology has led to higher power rating, faster switching speed and lower costs. A summary of power device capabilities is shown in Fig. 3. Although high as well as low power device capabilities are shown together in Fig. 3, the comparative analysis [9], [10] in this section is done for the low power devices to find their suitability for the converter under consideration.
THYISTOR

l.l

14
13 ..4 o

6CT

12
......1............1....

0 3H GBT
11]

__ __ -----------_
___ _----------__ -___

G.

z PTO10kH:

UPTO 20kH,

F 1u T
2l

1l

2UU

256

..UPO0k---7UPTO _ F _____ 20kHzWITH MOSFETS: IR.FP450 (1), IR.FB13N5OA (2), ________ IRFP448(3) IRFB11N5OA(4) IGBTS: SGP23N6OUFD (5), FB15R06KL4 (6), -O _--.________UPTO100 400 2000 3000 4000 5000 6000 FB1PRO6KL4 (7)7 IRG4BC15UD (8) CUR(AMPERE} Fig. 4 DeViCe losses VS freqUenCY for different
SWitChing deViCeS (LOad CUrrent 5A).

41-__

I_ + __

-_.

SOFT ----

SWITC

200

25

Fig. 3 SUmmarY Of deViCe capabilities,

IV. HIGH POWER FACTOR OPERATION OF RESONANT CONVERTER WITH OPTIMIZED CONVERTER VA RATING It is well known that parallel resonant converter (PRC) series-parallel resonant converter (SPRC) and modified series-parallel resonant converter (MSPRC) have an inherent ability to boost voltage during valleys of ac input [2]-[4], [6]. This makes the PRC, SPRC and MSPRC better candidates for improvement of line power factor even without any active control of input current. Choosing quality factor of the resonant tank circuit for these converters is very crucial as it influences not only the instantaneous gain of converter but also the rating of reactive components. Since the converter operating frequency is much greater than the input line frequency, the converter can be assumed to be in steady state at each point as the ac input varies. Thus the circuit quality factor Q varies over the period of input ac wave. The instantaneous quality factor of MSPRC referred to in Fig. 1 is given by,
Q(t) C- l_ Zo RL (t) (Ed

such that this available gain is just greater than the required gain for major portion of ac input cycle. Fig. 5 shows the variation of instantaneous Q, required gain and available gain for three different values of Q at peak of ac line for the MSPRC shown in Fig. 1. Fig. 5 clearly indicates that for Q at peak (Q,2) equal to 1.5, the available gain is more than the required gain for major portion of ac input cycle. For Q,2 greater than 1.5, the available gain falls short of required gain making the line current discontinuous whereas for Q,2 less than 1.5, the available gain is in excess to the required gain increasing the stresses on the resonant components. Hence the optimum value of Q,2 for high power factor operation is 1.5. The filter components Ld and Cd for the specified ripple contents in the output voltage and current are designed from the following equations [6].
I vO Ld 3ft Cd = Ld 1TmH, 3rTf 'Vp Ld= I mH Cd= 10.61 uF

(13)

_i-

Ed

(t)

(9)
V.

K10 (t)) WZO ) where, io (t) istheinstantaneous outputcurrentreferredto primary of HF transformer. I'max I'max cos22t (10) io (t)

RESULTS

Here,

HF transformer. Instantaneous available gain of the converter Mav(t) is given by,

is the dc output current referred to primary of

+ Ma,t)(t) I 1 + ratio

(11)

Where,
ratio

(- R4 U4
p

+R

2u2 p q+U2 + u2 q pq p k2u2.R.r.( R U2 I)

(2.U.RC Q()r)
s=l+k= Z

The MSPRC, designed optimally using the design procedure outlined in sections II-IV, is simulated using PSPICE to evaluate its performance without active control of line current. Fig. 6 gives the simulation results at full load condition. Fig. 6(a) shows high frequency inverter output voltage (Vab) and current (l/ink) indicated in Fig. 1. These waveforms reveal that the converter operates in ZVS (lagging PF mode). Input voltage (Vin) and current (Iin) at full load are plotted in Fig. 6(b). Fig. 7 shows the simulation results for 50 % loading condition. To show the validity of the proposed design, an experimental prototype of a MSPRC is implemented in the laboratory with the following parameters. Vin=115 V, V0=1 kV, PO= 500 W, fi= 200 kHz, L1=15.8 fH, L2=158 fH, Cl= 0.047 pF, 0.47 [F, CP'= n7.C=. 67 pF, MOSFETS IRFP450, Ultra-fast recovery diodes HFA16PB120.

Cj=

a(-+as

a=Jg,
C'p
Cl,R=-,
O

15

Xcues

,k

MeO

P=

L2

q=C

C2'

r=

00
5

-0:==~~-

Also the instantaneous required gain of the converter Mreq(t) is given by,

/ l5 0
5 100 150 100 normalised time (Deg)

Mreq(t) = Vin maxEd in COin t s

(12)

By substituting the instantaneous value of Q from equation (9) in equation (11), the available gain at all points in the ac input cycle can be determined. For high power factor operation, the value of Q at peak of ac input should be chosen

May = available gain, Mreq= required gain Fig. 5 Instantaneous gain and Q*5 curves for the MSPRC

00s1 'l*ab

Ilinka

34.8900ms

34.9000ms
.....

Fig. 6(a) HF inverter output voltage and output current at full load.

200-

(a)

-200

20ms

30ms

40ms

Fig. 6(b) Supply voltage and current at full load.

Vab

111llnk*6

L
(b)

34.940ms

34.950ms

Fig. 7(a) HF inverter output voltage and current at half load.

20ms 30ms 4ems Fig. 7(b) Supply voltage and current at half load.

_200_

(c) Fig. 8 Experimental waveforms of input line voltage Vi, and input line current ii, under variable frequency control (a) Vi, (100 V/div); ii, (2 A/div); full load, (b) (100 V/div); ii, (1 A/div); 50 % of full load, (c) Vi,m (100 V/div); ii, (0.2 A/div); 10 % of full load. Time scale: 5 ms/div.

Vi,

AC input line voltage and line current under different load conditions are experimentally verified (Fig. 8). Due to use of small EMI filter at the input line and the wiring inductance, the switching frequency component in the input line current is filtered out. Output voltage is regulated using variable frequency control. The required switching frequency to regulate the output voltage is 200 kHz at full load and 274 kHz at 10% of full load. Power factor of the converter is maintained above 0.99 without active line control. It is noted from experimental results that the power factor for duty ration control is 99.94 % at full load, 99.13 % at 50 % of full load and 95 % at 10 % of full load. A duty ratio variation of 0.48 at full load to 0.31 at 10 % of full load was needed to maintain the output voltage at 980 V. It is also observed from these waveforms that the input lin currentdecreaseswithIthe
decrease in load.

Table 2. Power factor and total harmonic distortion for variable

frequency control Parameter |/oPower factor

Full load

0oEfficiency
Frequency
Frequ

%THD

99.94
4.5 200

99.93

50 0

94.5 __

5.1
95

99.43
5.3
94

25 %0

10 0 99.13 5.3
82

__ency 226

251

274

Table 3. Power factor and total harmonic distortion for fixed frequency (duty ratio) control Parameter Full load 500% 25 0 10 0

Power factor 0 THD

99.94 4.5
94.5

99.13 8

96.54 23.1

95 42

The experimental power factor and total harmonic distortion for variable frequency control and duty ratio

00% Efficiency Duty ratio

0.48

|95.4 |95

|0.46 |0.43 |0.31

|94

control are shown in Table 2 and Table 3 respectively. It is also noted from these tables that the power factor is approximately constant at all load conditions for variable frequency control and decreases with decrease in load for duty ratio control. This is due to the fact that the power factor
depends on ratio of switching frequency to resonant

[1] A. K. S. Bhat, M. M. Swamy, "Loss calculations in transistorized parallel resonant converters operating above resonance", IEEE Transactions on Power Electronics, vol.4, no.4, pp 391-401, Oct.1989.

REFERENCES

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Proc.-Electr. Power Applications, vol. 149, no.2, pp 101-110, March
[3]

frequency.

2002.

VI. Conclusion

Proper selection of core and Litz wire diameter/number of strands under cost constraint can optimize the losses in magnetic components. Incorporating leakage inductance of
HF transformer in the resonant tank circuit can reduce the size of resonant inductor. This can be achieved through

[4] R. L. Steigerwald, "A comparison of Half-Bridge resonant converter

Y. F. Zhang, L. Yang, C. Q. Lee, "Spectral analysis and EMI comparison of PWM, Quasi-resonant and Resonant converters", Proceedings of the 37th Midwest Symposium on Circuits and Systems, 1994, vol.2, pp 1285-1288, 3-5 Aug. 1994.

[5]

April 1992. integrated magnetic structure of HF transformer. Selection of proper switching devices for the particular application helps [6] V. Belaguli, A.K.S.Bhat, "Series-parallel resonant converter operating in discontinuous current mode-Analysis, Design, Simulation and toimprovethe performance of converter, to improve the performance of converter.*Experimental results", IEEE transactions on circuits and systems, vol.47, no.4, pp.433-442, April 2000. For high power factor operation, value of Q at peak of ac

IEEE Transactions on power Electronics, vol. 7, no. 2, pp 304-314,

M. J. Schutten, R. L. Steigerwald, M. H. Kheraluwala, "Characteristics of load resonant converter operated in a high-power factor mode",

174-182, April 1988.

portion of ac input cycle. Design ofthe MSPRC for minimum VA rating is carried out. The value of Q designed from this
factor operation of the converter.
The MSPRC simulated using PSPICE to verify the The MSPRC is issimulated uing PSPICE t verify the design procedure for high PF. An experimental prototype

input should be chosen such that the available gain of cnee iju grtrhnh converter iS JUSt greater than the required gain for major

rqif

C. R. Sullivan, "Optimization of shapes for round-wire gapped high frequencymeeting, inductor winding", IEEE industry applications society annual pp 907-912, October 1998. [8] C. R. Sullivan J. D. McCurdy, R. A. Jenson, "Analysis of minimum cost in shape-optimized Litz-wire inductor winding", PESC' 2001, 32nd Annual conference, vol.3, pp 1473-1478, 17-21 June 2001. [9] P. A. Dahono, Y. Sato, T. Kataoka, "Analysis of conduction losses in inverters", IEE Proc.-Electr. Power appl., vol. 142, no. 4, pp 225-232,

[7]

Jiankun Hu,

[10]

July 1995.
A.

is designed and fabricated in the laboratory for validation of the proposed design procedure. The simulation and experimental results validate the design procedure.

Devices", Proc. of 6th International symposium on power semiconductor devices & ICs, pp 87-92, May 31-June 2, 1994.

Consoli, C. Licitra, S. Musumeci, A. Testa, "Comparative investigation on power losses in soft switching Insulated Gate