International Journal of Engineering and Technology Volume 2 No.

1, January, 2012

ISSN: 2049-3444 2011 IJET Publications UK. All rights reserved.
93

Power Quality Enhancement Using VSC Based DSTATCOM

1
K Hussain,
2
J Praveen
1
EEE, KG Reddy College of Engineering and Technology, Hyderabad, A.P.-501504.
2
Narasimha Reddy Engineering College,
Maisammaguda, Dhulapally, Komapally, Medchal, Hyderabad, A.P.-500014.

ABSTRACT

In this paper, a new three-phase four-wire distribution static compensator (DSTATCOM) based on a T-connected transformer
and a three-leg voltage source converter (VSC) is proposed for power quality improvement. The T-connected transformer
connection mitigates the neutral current and the three-leg VSC compensates harmonic current, reactive power, and balances
the load. Two single-phase transformers are connected in T-configuration for interfacing to a three-phase four-wire power
distribution system and the required rating of the VSC is reduced. The insulated gate bipolar transistor (IGBT) based VSC is
supported by a capacitor and is controlled for the required compensation of the load current. The dc bus voltage of the VSC is
regulated during varying load conditions. The DSTATCOM is tested for power factor correction and voltage regulation along
with neutral current compensation, harmonic elimination, and balancing of linear loads as well as nonlinear loads. The
performance of the three-phase four-wire DSTATCOM is validated using MATLAB software with Simulink.

Keywords: CPDs, DSTATCOM, IGBT and VSC.

1. INTRODUCTION

Three-Phase four-wire distribution systems are facing
severe power quality problems such as poor voltage
regulation, high reactive power and harmonics current
burden, load unbalancing, excessive neutral current, etc
(A.Ghosh and G. Ledwich, 2002) - (Ewald F. Fuchs and
Mohammad A. S. Mausoum, 2008). Three-phase four-wire
distribution systems are used in commercial buildings,
office buildings, hospitals, etc. Most of the loads in these
locations are nonlinear loads and are mostly unbalanced
loads in the distribution system. This creates excessive
neutral current both of fundamental and harmonic
frequency and the neutral conductor gets overloaded. The
voltage regulation is also poor in the distribution system
due to the unplanned expansion and the installation of
different types of loads in the existing distribution system.
In order to control the power quality problems, many
standards are proposed, such as the IEEE-519 standard.
There are mitigation techniques for power quality
problems in the distribution system and the groups of
devices are known by the generic name of custom power
devices (CPDs) (A.Ghosh and G. Ledwich, 2002). The
distribution static compensator (DSTATCOM) is a shunt-
connected CPD capable of compensating power quality
problems in the load current. Some of the topologies of
DSTATCOM for three phase four-wire system for the
mitigation of neutral current along with power quality
compensation in the source current are four-leg voltage
source converter (VSC), three single-phase VSCs, three-
leg VSC with split capacitors, three-leg VSC with zig-zag
transformer(Hurng- Liahng Jou et al., 2005) - (Hurng-
Liahng, Kuen et al., 2008), and three-leg VSC with neutral
terminal at the positive or negative of dc bus (H.L.Jou, et
al., 2008). The voltage regulation in the distribution feeder
is improved by installing a shunt compensator. There are
many control schemes reported in the literature for control
of shunt active compensators such as instantaneous
reactive power theory, power balance theory, synchronous
reference frame theory, etc. The synchronous reference
frame theory is used for the control of the proposed
DSTATCOM.

2. SYSTEM CONFIGURATION AND
DESIGN

Fig. 1 shows the single-line diagram of the shunt-
connected DSTATCOM based distribution system. The dc
capacitor connected at the dc bus of the converter acts as
an energy buffer and establishes a dc voltage for the
normal operation of the DSTATCOM system. The
DSTATCOM can be operated for reactive power
compensation for power factor correction or voltage
regulation.

AC
r EQUIVALENT
LOAD
DSTATCOM
C
dc
V
M
V
S
V
dc
I
C
I
L
I
S
PCC
L
S R
S
Z
S

Fig. 1. Single -line diagram of DSTATCOM system
International Journal of Engineering and Technology (IJET) Volume 2 No. 1, January, 2012

ISSN: 2049-3444 2011 IJET Publications UK. All rights reserved.
94


The proposed DSTATCOM consisting of a three-leg VSC
and a T-connected transformer is shown in Fig.2, where
the T-connected transformer is responsible for neutral
current compensation.



Fig.2. Schematics of the proposed three-leg VSC with T-
connected transformer based DSTATCOM connected in
distribution system.

A three-leg VSC is used as an active shunt compensator
along with a star-connected transformer, as shown in Fig.1
and this topology has six IGBTs, three ac inductors and
one dc capacitor. The required compensation to be
provided by the DSTATCOM decides the rating of the
VSC components.

2.1 DC Capacitor Voltage

The minimum dc bus voltage of VSC of DSTATCOM
should be greater than twice the peak of the phase voltage
of the system (B. N. Singh, et al., 2004). The dc bus
voltage is calculated as

m
V
V
LL
dc
3
2 2
= (1)

Where m is the modulation index and is considered as 1
and V
LL
is the ac line output voltage of DSTATCOM.
Thus, Vdc is obtained as 677.69 V for V
LL
of 415 V and is
selected as 700 V.

2.2 DC Bus Capacitor

The value of dc capacitor (C
dc
) of VSC of DSTATCOM
depends on the instantaneous energy available to the
DSTATCOM during transients (B. N. Singh, et al., 2004).
The principle of energy conservation is applied as

t aI V V V C
dc dc dc
) ( 3 )] ( ) [(
2
1
2
1
2
= (2)

where V
dc
is the reference dc voltage and V
dc1
is the
minimum voltage level of dc bus, a is the overloading
factor, V is the phase voltage, I is the phase current, and t
is the time by which the dc bus voltage is to be recovered.
Considering the minimum voltage level of the dc bus, V
dc1

= 690V, V
dc
= 700V, V = 239.60V, I = 27.82A, t = 350s,
a = 1.2. The calculated value of C
dc
is 2600F and is
selected as 3000F.

2.3 AC Inductor

The selection of the ac inductance (L
f
) of VSC depends on
the current ripple i
cr(p-p)
, switching frequency f
s
, dc bus
voltage (V
dc
), and L
f
is given as (B. N. Singh, et al., 2004)

) (
12
3
p p cr s
dc
f
i af
mV
L

= (3)

where m is the modulation index and a is the overload
factor. Considering, i
cr(p-p)
=5%, f
s
= 10kHz, m = 1, V
dc
=
700 V, a = 1.2. The L
f
value is calculated to be 2.44 mH. A
round-off value of L
f
of 2.5 mH is selected in this
investigation.

2.4 Ripple Filter

A low-pass first-order filter tuned at half the switching
frequency is used to filter the high-frequency noise from
the voltage at the PCC. Considering a low impedance of
8.1 for the harmonic voltage at a frequency of 5 kHz,
the ripple filter capacitor is designed as C
f
= 5F. A series
resistance (R
f
) of 5 is included in series with the
capacitor (C
f
). The impedance is found to be 637 at
fundamental frequency, which is sufficiently large, and
hence, the ripple filter draws negligible fundamental
current.

3. CONTROL OF DSTATCOM

The control approaches available for the generation of
reference source currents for the control of VSC of
DSTATCOM for three-phase four-wire system are
instantaneous reactive power theory (IRPT), synchronous
reference frame theory (SRFT), unity power factor (UPF)
based, instantaneous symmetrical components based, etc.
The SRFT is used in this investigation for the control of
the DSTATCOM. A block diagram of the control scheme
is shown in Fig. 3.


Fig.3. Control scheme for the three-leg-VSC-based
DSTATCOM in three phases four wire system.
International Journal of Engineering and Technology (IJET) Volume 2 No. 1, January, 2012

ISSN: 2049-3444 2011 IJET Publications UK. All rights reserved.
95


The load currents (i
La
, i
Lb
, i
Lc
), the PCC voltages (V
Sa
,V
Sb
,
V
Sc
), and dc bus voltage (V
dc
) of DSTATCOM are sensed
as feedback signals. The load currents from the abc
frame are first converted to the o frame and then to
the dqo frame using

(
(
(

(
(
(
(
(
(

+
+
=
(
(
(

Lc
Lb
La
Lo
Ld
Lq
i
i
i
i
i
i
2
1
2
1
2
1
)
3
2
sin( )
3
2
sin( sin
)
3
2
cos( )
3
2
cos( cos
t
u
t
u u
t
u
t
u u
(4)

where cos and sin are obtained using a three-phase
phase locked loop (PLL). A PLL signal is obtained from
terminal voltages for generation of fundamental unit
vectors (S. Bhattacharya and D. Diwan, 1995) for
conversion of sensed currents to the dqo reference
frame. The SRF controller extracts dc quantities by a low-
pass filter, and hence, the non-dc quantities (harmonics)
are separated from the reference signal. The d-axis and q-
axis currents consist of fundamental and harmonic
components as

i
Ld
=i
d dc
+ i
d ac
(5)

i
Lq
=i
q dc
+ i
q ac
(6)

3.1 UPF Operation of DSTATCOM

The control strategy for reactive power compensation for
UPF operation considers that the source must deliver the
mean value of the direct-axis component of the load
current along with the active power component current for
maintaining the dc bus and meeting the losses (i
loss
) in
DSTATCOM. The output of the proportional-integral (PI)
controller at the dc bus voltage of DSTATCOM is
considered as the current (i
loss
) for meeting its losses.

) ( ) 1 ( ) ( ) 1 ( ) (
) (
n de id n de n de pd n loss n loss
V K V V K i i + + =

(7)

where V
de
(n) =V
*
dc
V
dc(n)
is the error between the
reference V
*
dc
and sensed V
dc
voltages at the nth sampling
instant. K
pd
and K
id
are the proportional and integral gains
of the dc bus voltage PI controller.

The reference source current is therefore

i
*
d
= i
d dc
+i
loss
. (8)

The reference source current must be in phase with the
voltage at the PCC but with no zero-sequence component.
It is therefore obtained by the following reverse Parks
transformation with i
*
d
as in (8) and i
*
q
as in

(12)

and i
*
0.

(
(
(

(
(
(
(
(
(

+ +
=
(
(
(

*
*
*
*
*
*
1 )
3
2
sin( )
3
2
cos(
1 )
3
2
sin( )
3
2
cos(
1 sin cos
o
q
d
c
b
a
i
i
i
i
i
i
t
u
t
u
t
u
t
u
u u
(9)

3.2 Zero-Voltage Regulation (ZVR) Operation
of DSTATCOM

The compensating strategy for ZVR operation considers
that the source must deliver the same direct-axis
component i
d
*
dc
, as mentioned in (8) along with the sum of
quadrature-axis current (i
q

dc
) and the component obtained
from the PI controller (i
qr
) used for regulating the voltage
at PCC. The amplitude of ac terminal voltage (V
s
) at the
PCC is controlled to its reference voltage using the PI
controller. The output of PI controller is considered as the
reactive component of current (i
qr
) for zero-voltage
regulation of ac voltage at PCC. The amplitude of ac
voltage (V
S
) at PCC is calculated from the ac voltages (V
sa
,
V
sb
, V
sc
) as

2
1
2 2 2
2
1
) ( )
3
2
(
sc sb sa s
V V V V + + = (10)

Then, a PI controller is used to regulate this voltage to a
reference value as

) ( ) 1 ( ) ( ) 1 ( ) (
) (
n te iq n te n te pq n qr n qr
V K V V K i i + + =

(11)

where V
te(n)
= V *
S
V
S(n)
denotes the error between
reference (V*
S
) and actual (V
S(n)
) terminal voltage
amplitudes at the nth sampling instant. K
pq
and K
iq
are the
proportional and integral gains of the dc bus voltage PI
controller. The reference source quadrature-axis current is

i
*
q
= i
qdc
+ i
qr
(12)
The reference source current is obtained by reverse Parks
transformation using (10) with i*
d
as in (8) and i*
q
as in
(12) and i*
0
as zero.

3.3 Computation of Controller Gains

The gains of the controllers are obtained using the Ziegler
Nichols step response technique. The gains of the
controller are computed using the following equations:

K
p
=1.2U/GT (13)

K
i
=0.6U/GT
2
(14)

Where U= step input of amplitude, G= maximum gradient,
T= the point at which the line of maximum gradient
crosses the time axis.

International Journal of Engineering and Technology (IJET) Volume 2 No. 1, January, 2012

ISSN: 2049-3444 2011 IJET Publications UK. All rights reserved.
96


Figure 4. MATLAB model of the T-connected transformer
and the three-leg-VSC-based DSTATCOM connected system

3.4 Current-Controlled Pulse Width
Modulation (PWM) Generator

In a current controller, the sensed and reference source
currents are compared and a proportional controller is used
for amplifying current error in each phase before
comparing with a triangular carrier signal to generate the
gating signals for six IGBT switches of VSC of
DSTATCOM.

4. MODELING AND SIMULATION

The three-leg VSC and the Star-connected-transformer-
based DSTATCOM connected to a three-phase four-wire
system is modeled and simulated using the MATLAB with
its Simulink and PSBs. The ripple filter is connected to the
DSTATCOM for filtering the ripple in the PCC voltage.
The MATLAB-based model of the three-phase four-wire
DSTATCOM is shown in Fig. 4. The Star -connected
transformer in parallel to the load, the three-phase source,
and the shunt-connected three-leg VSC are connected as
shown in Fig. 4. The available model of linear
transformers, which includes losses, is used for modeling
the Star-connected transformer. The control algorithm for
the DSTATCOM is also modeled in MATLAB. The
reference source currents are derived from the sensed PCC
voltages (V
sa
, V
sb
,V
sc
), load currents (i
La
, i
Lb
, i
Lc
), and the dc
bus voltage of DSTATCOM (V
dc
). A PWM current
controller is used over the reference and sensed source
currents to generate the gating signals for the IGBTs of the
VSC of the DSTATCOM.

5. RESULTS AND DISCUSSION

The performance of the T-connected transformer and
three-leg VSC based three-phase four-wire DSTATCOM
is demonstrated for power factor correction and voltage
regulation along with harmonic reduction, load balancing,
and neutral current compensation. The developed model is
analyzed under varying loads and the results are discussed
below.

5.1 Performance of DSTATCOM with Linear
Load for Neutral Current Compensation,
Load Balancing, and ZVR Operation

The dynamic performance of the DSTATCOM under
linear lagging power factor unbalanced load condition is
shown in fig.5. At 0.2s, the load is changed to two-phase
load and to single-phase load at 0.3s. The PCC voltages
(V
s
), source currents (i
s
), load currents (i
L
), compensator
currents (i
C
), source neutral current (i
Sn
), load-neutral
current (i
Ln
), compensator neutral current (i
Cn
), dc bus
voltage (V
dc
), and amplitude of voltage (V
s
) at PCC are
also shown. The source neutral current is observed as
nearly zero, and this verifies the proper compensation. It is
also observed that the dc bus voltage of DSTATCOM is
able to maintain close to the reference value under all
disturbances. The amplitude of PCC voltage is maintained
at the reference value under various load disturbances,
which shows the ZVR mode of operation of DSTATCOM.



Figure 5. Performance of DSTATCOM with Linear Load for
Neutral Current Compensation, Load Balancing, and ZVR
operation

5.2 Performance of DSTATCOM with Linear
Load for Neutral Current Compensation,
Load Balancing, and UPF Operation

The dynamic performance of the DSTATCOM during
linear lagging power-factor-unbalanced load condition is
depicted in the fig.6. At 0.2s, the load is changed to two-
phase load and to single-phase load at 0.3s. The PCC
voltages (V
S
), source currents (i
s
), load currents (i
L
),
compensator currents (i
C
), source-neutral current (i
Sn
),
load-neutral current (i
Ln
), compensator-neutral current
International Journal of Engineering and Technology (IJET) Volume 2 No. 1, January, 2012

ISSN: 2049-3444 2011 IJET Publications UK. All rights reserved.
97

(i
Cn
), dc bus voltage (V
dc
), and amplitude of voltage (V
S
) at
PCC are also depicted. The reactive power is compensated
for power factor correction, and the source currents are
balanced and sinusoidal. The source-neutral current is
nearly zero and it verifies the proper compensation. It is
also observed that the dc bus voltage of DSTATCOM is
maintained at the reference value under all load
disturbances.




Figure 6. Performance of DSTATCOM with Linear Load for
Neutral Current Compensation, Load Balancing, and UPF
Operation

5.3 Performance of DSTATCOM with Non-
Linear Load for Harmonic compensation,
Load Balancing, and ZVR Operation

The dynamic performance of the DSTATCOM with
nonlinear and unbalanced load is shown in fig 7. It is
observed that the harmonic current is compensated and the
source currents are balanced and sinusoidal. At 0.2s, the
load is changed to two-phase load and to single-phase load
at 0.3s. The source currents are still balanced and
sinusoidal even when the load current in a phase is zero.
The dc bus voltage of DSTATCOM is maintained at
nearly its reference value under all load disturbances. The
amplitude of PCC voltage is maintained at the reference
value under various load disturbances, which shows the
ZVR mode of operation of DSTATCOM.




Figure 7. Performance of DSTATCOM with Non-Linear
Load for Harmonic compensation, Load Balancing, and ZVR
Operation

5.4 Performance of DSTATCOM with
Nonlinear Load for Harmonic
Compensation, Load Balancing, and UPF
Operation

The dynamic performance of the DSTATCOM during
nonlinear unbalanced load condition is shown in fig 8. The
source currents are observed as balanced and sinusoidal
under all these conditions. At 0.2s, the load is changed to
two-phase load and again to single-phase load at 0.3s. The
PCC voltages (V
S
), source currents (i
S
), load currents (i
La
,
i
Lb
, i
Lc
), compensator currents (i
C
), source-neutral current
(i
Sn
), compensator-neutral current (i
Cn
), load-neutral
current (i
Ln
), dc bus voltage (V
dc
), and amplitude of
voltage (V
S
) at PCC are also depicted. The dc bus voltage
of DSTATCOM is maintained at the reference value under
all load disturbances through proper control. This shows
International Journal of Engineering and Technology (IJET) Volume 2 No. 1, January, 2012

ISSN: 2049-3444 2011 IJET Publications UK. All rights reserved.
98

the satisfactory performance of DSTATCOM for harmonic
compensation as stipulated by the IEEE-519 standard.


Figure 8. Performance of DSTATCOM with Non-Linear
Load for Harmonic compensation, Load Balancing, and UPF
Operation

6. CONCLUSION

The performance of a new topology proposed has been
demonstrated for neutral current compensation along with
reactive power compensation, harmonic elimination, and
load balancing. The T-connected transformer has mitigated
the source-neutral current. The dc bus voltage of the
DSTATCOM has been regulated to the reference dc bus
voltage under all varying loads. Two single phase
transformers are used for the Star-configuration of the
transformer to interface with a three-phase four-wire
system. The total KVA rating of the Star-connected
transformer is lower than a star/delta transformer for a
given neutral current compensation. The experimental
results on a prototype have verified that the Star-connected
transformer has been effective in compensating the zero
sequence fundamental and harmonics currents. In this
paper, two single phase transformers are connected in T-
configuration for interfacing to a three-phase four-wire
power distribution system. So some winding losses and
cost of winding for required values will be more. If we
replace the T-connected transformer with one three-phase
transformer, then winding losses will be less and also cost
of the winding will be less. So the Star connected
transformer also will be useful to compensate the neutral
current in the distribution system.






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