PD - 96213

IRFB4410ZGPbF
HEXFET Power MOSFET
Applications l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits Benefits l Improved Gate, Avalanche and Dynamic dV/dt Ruggedness l Fully Characterized Capacitance and Avalanche SOA l Enhanced body diode dV/dt and dI/dt Capability l Lead-Free l Halogen-Free
G
D

G S

VDSS RDS(on) typ. max. ID (Silicon Limited)

D

100V 7.2m: 9.0m: 97A

TO-220AB IRFB4410ZGPbF
D S

Gate

Drain

Source

Absolute Maximum Ratings

Symbol
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS dv/dt TJ TSTG

Parameter
Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Silicon Limited) Pulsed Drain Current Maximum Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case) Mounting torque, 6-32 or M3 screw

Max.
97 69 390 230 1.5 20 16 -55 to + 175 300 10lbf in (1.1N m) 242 See Fig. 14, 15, 22a, 22b,

Units
A W W/C V V/ns

Avalanche Characteristics
EAS (Thermally limited) IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy

mJ A mJ

Thermal Resistance
Symbol
RJC RCS RJA Junction-to-Case Case-to-Sink, Flat Greased Surface , TO-220 Junction-to-Ambient, TO-220

Parameter

Typ.
0.50

Max.
0.65 62

Units
C/W

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1
01/06/09

IRFB4410ZGPbF
Static @ TJ = 25C (unless otherwise specified)
Symbol
V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) IDSS IGSS RG

Parameter
Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Internal Gate Resistance

Min. Typ. Max. Units

100 2.0 0.12 7.2 0.70 9.0 4.0 20 250 100 -100

Conditions

V VGS = 0V, ID = 250A V/C Reference to 25C, ID = 5mA m VGS = 10V, ID = 58A V VDS = VGS, ID = 150A A VDS = 100V, VGS = 0V VDS = 80V, VGS = 0V, TJ = 125C nA VGS = 20V VGS = -20V

Dynamic @ TJ = 25C (unless otherwise specified)

Symbol
gfs Qg Qgs Qgd Qsync td(on) tr td(off) tf Ciss Coss Crss Coss eff. (ER) Coss eff. (TR)

Parameter
Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Total Gate Charge Sync. (Qg - Qgd) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Effective Output Capacitance (Energy Related) Effective Output Capacitance (Time Related)

Min. Typ. Max. Units

140 83 19 27 56 16 52 43 57 4820 340 170 420 690 120 S nC

Conditions
VDS = 10V, ID = 58A ID = 58A VDS =50V VGS = 10V ID = 58A, VDS =0V, VGS = 10V VDD = 65V ID = 58A RG =2.7 VGS = 10V VGS = 0V VDS = 50V = 1.0MHz, See Fig.5 VGS = 0V, VDS = 0V to 80V , See Fig.11 VGS = 0V, VDS = 0V to 80V

ns

pF

h g

Diode Characteristics
Symbol
IS ISM VSD trr Qrr IRRM ton

Parameter
Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time

Min. Typ. Max. Units

97 390 A A

Conditions
MOSFET symbol showing the integral reverse
G S D

Reverse Recovery Charge Reverse Recovery Current Forward Turn-On Time

1.3 V 38 57 ns 46 69 53 80 nC TJ = 125C 82 120 2.5 A TJ = 25C Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

p-n junction diode. TJ = 25C, IS = 58A, VGS = 0V TJ = 25C VR = 85V, TJ = 125C IF = 58A di/dt = 100A/s TJ = 25C

Notes: Repetitive rating; pulse width limited by max. junction temperature. Limited by TJmax, starting TJ = 25C, L = 0.143mH RG = 25, IAS = 58A, VGS =10V. Part not recommended for use above this value. ISD 58A, di/dt 610A/s, VDD V(BR)DSS, TJ 175C. Pulse width 400s; duty cycle 2%.

Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .

Coss eff. (ER) is a fixed capacitance that gives the same energy as R is measured at TJ approximately 90C.
Coss while VDS is rising from 0 to 80% VDSS .

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IRFB4410ZGPbF
1000
TOP VGS 15V 10V 8.0V 6.0V 5.5V 5.0V 4.8V 4.5V

1000
TOP VGS 15V 10V 8.0V 6.0V 5.5V 5.0V 4.8V 4.5V

ID, Drain-to-Source Current (A)

100

BOTTOM

ID, Drain-to-Source Current (A)

100

BOTTOM

4.5V

4.5V 10

10

60s PULSE WIDTH

Tj = 25C 1 0.1 1 10 100 V DS, Drain-to-Source Voltage (V)
1 0.1 1

60s PULSE WIDTH

Tj = 175C

10

100

V DS, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics

1000

Fig 2. Typical Output Characteristics

2.5
RDS(on) , Drain-to-Source On Resistance (Normalized)

ID, Drain-to-Source Current (A)

VDS = 50V 60s PULSE WIDTH 100

ID = 58A 2.0

VGS = 10V

10 TJ = 175C 1

T J = 25C

1.5

1.0

0.1 2 3 4 5 6 7

0.5 -60 -40 -20 0 20 40 60 80 100120140160180 T J , Junction Temperature (C)

VGS, Gate-to-Source Voltage (V)

Fig 3. Typical Transfer Characteristics

100000
VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd

Fig 4. Normalized On-Resistance vs. Temperature

12.0 ID= 58A
VGS, Gate-to-Source Voltage (V)

10.0 8.0 6.0 4.0 2.0 0.0

C, Capacitance (pF)

10000 Ciss Coss 1000 Crss

VDS= 80V VDS= 40V VDS= 20V

100 1 10 VDS, Drain-to-Source Voltage (V) 100

20

40

60

80

100

QG, Total Gate Charge (nC)

Fig 5. Typical Capacitance vs. Drain-to-Source Voltage

Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage

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IRFB4410ZGPbF
1000 1000
OPERATION IN THIS AREA LIMITED BY R DS(on)
100sec 1msec

100

T J = 175C

10 T J = 25C 1 VGS = 0V 0.1 0.0 0.5 1.0 1.5 2.0 2.5 VSD, Source-to-Drain Voltage (V)

ID, Drain-to-Source Current (A)

ISD, Reverse Drain Current (A)

100

10msec DC

10 Tc = 25C Tj = 175C Single Pulse 1 0 1 10 100 VDS, Drain-to-Source Voltage (V)

Fig 7. Typical Source-Drain Diode Forward Voltage

100
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)

Fig 8. Maximum Safe Operating Area

125 Id = 5mA 120 115 110 105 100 95 90 -60 -40 -20 0 20 40 60 80 100120140160180 T J , Temperature ( C )

80
ID, Drain Current (A)

60

40

20

0 25 50 75 100 125 150 T C , Case Temperature (C)

Fig 9. Maximum Drain Current vs. Case Temperature

2.0 1.8 1.6 1.4
EAS , Single Pulse Avalanche Energy (mJ)

Fig 10. Drain-to-Source Breakdown Voltage

1000 900 800 700 600 500 400 300 200 100 0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (C) ID 6.4A 9.4A BOTTOM 58A TOP

Energy (J)

1.2 1.0 0.8 0.6 0.4 0.2 0.0 -10 0 10 20 30 40 50 60 70 80 90 100 VDS, Drain-to-Source Voltage (V)

Fig 11. Typical COSS Stored Energy

Fig 12. Maximum Avalanche Energy vs. DrainCurrent

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IRFB4410ZGPbF
1
Thermal Response ( Z thJC ) C/W

D = 0.50 0.1 0.20 0.10 0.05 0.02 0.01 SINGLE PULSE ( THERMAL RESPONSE )
J J 1 R1 R1 2 R2 R2 C 1 2

Ri (C/W) i (sec) 0.237 0.000178 0.413 0.003772

0.01

Ci= i/Ri Ci i/Ri

Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 0.001 0.01 0.1

0.001 1E-006

1E-005

0.0001

t1 , Rectangular Pulse Duration (sec)

Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case

100
Duty Cycle = Single Pulse

0.01
Avalanche Current (A)

Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 150C and Tstart =25C (Single Pulse)

10

0.05 0.10

1 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming j = 25C and Tstart = 150C. 0.1 1.0E-06 1.0E-05 1.0E-04 tav (sec) 1.0E-03 1.0E-02 1.0E-01

Fig 14. Typical Avalanche Current vs.Pulsewidth

150 TOP Single Pulse BOTTOM 1.0% Duty Cycle ID = 58A

100

50

Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 14, 15). tav = Average time in avalanche. D = Duty cycle in avalanche = tav f ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
175

EAR , Avalanche Energy (mJ)

0 25 50 75 100 125 150 Starting T J , Junction Temperature (C)

PD (ave) = 1/2 ( 1.3BVIav) = DT/ ZthJC Iav = 2DT/ [1.3BVZth] EAS (AR) = PD (ave)tav

Fig 15. Maximum Avalanche Energy vs. Temperature

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IRFB4410ZGPbF
4.5
VGS(th), Gate threshold Voltage (V)
20
I = 39A F V = 85V R TJ = 25C _____

4.0 3.5 3.0 2.5 2.0 1.5 1.0 -75 -50 -25 0 25 50 75 100 125 150 175 200 T J , Temperature ( C ) ID = 150A ID = 250A ID = 1.0mA ID = 1.0A
IRRM (A)

15

TJ = 125C ----------

10

0 100 200 300 400 dif/dt (A/s) 500 600 700

Fig 16. Threshold Voltage vs. Temperature

20
IF = 58A V = 85V R T = 25C _____ J TJ = 125C ----------

Fig. 17 - Typical Recovery Current vs. dif/dt

400 350 300 250
I = 39A F V = 85V R TJ = 25C _____ TJ = 125C ----------

15

IRRM (A)

Qrr (nC)

10

200 150

100 50

0 100 200 300 400 dif/dt (A/s) 500 600 700

0 100 200 300 400 dif/dt (A/s) 500 600 700

Fig. 18 - Typical Recovery Current vs. dif/dt

450 400 350 300
Qrr (nC)
I = 58A F V = 85V R TJ = 25C _____ TJ = 125C ----------

Fig. 19 - Typical Stored Charge vs. dif/dt

250 200 150 100 50 0 100 200 300 400 dif/dt (A/s) 500 600 700

Fig. 20 - Typical Stored Charge vs. dif/dt

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IRFB4410ZGPbF
D.U.T
Driver Gate Drive

P.W.

Period

D=

P.W. Period VGS=10V

Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer

D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt

RG
dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test

VDD

VDD

+ -

Re-Applied Voltage

Body Diode

Forward Drop

Inductor Current Inductor Curent

Ripple 5% ISD

* VGS = 5V for Logic Level Devices Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET Power MOSFETs
V(BR)DSS
15V

tp

VDS

DRIVER

RG
20V

D.U.T
IAS tp

+ V - DD

0.01

I AS

Fig 22a. Unclamped Inductive Test Circuit

LD VDS

Fig 22b. Unclamped Inductive Waveforms

VGS
+
VDD D.U.T

90%

VGS
Second Pulse Width < 1s Duty Factor < 0.1%

10%

VDS
td(off) tf td(on) tr

Fig 23a. Switching Time Test Circuit

Fig 23b. Switching Time Waveforms

Id Vds Vgs

L
0

DUT
20K 1K
S

VCC
Vgs(th)

Qgodr

Qgd

Qgs2 Qgs1

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Fig 24a. Gate Charge Test Circuit

Fig 24b. Gate Charge Waveform

IRFB4410ZGPbF
Dimensions are shown in millimeters (inches)

TO-220AB Package Outline

TO-220AB Part Marking Information

@Y6HQG@) UCDTDT6IDSA7#" BQ7A Ir)Bssvvhir vqvphrChytrArr Ir)Qvhriyyvrvv vqvphrGrhqArr DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G` GPU8P9@ Q6SUIVH7@S 96U@8P9@) `2G6TU9DBDUPA 86G@I96S`@6S XX2XPSFX@@F Y2A68UPS`8P9@

TO-220AB packages are not recommended for Surface Mount Application. Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/ Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IRs Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.01/2009

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