PD - 91902A

IRF730A

SMPS MOSFET

HEXFET Power MOSFET

Applications
l Switch Mode Power Supply (SMPS)
l Uninterruptable Power Supply
l High speed power switching
Benefits
Low Gate Charge Qg results in Simple
Drive Requirement
l Improved Gate, Avalanche and dynamic
dv/dt Ruggedness
l Fully Characterized Capacitance and
Avalanche Voltage and Current
l Effective Coss Specified (See AN1001)

VDSS

Rds(on) max

ID

400V

1.0

5.5A

TO-220AB

G DS

Absolute Maximum Ratings

ID @ TC = 25C
ID @ TC = 100C
IDM
PD @TC = 25C
VGS
dv/dt
TJ
TSTG

Parameter

Max.

Continuous Drain Current, VGS @ 10V

Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torqe, 6-32 or M3 screw

5.5
3.5
22
74
0.6
30
4.6
-55 to + 150

Units
A
W
W/C
V
V/ns
C

300 (1.6mm from case )

10 lbfin (1.1Nm)

Typical SMPS Topologies:

l
l

Single Transistor Flyback Xfmr. Reset

Single Transistor Forward Xfmr. Reset
(Both US Line input only).

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1
5/8/00

IRF730A
Static @ TJ = 25C (unless otherwise specified)
Parameter
Min.
Drain-to-Source Breakdown Voltage
400
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient

RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
2.0

IDSS
Drain-to-Source Leakage Current

Gate-to-Source Forward Leakage

IGSS
Gate-to-Source Reverse Leakage

V(BR)DSS

Typ.

0.5

Max. Units
Conditions

V
VGS = 0V, ID = 250A

V/C Reference to 25C, ID = 1mA

1.0

VGS = 10V, ID = 3.3A

4.5
V
VDS = VGS, ID = 250A
25
VDS = 400V, VGS = 0V
A
250
VDS = 320V, VGS = 0V, TJ = 125C
100
VGS = 30V
nA
-100
VGS = -30V

Dynamic @ TJ = 25C (unless otherwise specified)

gfs
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss
Coss
Coss eff.

Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance

Min.
3.1

Typ.

10
22
20
16
600
103
4.0
890
30
45

Max. Units
Conditions

S
VDS = 50V, ID = 3.3A
22
ID = 3.5A
5.8
nC VDS = 320V
9.3
VGS = 10V, See Fig. 6 and 13

VDD = 200V

ID = 3.5A
ns

RG = 12

RD = 57,See Fig. 10

VGS = 0V

VDS = 25V

pF
= 1.0MHz, See Fig. 5

VGS = 0V, VDS = 1.0V, = 1.0MHz

VGS = 0V, VDS = 320V, = 1.0MHz

VGS = 0V, VDS = 0V to 320V

Avalanche Characteristics
Parameter
EAS
IAR
EAR

Single Pulse Avalanche Energy

Avalanche Current
Repetitive Avalanche Energy

Typ.

Max.

Units

290
5.5
7.4

mJ
A
mJ

Typ.

Max.

Units

0.50

1.70

62

C/W
62

Thermal Resistance
Parameter
RJC
RCS
RJA

Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient

Diode Characteristics
IS
I SM

VSD
t rr
Q rr
ton

Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time

Min. Typ. Max. Units

Conditions
D
MOSFET symbol
5.5
showing the
A
G
integral reverse

22
S
p-n junction diode.
1.6
V
TJ = 25C, IS = 5.5A, VGS = 0V
370 550
ns
TJ = 25C, IF = 3.5A
1.6 2.4
C di/dt = 100A/s
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

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IRF730A
100

100

VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V

I D , Drain-to-Source Current (A)

I D , Drain-to-Source Current (A)

10

0.1

4.5V

10

4.5V
0.1

20s PULSE WIDTH

TJ = 25 C

0.01
0.1

10

20s PULSE WIDTH

TJ = 150 C

0.01
0.1

100

10

100

VDS , Drain-to-Source Voltage (V)

VDS , Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics

Fig 2. Typical Output Characteristics

2.5

10

R DS(on) , Drain-to-Source On Resistance

(Normalized)

100

I D , Drain-to-Source Current (A)

VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP

TOP

TJ = 150 C

TJ = 25 C

0.1
4.0

V DS = 50V
20s PULSE WIDTH
5.0

6.0

7.0

8.0

9.0

10.0

VGS , Gate-to-Source Voltage (V)

Fig 3. Typical Transfer Characteristics

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5.9A
ID = 5.5

2.0

1.5

1.0

0.5

0.0
-60 -40 -20

VGS = 10V
0

20

40

60

80 100 120 140 160

TJ , Junction Temperature ( C)

Fig 4. Normalized On-Resistance

Vs. Temperature

IRF730A
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd

1000

Ciss
Coss

100

10

Crss
1

ID = 5.5
5.9A

16

VDS = 320V
VDS = 200V
VDS = 80V

12

FOR TEST CIRCUIT

SEE FIGURE 13

10

100

1000

10

15

20

25

QG , Total Gate Charge (nC)

VDS, Drain-to-Source Voltage (V)

Fig 6. Typical Gate Charge Vs.

Gate-to-Source Voltage

Fig 5. Typical Capacitance Vs.

Drain-to-Source Voltage

100

100

OPERATION IN THIS AREA LIMITED

BY RDS(on)
10us

10

TJ = 150 C

TJ = 25 C

0.1
0.4

I D , Drain Current (A)

ISD , Reverse Drain Current (A)

C, Capacitance(pF)

10000

20

VGS, Gate-to-Source Voltage (V)

100000

V GS = 0 V
0.6

0.8

1.0

VSD ,Source-to-Drain Voltage (V)

Fig 7. Typical Source-Drain Diode

Forward Voltage

10
100us

1ms
1
10ms

0.1

1.2

TC = 25 C
TJ = 150 C
Single Pulse
10

100

1000

VDS , Drain-to-Source Voltage (V)

Fig 8. Maximum Safe Operating Area

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IRF730A
6.0

VGS

5.0

I D , Drain Current (A)

RD

V DS

D.U.T.

RG

-V DD

4.0

10V
Pulse Width 1 s
Duty Factor 0.1 %

3.0

2.0

Fig 10a. Switching Time Test Circuit

1.0

VDS
90%

0.0
25

50

75

100

125

150

TC , Case Temperature ( C)

Fig 9. Maximum Drain Current Vs.

Case Temperature

10%
VGS
td(on)

tr

t d(off)

tf

Fig 10b. Switching Time Waveforms

Thermal Response (Z thJC )

10

D = 0.50
0.20
0.10
PDM

0.1

0.05
t1
0.02
0.01

0.01
0.00001

t2

SINGLE PULSE
(THERMAL RESPONSE)

0.0001

Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.001

0.01

0.1

t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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IRF730A
700

D R IV E R

VDS

D .U .T

RG

+
V
- DD

IA S
20V

EAS , Single Pulse Avalanche Energy (mJ)

1 5V

0 .0 1

tp

Fig 12a. Unclamped Inductive Test Circuit

V (B R )D SS
tp

TOP
600

BOTTOM

ID
2.5A
3.5A
5.5A

500

400

300

200

100

0
25

50

75

100

125

150

Starting TJ , Junction Temperature ( C)

IAS

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

Fig 12b. Unclamped Inductive Waveforms

QG

10 V

610

QGD

VG

Charge

Fig 13a. Basic Gate Charge Waveform

Current Regulator
Same Type as D.U.T.

50K
12V

.2F
.3F

D.U.T.

+
V
- DS

600
590
580
570
560
550
540

VGS

0.0

3mA

IG

ID

Current Sampling Resistors

Fig 13b. Gate Charge Test Circuit

V DSav , Avalanche Voltage ( V )

QGS

1.0

2.0

3.0

4.0

5.0

6.0

IAV , Avalanche Current ( A)

Fig 12d. Typical Drain-to-Source Voltage

Vs. Avalanche Current

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IRF730A
Peak Diode Recovery dv/dt Test Circuit
+

D.U.T

Circuit Layout Considerations

Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer

RG

dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test

Driver Gate Drive

P.W.

D=

Period

+
-

V DD

P.W.
Period
VGS=10V

D.U.T. ISD Waveform

Reverse
Recovery
Current

Body Diode Forward

Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt

Re-Applied
Voltage

Body Diode

VDD

Forward Drop

Inductor Curent
Ripple 5%

ISD

* VGS = 5V for Logic Level Devices

Fig 14. For N-Channel HEXFETS

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IRF730A
Package Outline
TO-220AB Outline
Dimensions are shown in millimeters (inches)
2.87 (.113)
2.62 (.103)

10.54 (.415)
10.29 (.405)

3.78 (.149)
3.54 (.139)
-A -

-B 4.69 (.185)
4.20 (.165)

1.32 (.052)
1.22 (.048)

6.47 (.255)
6.10 (.240)

4
15.24 (.600)
14.84 (.584)

1.15 (.045)
MIN
1

14.09 (.555)
13.47 (.530)

4.06 (.160)
3.55 (.140)

3X
3X

LE AD A S SIG NME NT S
1 - GA TE
2 - DR A IN
3 - S OU RCE
4 - DR A IN

1.40 (.055)
1.15 (.045)

0.93 (.037)
0.69 (.027)

0.36 (.014)

3X
M

B A M

2.54 (.100)
2X
N OT ES :
1 DIMEN S IONING & T OLE R AN CIN G PE R A NS I Y14.5M, 1982.
2 CO NT RO LLING D IMEN S ION : IN CH

0.55 (.022)
0.46 (.018)

2.92 (.115)
2.64 (.104)

3 OUT LINE C ONF O RMS T O JED EC O UT LIN E TO -220A B.

4 HE A TS IN K & LE A D ME AS UR E MEN TS D O NO T INC LU DE B U RRS .

Part Marking Information

TO-220AB
E X A M P L E : T H IS IS A N IR F 1 0 1 0
W IT H A S S E M B L Y
LOT CODE 9B1M

IN T E R N A T IO N A L
R E C T IF IE R
LOGO
ASSEMBLY
LOT CO DE

PART NUMBER
IR F 1 0 1 0
9246
9B
1M

D ATE C ODE
(Y Y W W )
Y Y = YE A R
W W = W EEK

Notes:

Repetitive rating; pulse width limited by

max. junction temperature. ( See fig. 11 )

Starting TJ = 25C, L = 19mH

RG = 25, IAS = 5.5A. (See Figure 12)

Pulse width 300s; duty cycle 2%.

Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS

ISD 5.5A, di/dt 90A/s, VDD V(BR)DSS,

TJ 150C

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
IR EUROPEAN REGIONAL CENTRE: 439/445 Godstone Rd, Whyteleafe, Surrey CR3 OBL, UK Tel: ++ 44 (0)20 8645
8000
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IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 (0) 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 011 451 0111
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IR SOUTHEAST ASIA: 1 Kim Seng Promenade, Great World City West Tower, 13-11, Singapore 237994 Tel: ++ 65 (0)838 4630
IR TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673 Tel: 886-(0)2 2377 9936
Data and specifications subject to change without notice. 5/00

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