Code No: RR311903 Set No.

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III B.Tech I Semester Supplementary Examinations, February 2007
MICROPROCESSORS AND INTERFACING
(Electronics & Computer Engineering)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
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1. (a) The 8086 processor internal architecture is divided into functional units. Ex-
plain the reason? Discuss the A-bus, B-bus and C-bus and their use?
(b) Discuss the use of control flags in 8086 processor? Explain what instruction
support is provided in the processor? [8+8]
2. (a) Explain with example how a far procedure is declared as PUBLIC? Show how
an external near procedure is called in main program?
(b) Discuss the assembler directives with examples? [6+10]
3. (a) What is the purpose of ALE, BHE, DT/R and DEN pins of 8086? Show
their timing in the system bus cycle of 8086?
(b) Why 8086 memory is mapped into 2 byte wide banks? What logic levels are
found with BHE and A0 when 8086 reads a word from the address 0A0AH?
[10+6]
4. (a) What is BSR mode operation? How it is useful in controlling the interrupt
initiated data transfer for mode 1 and 2?
(b) Explain the transistor buffer circuit used to drive 7-segment LEDs? [8+8]
5. (a) What are the MODEM control lines? Explain the function of each line?
Discuss how MODEM is controlled using these lines with necessary sequence
of instructions?
(b) Discuss the Command instruction and Status register format of 8251? [8+8]
6. (a) Draw the block diagram of 8259 and explain each block? Discuss the salient
features of 8259?
(b) What is the address map of interrupt address vector table? How many inter-
rupts that this table can serve? [11+5]
7. (a) What is a memory module? Draw the block diagram of SDRAM module and
explain each block?
(b) Why do you need wait states? Explain how wait states are generated?
(c) Give possible solutions to meet the processor access time requirements when
memory is interfaced to the processor? [7+4+5]
8. Interface two 8255’s to 8051 with starting address of 0FFF0H? Show the hardware
design? Write the instruction sequence to initialize all ports of 8255s as input ports
in mode 0. [16]

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Code No: RR311903 Set No. 1
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Code No: RR311903 Set No. 2
III B.Tech I Semester Supplementary Examinations, February 2007
MICROPROCESSORS AND INTERFACING
(Electronics & Computer Engineering)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
⋆⋆⋆⋆⋆

1. It is necessary to check the parity of the data byte in location 4000H:01FEH. If the
parity is even store 00H otherwise store 0FFH in location 5000H:1000H. Give the
instruction sequence for every addressing mode to achieve the above result. [16]

2. (a) What are the different ways of passing parameters to and from procedures?
Explain the methods with examples in assembly language?
(b) Give a neat flow chart and the corresponding 8086 assembly language program
for performing bubble sort in an array of N elements of 4-digit Hex numbers.
[7+9]

3. Explain the following data transfer schemes.

(a) Programmed I/O

(b) Interrupted I/O
(c) DMA [5+5+6]

4. It is necessary to initialize interrupt for mode 1 operation of port-A as input and

port-B as output in the same mode with the 8255 address map of 0400H to 0700H.
Give the complete hard ware design to interface 8255 to 8086 processor with this
address map? Write the instruction sequence for the initialization of 8255 in the
above modes? Give the instruction sequence to change the operation modes of port
A, port C lower-half and Port B to mode 0 input ports? [16]

5. (a) Why are the two ground pins on an RS-232C connector not just tied together?
(b) Explain the RS-232C to TTL interfacing?
(c) Write a sequence of instructions to communicate to a modem using 8251 at
address 080H. [4+5+7]

6. (a) How many initialization command words are required for a single 8259 in an
8086 based system? Explain their format?
(b) Under what conditions type 0 interrupt is initiated? List out the instructions
that may cause type 0 interrupt? [10+6]

7. A target system based on 8088 processor uses less amount of SRAM. The programs
are stored in EPROM that starts from F0000H ends with the address of FFFFFH.
The capacity of SRAM is 8KB interfaced at address 00000H. The chip size is 8KB
for EPROM and SRAM. Show the complete memory interface? [16]

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Code No: RR311903 Set No. 2
8. (a) Draw and discuss the formats and bit definitions of the following SFRs in 8051
microcontroller?
i. SCON
ii. TCON [4x2=8]
(b) Discuss the following signal descriptions?
i. ALE/PROG
ii. EA/Vpp
iii. P SEN
iv. RXD [2x4=8]

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Code No: RR311903 Set No. 3
III B.Tech I Semester Supplementary Examinations, February 2007
MICROPROCESSORS AND INTERFACING
(Electronics & Computer Engineering)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
⋆⋆⋆⋆⋆

1. (a) Compare 8 bit processors and 16 bit processors from the architectural view.
(b) Explain Overflow condition with 8 bit signed data. Generate Overflow flag
using other flags of 8086? [6+10]

2. (a) Develop a far procedure declared as PUBLIC to convert a 4-digit BCD number
to its equivalent hex number?
(b) Develop a near procedure to find the GCD of two numbers of 2-digit Hex. Use
this procedure to find the GCD of three numbers? [8+8]

3. (a) Discuss the system bus cycle of 8086 with a neat diagram? What is the use
of wait cycles? Compare wait and idle cycles?
(b) Show the circuit required to generate the upper and lower I/O strobes in
minimum and maximum modes of 8086? [8+8]

4. Interface a 12-bit DAC to 8255 with an address map of 0C00H to 0C03H. The DAC
provides output in the range of +5V to -5V. Write the instruction sequence.

(a) For generating a square wave with a peak to peak voltage of 4V and the
frequency will be selected from memory location ‘F’.
(b) For generating a triangular wave with a maximum voltage of +3V and a
minimum of -2V. [6+10]

5. (a) Explain different modes of DMA transfer supported by 8237?

(b) Draw the block diagram of 8251 and explain each block? [8+8]

6. (a) What are the five types of interrupts supported by 8086?

(b) Write about interrupt vectors? How many bytes of memory does an interrupt
vector requires?
(c) Address 000E0H in the interrupt vector table contains 4132H and address
000E2H contains 0040H.
i. To what interrupt type do these locations correspond?
ii. What is the starting address for the interrupt service routine?[9+3+2+2]

7. It is necessary to interface 512KB SRAM and 128KB EPROM to an 8086 based

system. The size of SRAM and EPROM chips is 64KB. Address of SRAM starts
from 00000H and that of EPROM is from E0000H. Design the entire memory
interface? Give the address map of individual chip? [16]

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Code No: RR311903 Set No. 3
8. Discuss the following signal descriptions?

(a) ALE/PROG
(b) EA/VP P
(c) P SEN
(d) RXD
(e) INTo / INT1
(f) TXD
(g) T0 AND T1
(h) RD [8x2=16]

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Code No: RR311903 Set No. 4
III B.Tech I Semester Supplementary Examinations, February 2007
MICROPROCESSORS AND INTERFACING
(Electronics & Computer Engineering)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
⋆⋆⋆⋆⋆

1. (a) Discuss the use of control flags in 8086 processor? Explain what instruction
support is provided in the processor?
(b) Explain how debugging feature is provided in 8086 using Trap Flag? [10+6]

2. (a) Explain with example how a far procedure is declared as PUBLIC? Show how
an external near procedure is called in main program?
(b) Discuss the assembler directives with examples? [6+10]

3. Describe the function of the following pins and their use in 8086 based system.

(a) DEN
(b) LOCK
(c) T EST
(d) READY [4 x 4 = 16]

4. Explain how eight seven-segment display devices and hex keyboard can be inter-
faced to microprocessor using common scan lines? Draw the flow chart of the
keyboard scan routine and display routine for this system? [7+7+2]

5. (a) With a neat sketch explain 8237 DMA controller and its operation? [8]
(b) How do we connect RS-232C equipment
i. To data terminal type devices?
ii. To serial port of SDK 86, RS-232C connection? [4+4]

6. With detailed hardware and the associated algorithm, explain how a real time clock
will be implemented in an 8086 based system. [16]

7. (a) With a neat sketch explain the function of memory array of PROM?
(b) Draw the basic cell structure of EPROM and explain the principle of opera-
tion?
(c) Distinguish between EPROM and E 2 PROM? Mention their application areas?
[5+5+6]

8. Draw and discuss the formats and bit definitions of the following SFR’s in 8051
microcontroller?

(a) PSW

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Code No: RR311903 Set No. 4
(b) IE
(c) SCON
(d) TMOD [4x4=16]

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