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    74LS42 PDF

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    Deni Khan
    The document summarizes the SN54/74LS42 one-of-ten decoder integrated circuit. It can accept four binary-coded decimal (BCD) inputs and provide ten mutually exclusive active-low outputs. It is fabricated using Schottky barrier diode technology for high speed and is compatible with Motorola TTL families. Key specifications and characteristics are provided such as pinouts, logic diagram, truth table, propagation delay times and DC/AC parameters.

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    74LS42 PDF

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    Deni Khan
    349 views3 pages
    The document summarizes the SN54/74LS42 one-of-ten decoder integrated circuit. It can accept four binary-coded decimal (BCD) inputs and provide ten mutually exclusive active-low outputs. It is fabricated using Schottky barrier diode technology for high speed and is compatible with Motorola TTL families. Key specifications and characteristics are provided such as pinouts, logic diagram, truth table, propagation delay times and DC/AC parameters.

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    The document summarizes the SN54/74LS42 one-of-ten decoder integrated circuit. It can accept four binary-coded decimal (BCD) inputs and provide ten mutually exclusive active-low outputs. It is fabricated using Schottky barrier diode technology for high speed and is compatible with Motorola TTL families. Key specifications and characteristics are provided such as pinouts, logic diagram, truth table, propagation delay times and DC/AC parameters.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    349 views3 pages

    74LS42 PDF

    Uploaded by

    Deni Khan
    The document summarizes the SN54/74LS42 one-of-ten decoder integrated circuit. It can accept four binary-coded decimal (BCD) inputs and provide ten mutually exclusive active-low outputs. It is fabricated using Schottky barrier diode technology for high speed and is compatible with Motorola TTL families. Key specifications and characteristics are provided such as pinouts, logic diagram, truth table, propagation delay times and DC/AC parameters.

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    SN54/74LS42 ONE-OF-TEN DECODER

    The LSTTL / MSI SN54 / 74LS42 is a Multipurpose Decoder designed to accept four BCD inputs and provide ten mutually exclusive outputs. The LS42 is fabricated with the Schottky barrier diode process for high speed and is completely compatible with all Motorola TTL families.

    ONE-OF-TEN DECODER
    LOW POWER SCHOTTKY

    Multifunction Capability Mutually Exclusive Outputs Demultiplexing Capability Input Clamp Diodes Limit High Speed Termination Effects

    CONNECTION DIAGRAM DIP (TOP VIEW)


    VCC 16 A0 15 A1 14 A2 13 A3 12 9 11 8 10 7 9
    NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package. 16 1

    J SUFFIX CERAMIC CASE 620-09

    1 0

    2 1

    3 2

    4 3

    5 4

    6 5

    7 6

    8 GND

    16 1

    N SUFFIX PLASTIC CASE 648-08

    PIN NAMES

    LOADING (Note a) HIGH LOW 0.25 U.L. 5(2.5) U.L.


    16 1

    A0 A3 0 to 9

    Address Inputs Outputs, Active LOW (Note b)

    0.5 U.L. 10 U.L.

    D SUFFIX SOIC CASE 751B-03

    NOTES: a) 1 TTL Unit Load (U.L.) = 40 A HIGH/1.6 mA LOW. b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74) Temperature Ranges.

    ORDERING INFORMATION
    SN54LSXXJ SN74LSXXN SN74LSXXD Ceramic Plastic SOIC

    LOGIC DIAGRAM
    A0
    15

    A1
    14

    A2
    13

    A3
    12

    LOGIC SYMBOL
    15 14 13 12

    A0

    A1

    A2

    A3

    0 1 2 3 4 5 6 7 8 9

    10

    11

    1 2 3 4 5 6 7 9 10 11 VCC = PIN 16 GND = PIN 8

    VCC = PIN 16 GND = PIN 8 = PIN NUMBERS

    FAST AND LS TTL DATA 5-1

    SN54/74LS42
    FUNCTIONAL DESCRIPTION
    The LS42 decoder accepts four active HIGH BCD inputs and provides ten mutually exclusive active LOW outputs, as shown by logic symbol or diagram. The active LOW outputs facilitate addressing other MSI units with LOW input enables. The logic design of the LS42 ensures that all outputs are HIGH when binary codes greater than nine are applied to the inputs. The most significant input A3 produces a useful inhibit function when the LS42 is used as a one-of-eight decoder. The A3 input can also be used as the Data input in an 8-output demultiplexer application.

    TRUTH TABLE
    A0 L H L H L H L H L H L H L H L H A1 L L H H L L H H L L H H L L H H A2 L L L L H H H H L L L L H H H H A3 L L L L L L L L H H H H H H H H 0 L H H H H H H H H H H H H H H H 1 H L H H H H H H H H H H H H H H 2 H H L H H H H H H H H H H H H H 3 H H H L H H H H H H H H H H H H 4 H H H H L H H H H H H H H H H H 5 H H H H H L H H H H H H H H H H 6 H H H H H H L H H H H H H H H H 7 H H H H H H H L H H H H H H H H 8 H H H H H H H H L H H H H H H H 9 H H H H H H H H H L H H H H H H

    H = HIGH Voltage Level L = LOW Voltage Level

    GUARANTEED OPERATING RANGES


    Symbol VCC TA IOH IOL Supply Voltage Operating Ambient Temperature Range Output Current High Output Current Low Parameter 54 74 54 74 54, 74 54 74 Min 4.5 4.75 55 0 Typ 5.0 5.0 25 25 Max 5.5 5.25 125 70 0.4 4.0 8.0 Unit V C mA mA

    FAST AND LS TTL DATA 5-2

    SN54/74LS42
    DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
    Limits S b l Symbol VIH VIL VIK VOH P Parameter Input HIGH Voltage 54 Input LOW Voltage 74 Input Clamp Diode Voltage 54 Output HIGH Voltage 74 54, 74 VOL Output LOW Voltage 74 Input HIGH Current 0.1 Input LOW Current Short Circuit Current (Note 1) Power Supply Current 20 0.4 100 13 0.35 0.5 20 IIH IIL IOS ICC V A mA mA mA mA 2.7 3.5 0.25 0.4 V V 2.5 0.65 3.5 0.8 1.5 V V Min 2.0 0.7 V Typ Max U i Unit V T Test C Conditions di i Guaranteed Input HIGH Voltage for All Inputs Guaranteed Input p LOW Voltage g for All Inputs VCC = MIN, IIN = 18 mA , IOH = MAX, , VIN = VIH VCC = MIN, or VIL per Truth Table IOL = 4.0 mA IOL = 8.0 mA VCC = VCC MIN, VIN = VIL or VIH per Truth Table

    VCC = MAX, VIN = 2.7 V VCC = MAX, VIN = 7.0 V VCC = MAX, VIN = 0.4 V VCC = MAX VCC = MAX

    Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.

    AC CHARACTERISTICS (TA = 25C)


    Limits S b l Symbol tPLH tPHL tPLH tPHL P Parameter Propagation Delay (2 Levels) Propagation Delay (3 Levels) Min Typ 15 15 20 20 Max 25 25 30 30 U i Unit ns ns Figure 2 Figure 1 VCC = 5.0 V CL = 15 pF T Test C Conditions di i

    AC WAVEFORMS

    VIN

    1.3 V tPHL

    1.3 V tPLH 1.3 V 1.3 V

    VIN

    1.3 V tPHL

    1.3 V tPLH 1.3 V

    VOUT

    VOUT

    1.3 V

    Figure 1

    Figure 2

    FAST AND LS TTL DATA 5-3

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