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WB Coursepart 2

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Bond Strength Measurement Techniques

Tensile & Shear Load Test Thin Film Bond – Tensile Load Test

Tensile Force Thin Film Adhesive


Shear Force
Adhesive Wafer 1

Bonded Dies Adhesive

Tensile Force
Shear Force
Tensile Force

Crack Opening Test Blister Test


Blade
Adhesive
Wafer 2 Wafer 2

Wafer 1 Adhesive Wafer 1 Wafer 1

Pressure

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Bond Strength and
Crack Propogation
• Bond strength can be estimated from crack
length measurements
• Inserting a blade of known thickness
between wafers will cause bond fracture of
a length related to the bond strength
• Very large error on this measurement

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Wafer Bond Strength

Note: E = bulk modulus, t = wafer thickness, and y = blade tip radius


are all known quantities. The crack length L needs to be measured to
determine the bond energy, γ. The 4th power dependence means this is
not an accurate technique

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Bond Strength and
Crack Propogation
Crack Length vs. Bond energy

100000
surface energy Jm-2

10000
1000
100
10
1
0.1 0 0.005 0.01 0.015 0.02

crack length m

ref 20

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Anodic Bonding: Advantages
over Direct Bonding
• Anodic Bonding temperature typically 400oC compared
with ~1000oC for fusion (Note that this advantage is
reversed with the new plasma activated direct bonding)
• Surface roughness requirement for fusion bonding is ~ few
Ångströms compared with a few 10’s nm for anodic bonding
(4)
• Anodic bonding more tolerant of surface particles and is
generally a more robust process

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Anodic Bonding: Drawbacks compared
with Direct Bonding
• Silicon thermal expansion is not an exact match with glass
therefore some stress in bonded wafers

• Direct bonded wafers have higher temperature capability


whereas anodic bonding limited by strain point of the glass

• Direct bonded wafers can be used for subsequent IC processing,


whereas the anodic bonding process introduces alkali metal ions:
not allowed for CMOS processing (but AML working on process
to overcome this)

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Comparison of Other Various Wafer
Bonding Techniques

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Types of Wafer Bonding

Wafer bonding processes to be compared:


• Anodic bonding
• Direct (fusion) bonding
• Glass frit bonding
• Eutectic bonding
• Adhesive bonding
• Solder Bonding

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Glass Frit Bonding
This process involves the deposition of a layer that
contains glass frit on one of the surfaces to be bonded
The frit can be spun-on, screen printed or applied as a pre-
form tape
The process typically involves controlled ramp heating
and dwells at set temperatures to drive off the bonding
material
Wide range of glass frits available with different reflow
temperatures and thermal expansion coeff’s.

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Glass Frit Bonding
The most widely used glass fritfor MEMS is Ferro’s FX11-
036. This can be used for bonding silicon, glass and quartz.
Drawbacks of FX11-036 are :
1. relatively high process temperature (450C)
2. material contains lead

New low temperature (320C) glass frit (DM2700P/H848)


and also lead-free glass frits (DM2995P/J141) have recently
become available

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Glass Frit Bonding

One of the main reasons for using glass frit


bonding is for achieving hermetic sealing on
substrates with high topography or with a
multitude of conducting lateral feedthroughs. The
only other bonding option in this case is adhesive
and this does not exhibit hermeticity
Can achieve vacuums of 1mBar

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Glass Frit Bonding

Organic Burn-out and Glazing Profile for DM2995P/J141

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Glass Frit Bonding

Sealing Profile for DM2995P/J141

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Lead-free frit properties (1 of 3)

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Lead-free frit properties (2 of 3)

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Lead-free frit properties (3 of 3)
Sealing Time and Temperature Options (a) lead-free, (b) low T

(a)

(b)

Glazing and sealing profiles may vary depending on the size


and thermal properties of the components being processed.

Clean, dry air atmosphere is preferred. Nitrogen


atmosphere may require higher process temperatures or
longer process times.

Vacuum atmosphere should be avoided.


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Anodic Bonding: Comparison
with Glass Frit Bonding
Advantages:
• No glass flow, therefore better dimensional control for
micromachined cavities etc.
• Process temperature lower (for Si wafers) compared
with 400 - 500oC for frit bonding
• typically shorter cycle times
• Precise contact forces not needed for anodic bonding
Drawbacks:
• Frit bonding can produce better vacuums
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Eutectic Bonding
¾Eutectic bonding can be performed with a wide range of
alloys.

¾The eutectic composition of an alloy is the composition with


the minimum melting point, and the eutectic temperature is the
temperature at which this composition melts.

¾The standard methodology for eutectic bonding is to have one


substrate (wafer 1) coated with a thin film of eutectic
composition, and the other substrate (wafer 2) to be bonded,
coated with a thin film of one of the two constituents of the
eutectic material.

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Eutectic Bonding

Binary alloy phase


diagram

The lowest
melting
point is at the
eutectic
concentration

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Eutectic Bonding
¾The wafers are brought into contact at a temperature just below
the eutectic temperature and a force, typically ~2kN, applied.

¾The wafers are then heated to above the eutectic temperature


and the eutectic composition on wafer 1 will melt and material
from the coating on wafer 2 will begin to dissolve into the melt.

¾This changes the composition to a non-eutectic state and the


material solidifies to form a bonding layer with a higher reflow
temperature than the eutectic temperature.

¾This results in a controllable, reproducible process and


resulting bond that has higher temperature performance than the
original M.P.
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AuSn Eutectic Bonding

¾The most commonly used material combination for


eutectic bonding of this type is Au:Sn.

¾The phase diagram shows that the desired 280 ° C AuSn


eutectic point is at 20% wt tin, and has steep walls.

¾A 1% shift in the AuSn solder composition to the Au rich


area can raise the melting point of the solder 30 ° C,
making the solder unusable. [ref ]

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AuSn Eutectic Bonding

Au:Sn Phase Diagram


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Depositing the Eutectic Layer (1/4)
Stamped AuSn Solder Preforms
¾The minimum preform size is 25 microns thickness and 1mm
x 1mm areas - due to difficulties in preform stamping and
handling.

Vacuum-Deposited AuSn Preforms


¾Deposit alternate layers of gold and tin until the target deposit
thickness and metal stoichiometry are reached.
¾Thin deposits are common (less than 1µm) and are usually
made up of gold and tin layers from 0.1-0.5µm thick.
¾Gold is used for the top layer to protect the tin from oxidation
while ensuring solderability during reflow.
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Depositing the Eutectic Layer (2/4)
Paste Screening AuSn Preforms
¾Solder pastes are comprised of 80:20 alloy spheres with a
thixotropic carrier material to support the spheres and fluxing
agents.
¾Metal content is controlled to ±1%
¾The solder feature size, volume, and placement accuracy are
limited to the capabilities of the selected screen printing process.
¾Drawback of paste is the need for flux. When using flux there
is always the possibility of out-gassing volatile compounds that
may condense on the device surfaces or be trapped inside the
package.
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Depositing the Eutectic Layer (3/4)
Electroplated AuSn Preforms
¾photoresist defines the shape, thickness and location
of the desired solder deposit.
¾Gold and tin are then sequentially plated in steps
alternating between gold and tin.
¾Alternating Au and Sn plating layers, deposited in a
1.5:1 thickness ratio of Au to Sn, are necessary to
achieve the proper 80Au:20Sn stoichiometric ratio.
¾The outer plated surface is always gold to insure
proper wetting and reflow of the solder and substrate
metalization during assembly.
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Depositing the Eutectic Layer (4/4)
With the proper selection of plating tools and
chemistry it is possible to deposit AuSn solder
features with a liquidus onset consistency of
±1°C. Solder features as small as 20 microns,
with pitches as close as 5 microns, can be
deposited at wafer scale with dimensional
variations of better than ±5.0 %.

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AuSn Eutectic Bonding
Benefits & Drawbacks
Benefits
¾Can be performed at temperatures as low as 300oC
therefore compatible with wide range of materials
¾Metallic bond has high strength & good hermeticity
Drawbacks
¾Not compatible with lateral feedthroughs
¾Exact (<1%) compositional control required

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AuSn Eutectic Bonding
Example of Bond Quality

Obtained
using
Bonder with
Good platen
parallelism
and good
force
uniformity

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AuSn Eutectic Bonding
Example of Bond Quality

Obtained
using
Bonder with
poor platen
parallelism
and poor
force
uniformity

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Anodic Bonding: Comparison
with AuSn Eutectic Bonding
Advantages:
•No pre-forms or deposited interlayers required
Compatibility with conducting leadthroughs

Drawback:
AuSn bonding can be performed at ~300C – but very important
to have exact eutectic composition

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Types of Eutectic Bonding

(Ref 42)
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AuSi Eutectic Bonding
¾Only need to gold coat one of the two wafers
(assuming that we are bonding silicon wafers).
¾The silicon substrate itself provides the material
for forming the AuSi eutectic.
¾For this reason it is important that the silicon is
not covered by an oxide.
¾Standard practice is to dip the silicon in dilute or
buffered HF prior to bonding in order remove any
native oxide.

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AuSi Eutectic Bonding
¾Quality of the thin film deposition is important
¾The deposited layer should be low stress and
include a diffusion barrier to prevent the movement
of unwanted material to the surface.
¾If the process is performed correctly then high
quality, strong bonds can be realised.
¾Vacuum cavities in 10-4 mBar range have been
achieved [Ref 42)].

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AuSi Eutectic Bonding

Example of AuSi eutectic bonds (in-situ pre-


treatment of wafer surfaces to remove native oxide
prior to bonding
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AuSi Eutectic Bonding (Ref 42)

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AuSi Eutectic Bonding (Ref 42)

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AuSi Eutectic Bonding (Ref 42)

μ-probe analysis of TiAu-Si bond


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AuSi Eutectic Bonding (Ref 42)

SEM cross section of CrAu-Si bond


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AuSi Eutectic Bonding (Ref 42)

SEM cross section of NiAu-Si bond

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AuSi Eutectic Bonding (Ref 42)

SEM cross section of TiPtAu-Si bond


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AuSi Eutectic Bonding (Ref 42)

VABOND Conclusion
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Anodic Bonding: Comparison
with AuSi Eutectic Bonding
Advantages:
• Anodic bonding can be used for Si that has surface coatings
whereas eutectic bonding requires bare silicon
• No pre-forms or deposited interlayers required
• Compatibility with conducting leadthroughs

Note: process temperatures are comparable for the two processes

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Anodic Bonding: Comparison
with AuSi Eutectic Bonding
•Au-Si eutectic
temperature 370ºC
at 31% Au in Si
Bonding
temperature is well
below Al
interconnect
melting point

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