Basic Electronics:: Carnegie Mellon Lab Manual
Basic Electronics:: Carnegie Mellon Lab Manual
ii
Contents
1 DC
1.1
1.2
1.3
1.4
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1
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3
4
5
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15
15
21
22
23
Response
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29
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34
34
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41
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43
44
45
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49
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57
57
60
5 AC
5.1
5.2
5.3
5.4
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iii
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CONTENTS
iv
6.3
6.4
Ampliers
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62
62
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67
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71
72
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79
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81
82
83
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93
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96
96
97
10 The
10.1
10.2
10.3
10.4
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101
101
103
104
105
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113
113
113
114
115
Digital
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Circuits
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PB10 Proto-board
125
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
Connections on the PB10 Proto-board . . . . . . . . . . . . . . . . . . . . . . . 126
Hints on wiring circuits on the PB10 Proto-board . . . . . . . . . . . . . . . . . 127
B Component Labels
B.1 Resistor Codes . . . .
B.2 Capacitors . . . . . . .
B.3 Semiconductor Labels
B.4 Diodes . . . . . . . . .
B.5 Transistors . . . . . .
B.6 Integrated Circuits . .
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129
129
132
135
136
138
139
Foreword
The laboratory projects described in this manual are the basis of the electronics course taught
at Carnegie Mellon University. The labs follow the textbook Basic Electronics: An Introduction
to Electronics for Science Students by Curtis A. Meyer and span topics from simple DC circuits
through an introduction to digital electronics. The lab course meets about twice per week for
three hours at a time and will cover all eleven labs in this manual.
Each lab starts with short section identifying which material in the textbook is related to
the lab and what the goals are from the particular lab. This is followed by an introduction to
the material covered in the lab which tried to summarize that found in the textbook. After the
introduction is a Section which contains preliminary lab questions. These questions are based
on the material in the introduction and should be answered before starting to work on your
lab. This Section is followed by one which lists the equipment and parts that are needed for
the lab. The nal section in each lab is the procedure that you will follow in doing the lab. You
will nd italicised questions throughout the procedure which should be answered in your lab.
Your lab work will be recorded in a lab book that is provided in lab. Do your preliminary
lab questions in this book and then have an instructor sign o that they have been completed.
The actual work should be recorded in your lab book in ink, although you may tape in printouts
of data spread sheets and computer-generated plots of your data. A lab book should roughly
follow the following organization.
1. Your preliminary lab questions with an instructors signature to verify that this has been
accurately completed. This accounts for 10% of your labs score.
2. An introduction/purpose for the lab which identies the goals of this lab. This should
be at most a three-to-four sentence description of what you will be doing and what you
expect to learn from this lab. This accounts for 5% of your labs score.
3. A procedure of how you did this lab. This should be a short description of how you set up
the lab. It MUST include relevant circuit diagrams. It is also a good place to include the
measured values of all the components that you are using. Finally, you should summarize
the measurements that you will be making. eg We will measure the frequency response
of the circuit by using a measured input signal and scanning over a frequency range from
1 to 1,000,000 Hz. We will measure the input voltage, the output voltage and the phase
dierence between the input and the output using our oscilloscope. Do not write a novel,
but write enough information that you can set up and repeat your measurement using
only your lab book. If there are multiple sections to the lab, you need a procedure for
each section. This accounts for 10 to 20% of your labs score.
v
CONTENTS
vi
4. Your data and preliminary plots to show the data that you collected. This should contain
the data that you collected during the lab which is either in hand-written, properly labeled
tables, or from a printed out spreadsheet. Be sure this are labeled including units. This
section can also contain neat, hand-drawn sketches of the data to help identify where you
need to collect additional data points. These are not your analysis plots, they only help
you identify when the data are changing rapidly and allow you to collect additional points
if needed. Finally, if there were problems encountered during data collection, mention
them here, and describe how they were resolved. This accounts for 10 to 30% of your
labs score.
5. Your analysis and discussion of your data is a very important part of your lab. This
section should include computer-generated plots of your data. If possible, you should
also overlay the expected theoretical curves on top of your data and comment on where
things agree and disagree. For major disagreements, there should be some additional
discussion as to why this occurred. This section should also contain any calculations that
you need to carry out, and if their are theoretical expectations, it should contain the
mathematical formula that are needed. You do not need to derive the formulas, but the
formulas must be present in your lab book. This accounts for 20 to 50% of your labs
score.
6. As noted above, there are questions throughout the lab write up. It is necessary to answer
these questions in your lab book. This can be done when they are encountered, or you
can do it in a dedicated section in your report. These questions are enclosed in boxes
in the text that leave sucient space for you to write the answer. You may nd this a
convenient way of making sure that you have answered all these question. You can then
copy the answers into your lab book. These questions account for about 10% of your
labs score.
Is this enough space for an answer?
7. All work needs a summary or a conclusion. What did you learn in the lab? This section
should contain a brief description of what you learned in the lab. It should also summarize
how well your lab agreed with expectations. You may also make suggestions for improving
your procedure. This accounts for 5% of your labs score.
In order to help you in the early labs, sections on data collection have been provided in labs
1, 2, 3 and 4. These give a suggested data table for collecting some of your data, as well as
provided a few hints in data collection. It is expected that by the end of lab 4, you will have
mastered this material and are expected to be able to do this your self in the remaining labs.
We have also provided an Appendix to this lab manual which describes the proto-board
that is used to build your circuits. Before starting the rst lab, it is advisable that you read
through this Appendix to become familiar with the board.
Chapter 1
1.1
Introduction
The electrical current, I, through a circuit element is almost always related to electric elds
resulting from the application of a voltage, V , across the circuit element. The potential energy
dierence across the circuit element for a charge Q is just QV . Increasing V across a device
corresponds to increasing the average electric eld inside the device. The actual electric eld
inside the device may be highly non-uniform and depend on the arrangement and properties of
the materials within the object. However, the behavior of a circuit element within a circuit is
generally determined by the relationship between I and V without detailed knowledge of the
actual electric eld. In this lab, you will study the relationship between I and V for a variety
of devices.
The I-V curve of a circuit element or device may be obtained in the following manner.
First, the element is connected to an external power source such as a variable voltage power
supply. Next, the current through the device, I, and the voltage across the device, V , are
1
measured. The external power supply is then varied so I and V are changed and the new
values are measured. This procedure is repeated and the points are plotted on a graph of I vs
V . The curve which connects these points is called the I-V curve for the device being tested.
Linear devices have I-V curves that are straight lines. For many devices, the response
or current through the device is proportional to the input or voltage across the device over
a broad range and their I-V curves obey Ohms law:
V = IR.
(1.1)
Devices which obey Ohms law are called resistive elements. Other elements may have nonlinear I-V curves or response. In some cases the response is not even symmetric about zero
voltage (the response depends on the polarity of the applied voltage).
For direct current, power dissipation can always be written as
P = V I.
(1.2)
This is just the potential energy change per charge (V ) times the amount of charge per second
(I) passing through. For resistive elements, this reduces, using Ohms law, to
P = V I = I 2R =
V2
.
R
(1.3)
Any of these forms can be used for resistors choose the most convenient for your purposes.
For non-linear devices, you have to use (1.2).
1.2
The work in this section must be completed and signed o by an instructor before you start
working on the lab. Do this work in your lab book.
1. Carefully plot the I V curve of an ideal resistor of R = 100 for voltage values
between 0 and 15 Volts. Be sure to label all axis and put the correct values on them.
2. Two resistors, R1 and R2 are placed in series, what is the equivalent resistance of the
two?
3. Three resistors, R1 , R2 and R3 are placed in parallel. Sketch the circuit represented
by this. What is the equivalent resistance of the three? Sketch the equivalent circuit.
1.3
In this lab we will utilize the following equipment. This equipment is located at your lab
station.
1. The Global Specialities 1302 DC Power supply.
2. The Metex 4650 digital meter.
3. The Global Specialities PB10 proto-board (see Appendix A for a description).
You will also need the following components in order to carry out this lab. It makes more sense
to get them as you need them, rather than all at once before the start of the lab.
1. A 10 resistor.
2. A 47 resistor.
1.4. PROCEDURE
3. A 100 resistor.
4. Two 1 k resistor.
5. A 10 k resistor.
6. 4 precision 10 k resistors.
7. 5 precision 20 k resistors.
8. A 1 k potentiometer.
9. A 10 k potentiometer.
10. A low-current light-emitting diode.
11. Either a 5.6 V or a 7.2 V Zener diode, depending on what is available.
12. A light bulb.
13. An AA 1.5 V battery.
14. Assorted wires for connections.
1.4
1.4.1
Procedure
I-V (current-voltage) curves of passive circuit elements
A passive element is a two-contact device that contains no source of power or energy; an element
that has a power source is called an active element. In the rst part of the laboratory, you
are to measure and plot the current vs. voltage curve for various passive circuit elements. You
are also to plot the power dissipation in each element vs. applied voltage.
You need to decide which of the circuit elements are resistive and which are not resistive.
For those elements which are resistive, determine the resistance, R. To do these measurements,
you will connect the device under test to a variable voltage power supply and measure I and
V as you vary the voltage control of the power supply. Use the circuit shown in Fig. 1.1.
1k
0 15V
V VX
A
I IX
Figure 1.1: The setup for measuring the IV curve for a passive element, X. The objects labeled A
and V are ammeters (ampere-meters) and voltmeters, respectively. The voltage supply is a variable
one with a range from 0 to 15 Volts.
In this rst lab, your rst challenge is to correctly wire these circuits on the proto-board at
your station. A description of the internal connections of this board can be found in Appendix A
of this lab manual. If you havent done this before, have the instructor check your wiring before
switching on the power supply. Make a table of all your data points and plot them as you go
along. Reverse the polarity of the applied voltage by reversing the orientation of the element;
this allows you to do measurements from 15 to +15 volts on the supply.
Use the circuit of Fig. 1.1 to measure the I-V curves and the power dissipation of the
following elements. When making these measurements, record the Applied Voltage from the
supply, the voltage across the device from the volt meter, and the current through the device.
10k resistor
1k resistor
47 resistor
7V Zener diode
low current LED
light bulb (replace the 1k resistor in Fig. 1.1 with 100 )
Data Collection: In this section of the lab, we want to collect data to allow us to measure
the I V curves of the passive elements, X in Figure 1.1. In order to do this, we need to
record the voltage, VX , across the element X and the current IX through the element X. It
would also be advisable to record the supply voltage, VS , which we are varying from 15 V to
+15 V . As you collect this data, it is advisable to make sketches by hand in your lab notebook.
Alternatively, if you are recording the data in a spread sheet, then making a plot of the data
on your computer is useful. The purpose of this is to let you know if you have collected enough
data. If the curve is a simple straight line, then fewer points are necessary than the case where
the curve is changing rapidly.
You should also think about the order in which you will take data points before you start
in order to plot as you go, you need to know what scale to use for your the axes! Finally,
you should put computer-generated plots of your data in your lab book. You also must have a
copy of the numerical values of your data in your lab book. It can either be written in by hand,
or if you took it in a spread sheet, print out the data and neatly tape it into your lab book.
Finally, add plots of the power dissipation vs. applied voltage. This can also be done in your
plotting program, however make sure that your results are sensible! Finally, DO NOT JUST
STAPLE A BUNCH OF FULL SHEETS OF PAPER IN YOUR LAB BOOK!!!!
Trim them to reasonable size and neatly tape or glue them into your lab book.
In collecting your data, the following should guide you in developing your lab book. First,
record the expected and measured values of all components. For the 1 k resistor in the circuit:
The 1 k resistor has a measured value of xxxx .
Similarly, for the components, X, record the measured values when appropriate. Finally, your
data should be collected in a table that looks something like Table 1.1.
1.4. PROCEDURE
Component Current
IX (Amperes)
Table 1.1: A sample data table for measuring the I V curve of a passive element X.
1.4.2
The I-V (load curves), curve of active circuit elements, such as batteries and power supplies,
can be obtained by connecting the elements to an external circuit consisting of a single variable
resistor. A circuit for measuring the I-V curve of active elements is shown in Fig. 1.2. A circuit
connected to a power source is often called the load on the power source and in this case
the single resistor, RL , is called the load resistor. As you will see, a big load (that is, a small
resistance) tends to load down the source.
Think about this language: whats big about connecting a small resistor?
R
V
I I A
L
Source
VS
Figure 1.2: The setup for measuring the load curve of a power source. The objects labeled A and
V are ammeters (ampere-meters) and voltmeters, respectively. The resistor with the arrow through
it is a variable resistor, or a potentiometer.
The I-V curve is obtained by varying the load resistor RL to obtain a set of (I, V ) points
to plot on a graph. You must nd a suitable range of values for RL so that you get a range of
values for I and V . If all your values of RL are too large, V will vary only a tiny amount; if
RL is too small, the total power V 2 /R could exceed the power limitations of the resistor.
Any circuit with two output terminals can be considered as a source. It can be a battery,
a power supply, two terminals on the outside of a black box. It does not matter. What does
matter is that there is an I-V curve for the source, and there are probably many circuits that
give the same or equivalent I-V curves.
Use the circuit shown in Fig. 1.2 to measure the I-V curves and power output of the
devices listed below. For parts 1 and 2 use a 1 k potentiometer for RL . In part 3, us a 10k
potentiometer for RL .
1. battery
2. a 50 mA current source circuit: set up your power supply as follows
(a) with an open circuit at the output terminals, set the voltage knob to 10V,
(b) turn the current limit knob to zero,
(c) attach a 10 resistor across the output terminals, and then
(d) set the current limit knob to 50 mA;
(e) remove the 10 resistor and use the output terminal as the source in Fig. 1.2.
3. the voltage divider network shown in Fig. 1.3 using R1 = R2 = 1 k and V = 10V.
R
+
1
R2
Vo = V
R2
R1 +R2
What are the Th`evenin and Norton equivalent circuits for each of the active devices you
investigated above?
1.4. PROCEDURE
1.4.3
10V
20
20
20
20
20
Figure 1.4: An R 2R resistor ladder. In this diagram, 10 stands for 10k and 20 for 20k.
The type of circuit shown in Fig. 1.4 is used in digital-to-analog conversion (DAC), as we
will see later in the semester. For the present, it is an interesting example of a resistor network
which can be analyzed in terms of voltage and current division and, from various points of
view, in terms of Th`evenin equivalents.
(a)
(b)
10
20
20
20
Figure 1.5: (a) shows the circuit to measure the resistance R from D to ground. (b) shows the
circuit to measure the resistance R from C to ground.
We are going to study the properties of this network as we build it. It will be useful to
collect all the parts that you need to construct this network using 1% metal-lm resistors,
but do not build it until you have read through the remainder of this section. If you are
so foolish as to ignore this warning, you will nd that you need to dismantle the
network to make your measurements!
1. Start by simply putting a 20k on the board as shown in Fig. 1.5a. Measure the resistance
from the point D to ground. We refer to this as looking to the right into the load.
2. Now add the resistors as shown in Fig. 1.5b and measure the resistance looking to the
right into the load (C to ground).
3. Continue to add pairs of resistors and measuring the resistance looking into the load, (B
and A to ground)
4. Add the nal pair of resistors and measure the resistance between the terminals to which
the voltage source will be connected.
10
You should now have the resistance network (without the voltage source) on your protoboard using 1% metal-lm resistors. These resistors should all be within 1% of their nominal
values (that is, the stated tolerance is the maximum deviation, not a standard deviation); the
better the precision, the better the network that can be constructed. Show by calculation in
your notebook that the results from above are as expected.
Calculate what you expect for the above measurements and compare them with what
you have observed. Draw the equivalent circuit that the voltage source will see once it is
connected to the resistor network that you built.
5. Now connect the 10 V source and measure the voltage to ground from points A, B, C
and D.
Show that these are in accord with expectations. Compute the current and power drawn
from the source.
Lets think about extending the network to an innite number of resistors in the chain.
1.4. PROCEDURE
11
If we were to do this, what would the equivalent resistance of this network be?
10
10
10
10
+
10V
20
20
20
20
20
Figure 1.6: An R 2R resistor ladder. In this diagram, 10 stands for 10k and 20 for 20k.
Let us now consider our network as shown in Figure 1.6 where we connect two outputs at
the end of the circuit. It would be useful to know the Th`evenin equivalent circuit looking from
these new output terminals back toward the source.
Sketch the Th`evenin Equivalent for this circuit in your lab book.
6. We can now determine Vth and Rth of the equivalent circuit. You can measure the open
circuit voltage by measuring the voltage from + to . The equivalent resistance could
12
1.4. PROCEDURE
13
A conclusion you should assimilate from this part of the lab is that one complicated circuit
(for example, the ladder) can be thought of from many points of view many terminal pairs.
For each pair of terminals, there is an equivalent circuit that would mimic the behavior of those
terminals. There is no equivalent circuit for the entire circuit, but only for specic pairs of
terminals. Knowing the equivalent for a pair of terminals makes it easy to think about what
will happen to something you want to connect to those terminals. We will use this concept
throughout the course!
14
Chapter 2
2.1
Introduction
This Lab is designed to help you gain familiarity with the Function Generator and the Tektronix
oscilloscope you will be using throughout the semester.
The DS335 Synthesized Function Generator generates a variety of periodic waveforms
of dierent periods and amplitudes. This is a precision function generator with a highly stable
clock for generating signals with dierent periods. As the name implies, it digitally synthesizes
its waveforms in much the same way that a CD player can synthesize signals (the information
for which is stored in digital form) that eventually are heard as sound.
The Tektronix TDS 2012B oscilloscope provides a means of observing these and other
periodic waveforms. Very briey, a digital oscilloscope emulates an analog oscilloscope which
images a periodic waveform by repeatedly passing a dot (the position at which an electron
beam hits the phosphor screen of a cathode ray tube) across a screen at a sweep rate (the rate
15
16
of passage across the screen) and repeat rate (usually determined in various ways to generate a
repeating pattern) appropriate for the signal being observed. Thus, the horizontal axis is time
and the vertical axis is the voltage being measured. You can directly select the sweep rate and
the scale factor for the vertical axis. The trickier part is to arrange to have the sweep repeated
in such a way as to generate the same picture of the waveform on each sweep otherwise, you
see a confusing jumble on the screen. As described below, the sweep can be triggered in
several dierent ways.
Taking data. Note: This discussion applies both the this lab and to several labs later in
the semester. Both the signal generator and the oscilloscope operate over several decades in
their key parameters: waveform amplitude and frequency. Not coincidentally, analog circuits
must operate properly over a similar range of signal parameters and you will need to both
characterize and display such behavior. The measurements are straightforward enough given
the matched scales of the instruments.
For properly displaying circuit behavior over several decades, a linear scale plot fails miserably. However, a base-10 logarithmic scale gives equal space to each decade or factor of 10
(actually, any base will do the same trick, but base-10 is conventional because of its simple
powers-of-ten convenience). In this and subsequent lab exercises, you will want to select where
you take data points (primarily at what frequencies) so that the points uniformly ll several
decades on a log scale. If you want n points per decade, youd choose 101/n and integer powers
thereof. For example, in frequency measurements with n = 1, you could take data at, for
example, 1Hz, 10Hz, 100Hz,... or 5Hz, 50Hz, 500Hz,... . For n = 3, 1Hz, 2.15Hz, 4.62Hz, 10Hz,
21.5Hz,... could be used. When viewed over several decades, great precision is generally not
necessary, so it is common to see 1Hz, 2Hz, 5Hz, 10Hz, 20Hz... used. You might also want
to take note of the resistor values available (from about 1 through 10M covering seven
decades) in the laboratory and from manufacturers.
2.1.1
2.1. INTRODUCTION
17
oset (the amplitude will read 1Vpp because the default load impedance is 50 see section
4 below).
2. The default waveform is a sine wave. To change, toggle the FUNC button through
square, triangular, sawtooth, and noise, then back to sine.
3. To change frequency: As you know from Fourier analysis, only a sine wave is composed
of a single frequency component. Nevertheless, it is convenient to specify all the selectable
waveforms by a single frequency designation. This frequency is really the inverse of the fundamental period (the repeat period) of the wave. Non-sine wave signals contain this frequency
as well as higher order harmonic components at multiples of the fundamental frequency.
Two methods are available for setting the frequency:
1. With the FREQ displayed, enter a number, then hit either MHz, kHz, or Hz to specify
the intended units; or
2. With FREQ displayed, you will notice that one of the displayed numbers is blinking. Press
the Vpp/kHz up button and see that the blinking number is incremented upwards by
one. Pressing SHIFT and or will shift the blinking digit so you can increment in
larger or smaller amounts.
4. To change amplitude: The same two options are available as under FREQ mode. Note
that you can specify the amplitude in two dierent units and with two dierent modes:
1. In Vpp mode, you enter the peak-to-peak excursion of the output voltage. This works
for any waveform.
2. In Vrms mode, you enter the root-mean-square voltage. Only use this mode for sine wave
signals.
The Th`evenin equivalent resistance of the DS335 signal source is 50. That is, the output
of the generator looks like an ideal voltage (signal) source in series with a 50 resistance.
The reading of the output display can be changed from High Z to 50 with switches in the
DATA ENTRY section. The intent of this toggle is to allow you to display the actual voltage
delivered to your load under the conditions that the load is i) much larger than 50 (High
Z setting) or, ii) equal to 50 (50 setting). If you have a load which does not satisfy
either of these conditions, you should use the High Z setting and compute and/or measure
the voltage delivered to your circuit. Toggling the reading does not change the output
of the generator in any way!
5. DC level: One can superimpose a DC level on an AC signal:
1. Set up the desired AC signal.
2. Press OFFS
3. Enter the DC oset voltage in data entry.
Using this, you can, for example produce a square wave where the low voltage side is at zero
instead of a negative voltage; this will be useful for digital circuits.
18
6. Frequency sweep: The DS335 can repeatedly sweep its frequency over the entire range of
its output or any fraction thereof at a rate selected by the user. The sweep can cover frequencies
at either a linear or a logarithmic rate. To set up a sweep, follow these directions:
1. Reset to default settings.
2. Set the desired amplitude.
3. Press the SHIFT key, then the STOP FREQ/LIN/LOG key. The display should read
Lin.Lo9, with the rst L blinking indicating a linear sweep rate. You can toggle this
with the and buttons.
4. Press SWEEP RATE, then enter the inverse of the desired sweep time (i.e., 0.5 Hz for a
2 second sweep through the selected frequency range).
5. Press the START FREQ key and enter the desired starting frequency.
6. Press the STOP FREQ key and enter the stop frequency.
7. To start the sweep, press SHIFT, then the START FREQ/ON/OFF key.
The DS335 puts out a trigger pulse once for each frequency sweep, so you can trigger the
scope once on each sweep in order to quickly visualize the frequency response of a circuit (you
will need to set the scope sweep time to be greater than or equal to the DS335 sweep time).
2.1.2
The User Manual for your oscilloscope is available in the lab. Pages 1-36 cover the basic
operational details. The chapter on Application Examples shows how to do various types
of measurements, several of which are similar to the laboratory exercises. Most features are
documented in the instructions under the HELP button, which you can search via the index or
by simply pressing HELP after pressing a button about which you would like to learn. Below
are a few notes to help orient you.
The TDS 2012B is more than a traditional oscilloscope. The latter would simply show a
waveform as it occurs in a circuit. The TDS 2012B is a digital scope: it digitizes the waveform
and can store a single waveform so that you can analyze it after it occurs. Like a storage scope,
it will display on its screen indenitely the last trace for which it was triggered. (Warning:
This means you may be fooled into thinking the scope is seeing something when it is really
displaying an old waveform! In particular if you press the RUN/STOP button, the scope wont
run normally until you press it again. STOP lights up in red at the top of the screen to
warn you if the scope has been stopped.) Of course, the scope can also perform the functions
of a traditional real-time oscilloscope. The scope can save waveforms to oppy disks so you
can do further analysis on a computer. The scope performs a variety of analyzes of waveforms
(amplitude, period,...) and can do so in a continuous way, constantly updating the results. You
will use this capability extensively. Some measurements (in particular, comparisons of dierent
waveforms) require you to manipulate the cursors and read o values of various quantities.
The controls for the scope are a combination of front panel knobs and menus displayed on
the screen. Getting familiar with both of these is one of the main points of this lab.
2.1. INTRODUCTION
19
You select input channel 1 or 2 with the two buttons so-labeled (yellow and blue). After
pressing one of these, you can change the settings for the corresponding channel. (Each
channel has dedicated control knobs for vertical scale and vertical position, regardless
whether that channel is selected or not.) Note that pressing a channel menu button when
that channel is already selected turns o the display of that channel. Pressing again turns
it back on.
VERTICAL section: The scale of the vertical axis is controlled by the VOLTS/DIV
knob. The calibration, in volts per large grid unit, is displayed on the screen. You can
move the zero volt point with the position knob.
Notice that the vertical scale for each channel is displayed on your scope screen (in volts
per division).
HORIZONTAL section: The scale of the horizontal axis (time) is controlled by the
SEC/DIV knob. The calibration, in time per large grid unit, is displayed on the screen.
You can move the track horizontally with the position knob.
Notice the scope screen always displays the time scale (in time per division).
TRIGGER section: The triggering of the sweep is controlled by this section. When
trying to visualize a time-varying but periodic voltage (e.g. a sine wave), the scope
needs to start its sweep at the same point on the waveform each time otherwise, you
will just see a jumble of lines on the screen. By starting at the same point, you get a
stable pattern. The LEVEL button controls the voltage level at which the sweep will
begin. Note that, if this level is outside the range over which your input signal varies,
the scope never triggers! (Or, in AUTO trigger mode, it will trigger randomly!) Several
other controls are on the Trigger menu screen, accessed by pressing the Menu button.
The SLOPE control determines whether the sweep begins when the input crosses the
trigger level while rising(increasing in voltage) or while falling (decreasing in voltage).
The SOURCE control decides whether channel 1 or 2 is tested for the trigger condition.
(Or whether the EXT TRIG input, or the power line is used to trigger the scope.)
Notice that the scope screen (on the bottom right) shows which channel it is triggering
on, whether it is looking for a rising or falling slope, and a what level it will trigger. (It
also displays the frequency at which it is being triggered.)
In the Vertical, Horizontal and Trigger and sections are MENU buttons that bring
up on-screen displays with expanded sets of options.
One important button is the AUTOSET located on the right side of the top row. This
generally sets the scope parameters so that the input signal will appear on the screen.
When all else fails, try this!
The ACQUIRE button allows you to select Sample mode (which is typically used)
or Average mode which can be much more confusing, but is useful for cleaning-up a
repetitive signal which has non-repetitive noise on it.
20
2.2
21
The work in this section must be completed and signed o by an instructor before you start
working on the lab. Do this work in your lab book.
1. In plotting things as a function of frequency, the lab handout indicates that a good
1
choice for frequencies can be found by choosing them according the the 10 n rule
where n is the number of points per decade. See page 2 in the middle. Assume that
we want to take 5 measurements per decade for frequencies between 1000 and 100000
Hertz. What values should we choose?
2. The output of your signal generator has two modes, Vpp and Vrms as described on
page 3 of the lab handout. Assume that the voltage is given as V (t) = Vo cos t.
Sketch two cycles of this voltage as a function of time, and then show on your sketch
what you would measure for both Vpp and Vrms . Be sure to express your answers in
terms of Vo .
22
3. On page three of your handout, the voltage source is described as having the Th`evenin
equivalent resistance of 50. Sketch what this circuit looks like. Assume that we set
the source to high Z and connect a 10, 000 resistor to it. If we deliver 10V to the
load, what is the voltage output reading of the supply? Now assume that we toggle
the supply to its 50 setting. What is the voltage reading on the supply? (What is
the actual voltage delivered to the load?)
2.3
In this lab we will utilize the following equipment. This equipment is located at your lab
station.
1. The Tektronix TDS 2012B digital oscilloscope.
2. Two P2220 probes for the oscilloscope.
3. One USB memory stick which is no larger than 2GB.
4. The Stanford Research Systems DS335 signal generator.
5. One BNC to alligator cable.
6. The Metex 4650 digital meter.
7. The Global Specialities PB10 proto-board (see Appendix A for a description).
You will also need the following components in order to carry out this lab. It makes more sense
to get them as you need them, rather than all at once before the start of the lab.
1. 1 2.2 k resistors.
2.4. PROCEDURE.
23
2. 1 100 k resistors.
3. 4 precision 10 k resistors.
4. 5 precision 20 k resistors.
2.4
Procedure.
1. Play! Take notes of what you do and what you see/measure with the scope as you
do this. Visualize each type of waveform from the DS335 on the oscilloscope. Adjust
frequency, amplitude and DC osets and observe the resultant waveforms. Be sure to
try the dierent input coupling settings (DC or AC set using the channel menu buttons)
on the scope as you change things like the DC oset. (It will be important to keep track
of the setting of the coupling, especially when measuring at low frequencies or for signals
which dont average to zero. Usually you want the coupling set to DC... except when
you dont.) Try (using the Trigger menu) triggering internally and externally using the
SYNC OUT from the DS335. Make sure that you understand the function of the High
Z - 50 switch on the DS335. You will need to explain this to one of the instructors.
Try saving you scope settings, messing things up and then recalling the saved settings.
You probably cant trust the amplitude reading of the DS335. Often the most accurate
measure of size of a signal is the one found by hand by positioning the scopes horizontal
cursors where you best estimate the top and bottom of the signal to be. You can also
tell the scope to make automated measurements of Pk-Pk (peak-to-peak size) and RMS.
Note: You will always get the best accuracy from the scope if the vertical and
horizontal scales are adjusted so one cycle of the waveform lls most of the
screen! In general, dont forget to adjust your scope whenever the waveform
starts to look small.
24
Compare all of these measurements to your hand measurements for sine, square,
and triangle waves. Which automated measurements are the most accurate? What does
the RMS voltage setting mean when applied to sine, square or triangle waves? Compare
calculated RMS values to the waveforms you observe.
Now adjust the scope to have 0.1 V /division and repeat your measurements.
2.4. PROCEDURE.
25
Connect channel two of the scope across R2 . Based on what you measured earlier, predict
what you should measure on channel 2. Make the measurements and compare them with
your predictions.
Which method is the most accurate? What problems do you encounter in your measurements?
3. Frequency response of the R-2R ladder circuit. Substitute the DS335 for the DC
voltage source in the R-2R ladder circuit of Laboratory 1 (be sure to include the nal
20k resistor). Select a 10Vpp sine wave with zero oset voltage (check with the scope
to be sure this is what youve got). Measure the amplitude of the voltage at point D as
a function of frequency over the range 1Hz to 3MHz. As discussed in the introduction,
take data so that when you make a plot with a logarithmic frequency scale the points
are roughly equally spaced. To verify that the frequency dependence you observe is not
a result of a variation in output of the DS335 or sensitivity of the scope, use both scope
channels with one directly connected to the DS335 output. Be sure to use DC coupling
of the input signal on both channels.
Make a Bode plot of the measured frequency response. This is a log-log plot of the relative
gain (Vout (f )/Vref )) vs. frequency, where Vref is a chosen reference voltage. In this case,
use 20 log 10 (V (f )/V (1000Hz) for the vertical axis and log10 (f ) for the horizontal axis.
The vertical axis is referred to as a decibel or dB scale it is a standard in electronics.
A bel (named for Alexander Graham Bell) is a factor of 10 change in power. This is
commonly used to measure quantities such as amplication and attenuation. For example,
the amplication, in bels, is Abel = log10 (Pout /Pin ). Then, since P V 2 for resistive
loads, we have Abel = log10 ((Vout /Vin )2 ) = 2 log10 (Vout /Vin ). Then a decibel is a tenth
of a bel, so the numerical value of the amplication in decibels is ten times more than it
is in bels, so Adecibel = 20 log10 (Vout /Vin ).
On a frequency response
plot, the characteristic frequency is that frequency at which
the response falls to 12 (about 0.7) of its nominal or reference value. Remembering that
26
If the response falls at a rate of dB/decade, what does this imply about the functional
form of V (f )?
Is the high frequency behavior what you expect for a device made entirely of resistors?
Can you explain what might be happening?
Data Collection: Throughout this course, we will measure many Bode plots. In order
to do this, there is a certain minimum set of data that we need to collect. First, always
measure both vin and vout using your oscillscope. You will nd that voltage given bv
the signal generator may be inaccurate. Second, in order to measure a phase dierence
between the input and output, we need to measure how far through a cycle the output
is shifted realtive to the input. We do this by measuring a time dierence between the
2.4. PROCEDURE.
27
peak of the input and the peak of the output voltages. The phase dierence, , is then
computed from the frequency, f , and the time dierence, t as
= (2) f t .
Given this, we would expect to collect data as shown in Table 2.1. We note that the units
listed in the table may not be the best choicemilliseconds might be better than seconds.
We also need to choose a form for v. Is it RMS, amplitude, or peak-to-peak? What ever
we choose, we also need to be consistent throug out our measurements. Finally, in using
our scope, it is best to put the larger signal on channel one. In this case, put vin on
channel one and vout on channel two.
Measured Quantities
Frequency
Input
Output
Voltage Voltage
f (Hz)
vin (V) vout (V)
Time
Shift
t (s)
Computed Quantities
Attenuation
Phase
Shift
| vout /vin | 20 dB log | G | (rad)
Gain
28
Chapter 3
3.1
Introduction
We introduce two new circuit elements in this laboratory: capacitors and inductors. Together
with resistors, these complete the list of two-terminal, linear devices which are commonly used
in electronics.
In this and the following lab, we will study circuits with various combinations of resistors,
capacitors, and inductors from two dierent points of view: the time domain and the frequency
domain. In the time domain we examine transient responses to sudden changes in applied
voltages (the closing of a switch or the application of a step change in voltage). In the frequency
domain, we will study the response to sinusoidal applied voltages as a function of frequency.
The two points of view turn out to be entirely equivalent: complete knowledge of the behavior
in one domain implies (with appropriate theory) complete knowledge of behavior in the other.
Both points of view are useful throughout electronics as well as being applicable to a wide
variety of other physical systems.
29
30
3.1.1
RC circuit analysis
The voltage across a resistor-capacitor pair wired in series (see Fig. 3.1) must equal the voltage
across the capacitor plus the voltage across the resistor. If we write the voltages as a function
of time (as opposed to functions of angular frequency ), then we are using a time domain
treatment of the problem. The equation for the voltages in the RC circuit is
v(t) = vC (t) + vR (t).
(3.1)
Using the relations vC = Q/C and VR = i(t)R, this can be rewritten as:
v(t) = Q(t)/C + i(t)R.
(3.2)
Q(t) on the capacitor and i(t) in the circuit loop are related by
t
Q(t) =
i(t )dt ,
(3.3)
dQ
.
dt
(3.4)
assuming Q(0) = 0, or
i(t) =
Combining (3.3) or (3.4) with (3.2), a variety of interesting limits can be found. For example,
by taking the derivative of (3.2), we can express the right side in terms of a single time varying
quantity, vR (t):
dv
dt
= i/C + R
1
= vR RC
+
di
dt
dvR
dt .
If the voltage across the resistor changes slowly enough we can neglect the second term on
vR
1
or v1R dvdtR RC
. Referring back to (3.2), this amounts to requiring the
the right: dvdtR RC
voltage on R to be small, so most of v(t) appears across C. Finally, we get
vR (t) = RC
dv
.
dt
(3.5)
For slowly varying signals, the voltage across the resistor is proportional to the derivative of
input voltage. This is called a dierentiating circuit it will dierentiate slowly varying input
voltages.
Note that the quantity RC has the units of time. This is the characteristic
time constant of an RC circuit. This is another quantity that will arise again and
again!
One can also take the integral of equation (3.2) to get:
t
0
v(t )dt =
1
C
t
0
(3.6)
3.1. INTRODUCTION
31
v (t)
C
v (t)
R
C
v(t)
1
RC
t
0
v(t )dt .
(3.7)
For rapidly varying input signals, the voltage across the capacitor is the integral of the input
voltage, v(t).
In this lab, we are going to consider a step-function input voltage where at time t = 0, the
voltage instantaneously goes from zero to some value, V0 , and the remains at V0 for all future
times. Given this an an input voltage, we would nd the following solutions for the voltage
across the resistor and the capacitor for times t > 0.
vR (t) = V0 et/RC
vC (t) = V0 1 et/RC
(t > 0)
(3.8)
(t > 0)
(3.9)
3.1.2
Analysis of RL circuits
The voltage across a series wired inductor-resistor pair can be written as:
v(t) = vL + vR = L
di
+ iR.
dt
(3.10)
Analysis similar to that above for the capacitor yields integrator and dierentiator circuits:
For slowly varying inputs, most of the voltage is across the resistor and the remaining
voltage across the inductor satises
vL (t) =
Dimensional analysis implies that
L
R
L dv
.
R dt
(3.11)
32
t
0
v(t )dt .
(3.12)
As we did with the capacitor, we can also consider a step-function input to this circuit. In
the limit of a pure inductor, we would nd a solution similar to what we did for the capacitor.
As the current is changing rapidly at time t = 0, we would initially nd all the voltage across
the inductor, and none across the resistor. It would then decay away from the inductor, and
build up on the resistor, In the case of a physical inductor, there is not only an inductance
L, but and internal resistance RL as well. This means that at long times, we have a voltage
divider with resistors R and RL . Solving the equations and dening the characteristic time to
be RL = L/(R + RL ), we would nd
vR (t) =
vL (t) =
R
V0 1 et/RL
R + RL
RL
R
V0 +
V0 et/RL .
R + RL
R + RL
(3.13)
(3.14)
3.2
33
The work in this section must be completed and signed o by an instructor before you start
working on the lab. Do this work in your lab book.
L
VR
R
VR
1. What are the characteristic time constants for the following circuits? Take R =
4.7 k, C = 0.1 F, L = 1 mH.
2. Of what order are the dierential equations that govern the behavior of the above
circuits?
3. After a long time, which element in the left-hand circuit will have a signicant voltage?
In the right-hand circuit? What about at the instant of closure of the switches?
34
3.3
In this lab we will utilize the following equipment. This equipment is located at your lab
station.
1. The Tektronix TDS 2012B digital oscilloscope.
2. Two P2220 probes for the oscilloscope.
3. One USB memory stick which is no larger than 2GB.
4. The Stanford Research Systems DS335 signal generator.
5. One BNC to alligator cable.
6. The Metex 4650 digital meter.
7. The Global Specialities PB10 proto-board (see Appendix A for a description).
You will also need the following components in order to carry out this lab. It makes more sense
to get them as you need them, rather than all at once before the start of the lab.
1. 470 resistor.
2. 1 k resistor.
3. One additional resistor you choose to match the inductor.
4. 27 pF capacitor.
5. 0.33 F capacitor.
6. 500 mH inductor.
3.4
3.4.1
Procedure
Time domain response of RC circuits
Voltage across the resistor. Investigate the output characteristics of the circuit shown
in Fig. 3.3. In order to observe the complete transient response, you want to apply a step
voltage and then hold this applied voltage for a time that is long compared to (i.e., until the
VR
3.4. PROCEDURE
35
transient has died away). A transient is a temporary signal which exists as a system moves
from one stable mode to another. In this case, the transient exists as the system moves from
an uncharged capacitor and zero applied voltage to an applied voltage and a steady charge on
the capacitor.
Set up the circuit shown using C = 0.33F and R = 1k.
As the supply voltage, use 5 Volts from the DC supplies at your experimental station.
The diagram indicates that you could ground one point of the circuit. In fact it is more
convenient to work with the circuit oating, meaning that you dont ground any point.
Then you can connect the scope leads (one of which is grounded) anywhere in the circuit
without introducing an unintended short.
Calculate the numerical value of the time constant for this circuit.
Instead of using a switch, you should be able to obtain the transient response by plugging
a banana plug into the terminal on your proto-board or just plugging a jumper wire into
the proto-board.
You will have to set up the oscilloscope to take a single shot measurement of the
transient. This will require some trial and error to make the triggering work and to
be sure that you get the horizontal and vertical scales right. Remember that you must
discharge the capacitor after each attempt you can do this by connecting a wire across
it for a short time. You can erase trial signals and reset the trigger by pushing the single
seq button.
If you have trouble capturing the signal with your scope, you may want to warm up on
something simpler. Try to measure the voltage across a resistor just as you apply voltage
across the resistor. This gives you a very simple step function to practice triggering your
scope.
Once you have obtained a clean transient signal, you should transfer the data to a diskette
so that you can perform least-squares ts on a computer. Be sure to SAVE the wave
function of interest (not the scope setup and not the wrong channel of the scope) in
spreadsheet format. To make sure everything is working correctly, plot at least one of
your measurements on the computer before going on to do the rest of the experiment.
Verify that the expected functional form and time constant are observed.
To verify the functional form, make a plot that will make the expected form a
straight line. To do this, note that if
v(t) = Aet/
(3.15)
ln v(t) = ln A t/.
(3.16)
then
36
The input function to your circuit is a step function that turns on when you close the switch.
When we are looking at the response of an RC circuit, we talk about times either long or short
compared to the time = RC.
What does the derivative of a step function look like? What part(s) of the observed
output signal mimics the derivative of the input signal? Is this consistent with the above
equations?
3.4. PROCEDURE
37
What does the integral of a step function look like? What part(s) of the observed output
signal mimics the integral of the input signal? (Hint: think about ).
Measuring a fast transient. To see how well the scope works, try measuring the transient
in a circuit with R = 470 and C = 27pf (or similar values).
What is the calculated time constant? Recall that the speed of light is 1 foot per nanosecond (excuse the units!)
You arent likely to be able to close a mechanical switch fast enough to make these measurements. Instead, you can replace the D.C. power supply and switch with the square-wave
output of your DS335 Function Generator. This will serve to charge and discharge the capacitor repeatedly. You should use a high frequency square wave. Prove to yourself that the circuit
will have many RC times to reach equilibrium before the square wave voltage reverses.
38
Even the square wave cant make transitions on a time scale which is fast compared to
RC. Look at the shape of your square wave on the scope and determine how long it takes the
voltage to ramp up to a reasonably stable level. You only expect the simple RC behavior in
the circuit once the input voltage has stabilized. When you analyze the data, you will want to
ignore the rst part of the transient, taken when the input voltage was changing. Knowing the
ramp up time allows you to decide which part of the data to discard.
Again, you should measure, plot, and t the transient across the resistor and across the
capacitor. Now the circuit is not oating because the DS335 output is grounded on one side.
Youll have to arrange the circuit so you can measure the desired voltage while still having
the ground connection of the scope connected to the same part of the circuit as the ground
connection of the function generator.
Data Collection: In this experiment, the primary data consists of a scope trace of showing
the time dependence of the signal across a given component. The rather large amount of
data from these traces can loaded into an Excel le and then manipulated. However, in doing
this analysis, it is necessary to look at the data. There will be some part of the data that
corresponds to t < 0, where the voltage across the components in zero. This is not useful for
our analysis. There will also be part of the signal for large times where the voltage has fallen
below the line noise. In this region, it will appear that the output voltage has become constant,
and no longer follows an exponential decay. These data should also be discarded from your
analysis.
In the case of the resistor, the voltage should now follow equation 3.8, and it is easy to
linearize this by taking the natural log of both side. For the case of the capacitor, we have
equation 3.9. Here, simply taking the natural log of both sides leads to a mess. We rst need
to isolate the exponential piece of this equation.
vC (t) = V0 1 et/RC
V0 vC (t)
V0
(3.17)
= et/RC
(3.18)
Thus, taking the natural log of the latter equation will yield an equation linear in time, and
allow us to t for the slope which is related to RL .
3.4.2
VR
3.4. PROCEDURE
39
The circuit shown in Fig. 3.4 and the one with R and L interchanged are to be investigated.
Real inductors introduce a slight complication: they have an internal resistance, RL , that is
generally non-negligible and we have to write
v(t) =
di
+ iRL + iR.
dt
(3.19)
The internal resistance is usually not shown in circuit diagrams, but must always be kept
in mind. For example, you cannot directly measure the voltage across just the inductance;
the apparent voltage is across the series combination of L and RL . In fact, RL is not just the
DC resistance of the coiled wire either: The eective RL includes all dissipative eects which
remove energy from the circuit. This includes inductive heating in any magnetic core material
around which the coil is wound and, at high frequencies, radiative eects as well.
1. Measure the apparent resistance and inductance of your inductor with your Ohmmeter
and the LRC meter.
2. Setup the circuit shown in Fig. 3.4. Use a series resistance (R in the diagram) that has
a value comparable to RL .
3. Measure the functional form and time constant of the voltage across R in the same way
you did for the RC circuit. Also, note the nal voltage across R.
What are the nal and initial voltages across L?
4. What is RL ? There are (at least) two ways to determine this from the data: from the
time constant and from the nal voltage across R.
Do these agree with each other? Do they agree with our ohm-meter measurement of
RL ?
40
Chapter 4
4.1
Introduction
We now re-examine the circuits of Lab 3 in a dierent way: we apply sinusoidal waves rather
than step inputs. We compute and measure the amplitude and phase (relative to the source)
of the output. Your measurements should be compared to quantitative calculations of the
expected behavior of the circuits.
41
42
The RC and RL circuits in this lab can be modelled as AC voltage dividers. Consider the
voltage divider network shown in Fig. 4.1. If the sinusoidal input to the divider network is
written as
where
vout =
Z2
vin
Z1 + Z2
The voltage divider result can also be applied to RLC circuits, with Z1 being replaced by
ZR and ZL combined in the appropriate way. The resulting behavior is more complex than RC
and RL circuits,
as the RLC circuit exhibit resonant behavior at a characteristic frequency,
LC = 1/ LC. These circuits are discussed in detail in the textbook (Section 3.6).
A
Z
1
vin
Z2
vout
B
Figure 4.1: A generalized voltage divider constructed of two components with impedances Z1 and
Z2 . The output is looked at between the terminals A and B.
4.2
43
The work in this section must be completed and signed o by an instructor before you start
working on the lab. Do this work in your lab book.
2. Consider a voltage source, V (t) = Vo cos(t), where the frequency, f varies from 10
Hz up to 100 Hz. Plot the impedance, | Z | as a function of frequency for each of the
following components: a 100 Resistor, a 1.0 F capacitor, and a 1 mH inductor.
44
3. A voltage source of V (t) = (5.0V ) cos(t) is separately applied to each of the three
components above. The frequency f is 100 Hz. Sketch the voltage as a function of
time over one cycle of the wave. Sketch the current as a function of time in each
component over one cycle of the wave.
4.3
In this lab we will utilize the following equipment. This equipment is located at your lab
station.
1. The Tektronix TDS 2012B digital oscilloscope.
2. Two P2220 probes for the oscilloscope.
3. One USB memory stick which is no larger than 2GB.
4. The Stanford Research Systems DS335 signal generator.
5. One BNC to alligator cable.
6. The Metex 4650 digital meter.
7. The Global Specialities PB10 proto-board (see Appendix A for a description).
4.4. PROCEDURE
45
You will also need the following components in order to carry out this lab. It makes more sense
to get them as you need them, rather than all at once before the start of the lab.
1. 2.2 k resistor.
2. 22 k resistor.
3. 0.008 F capacitor.
4. 500 mH inductor.
5. Additional resistors and capacitors you choose to match your circuit design.
4.4
Procedure
Reminder: At the beginning of each section below, enter into your lab notebook a summary of
what you are setting out to do and what the relevant equations are expected to be. Derivations
and great lengths of verbiage are not necessary, but some orienting explanation is. This should
be standard practice in any lab notebook!
4.4.1
1. Set up the RC circuit using C = 0.008F and R = 22k and a sine wave of reasonable
amplitude (say, 5 Volts). Calculate the expected characteristic frequency in radians per second
and in cycles per second (Hz).
vin
A
R
C
v v
out
in
A
L
R
vout
46
the input signal, the other on the corresponding zero crossing of the output; the ratio gives you
the phase shift as a fraction of 360 .
In one conguration, vout is the voltage across R; in the other, vout is the voltage across
C. You must determine the necessary wiring for each case.
Choose your frequency steps so that your measurements will be roughly equally-spaced
on a logarithmic frequency axis.
Should you be using the scopes AC- or DC-coupling input mode for this measurement?
Determine the slope of the Bode plot (dB per decade) in the high- or low-frequency limit
(wherever G(f ) is varying). Make a plot of your data together with a theoretical function
going through (or near?) the data.
Determine the frequency at which |vC (f )| = |vR (f )|. Compare your measured value
to the calculated value.
Over what range of frequencies do you expect the circuit to integrate or dierentiate the
input signal? To gure this out, you can use the analysis in the Lab 3 write-up or use
the frequency domain logic in Section 3.4 of the textbook. Use the dierent waveforms
available from the signal generator to see that the proper mathematical operation is
performed. Choose an appropriate period for the waves so the integrator or dierentiator
should work well.
Data Collection: We recall from lab 2 what we need to measure to be able to make a Bode
and Phase plot for our lters. This is shown in Table 4.1. We note that the units listed in the
table may not be the best choicemilliseconds might be better than seconds. We also recall
from lab 2 that the phase dierence is obtained by using the scope cursors to measure the time
4.4. PROCEDURE
47
dierence between the peak of the vin signal and that of the vout signal, t. Using t and the
frequency of the signal, we obtain the phase dierence as
= (2) f t .
Finally, remember that it is important to measure both vin and vout using or oscilloscope and we
need to choose a consistent form for v. It can be RMS, amplitude, or peak-to-peak. However,
whatever we choose needs to be consistent throughout our measurements. Finally, in using our
scope, it is best to put the larger signal on channel one. In this case, put vin on channel one
and vout on channel two.
Measured Quantities
Frequency
Input
Output
Voltage Voltage
f (Hz)
vin (V) vout (V)
Time
Shift
t (s)
Computed Quantities
Attenuation
Phase
Shift
| vout /vin | 20 dB log | G | (rad)
Gain
4.4.2
Repeat the above procedure with the low-pass conguration of an RL circuit. Use a 2.2 k
resistor for R and measure L and RL .
Which circuit, RL or RC, works better as a low-pass lter? Why?
4.4.3
Construct a series RLC circuit as shown in Fig. 4.3. Use your 0.008F capacitor and the
inductor from the previous part. Study the discussion of RLC circuits given in section 3.5
of the textbook and calculate a predicted resonant frequency, o . You dont need to include
any explicit resistance in this circuit: in your analysis, include the source resistance and that
internal to the inductor.
Measure the frequency response over the appropriate frequency range. Again, choose frequency steps that will be equally spaced on a logarithmic frequency axis. Make a Bode plot and
48
a phase shift plot as in the above procedures. Compare to the calculated behavior. Use your
measurements of the amplitude and phase as functions of frequency to determine the value of
the internal resistance of the inductor. Comment on the result.
vin
A
C
v
out
Figure 4.3: The RLC circuit congured to measure the voltage across the capacitor.
4.4.4
As discussed in Section 3.7 of the textbook, there are many occasions when we need to couple
one functional block of circuitry to another in fact, its hard to think of a situation where
this is not necessary! Here, you will design a band-pass lter circuit by taking the output
of a high pass RC lter and putting it into a low pass RC lter with the same characteristic
frequency.
Repeat the design logic of Section 3.7 of the textbook but use a factor of 20 in place of the
100 used in the text. This leads to more comfortable element values. You should nd that you
can build the low pass stage of the circuit using the same components you used to build the
RC circuit earlier.
Again using 5 Volts from the signal generator, measure the frequency response (amplitude
and phase) and compare to the expected response.
What this exercise does not show you (at least if you do the design correctly) is how things
go wrong when you do not have the correct progression of input and output impedances. If
you have time, you might want to try using R1 = R2 and C1 = C2 and see what happens to
the response.
Chapter 5
5.1
Introduction
Almost any signal processing circuitry requires the establishment of constant bias voltages.
Starting with the 60Hz voltage supply from the power company, how do instruments obtain
these various DC supply voltages? We will investigate a sequence of circuits for doing this.
They all rely on non-linear elements that respond dierently to dierent parts of the AC voltage
signal.
First, we need to establish some notation (briey addressed in Lab 2). AC sinusoidal signals
are frequently referred to in terms of their RMS voltages. RMS stands for root-mean-square
or, more explicitly, the square-root of the average (or mean) of the squared voltage. Note that
if v(t) = V cos t, then the average voltage,
1
v =
T
T
dt v(t),
(5.1)
is zero, when we take the average over an integer number of periods. The RMS voltage is
Vrms
1
=
T
T
0
dt V
49
cos t
1/2
V
=
2
(5.2)
50
since the average value of the cos2 (t) is 1/2.1 We reach the conclusion that
Vpp
V
Vrms = = .
2
2 2
(5.3)
Thus, the 110Volt power outlet (where the 110 Volts refers to the RMS value) corresponds
to voutlet (t) = 2(110V ) cos t = 155 cos t Volts or 310 Volts peak-to-peak. One justication
for using RMS voltages is that the average power delivered to a resistive load is
V2
V2
1 T
cos2 t = rms ;
(5.4)
dt
P =
T 0
R
R
as far as power dissipation is concerned, Vrms acts the same as the corresponding DC voltage.
While the oscilloscope displays the details of instantaneous waveforms, typical digital volt
meters (DVM) such as the Metex meters read RMS voltages when set on AC Volts scales.
The latter meters are only reliable for sinusoidal signals with frequencies in the vicinity of 60
Hz.
In this lab, you will use a transformer to generate a roughly 14 Volt (RMS) AC signal
from which you will obtain various approximations to a constant DC voltage. While the
transformer steps down the 110 Volt line voltage, the output can supply large
currents! Be sure to wire and check your circuit before plugging the transformer
in and be sure that all three output wires from the transformer are plugged into
terminal posts on your proto-boards. The secondary side of the transformer is center
tapped; we will use one side and the center tap the other wire should just be plugged into
a terminal post which is not wired to anything:
vi
14 V
center
= 110 V
tap 14 V
Figure 5.1: A transformer showing two inputs and a center tap on the output. In this lab, we use
the center tap and one of the outer taps.
One advantage of using a transformer (beyond the obvious reduction in voltage and, thus,
danger) is that while the primary voltage oscillates relative to ground potential, the secondary
can oat to any necessary level (within the limits of insulation used inside the transformer).
This is a useful feature for the measurements you will make on the diode bridge circuits used
below. Note that when you measure a voltage signal using the oscilloscope, you are grounding
a point in the circuit. You need to think before doing this: you may alter the functioning of
the circuit signicantly and you could also cause large currents to ow through circuit elements
thus generating a characteristic odor and smoke! You can measure across oating
elements more or less with impunity. The Metex meters, on the other hand, are not grounded
so they can be connected anywhere in a circuit regardless whether it is oating or not.
1
Recall that cos2 = (1 + cos 2)/2 (draw yourself a picture to verify this); the second term has average zero
and the constant term clearly has an average of 1/2.
5.2
51
The work in this section must be completed and signed o by an instructor before you start
working on the lab. Do this work in your lab book.
2. There is typically a 0.65 V drop across a practical diode. What will this do to the
answer that you got in part 1?
3. In section 5.2.4, you will use an electrolytic capacitor. These capacitors have a positive and negative side. Which side of the capacitor corresponds to the large at
line in the gure?
52
5.3
In this lab we will utilize the following equipment. This equipment is located at your lab
station.
1. The Tektronix TDS 2012B digital oscilloscope.
2. Two P2220 probes for the oscilloscope.
3. One USB memory stick which is no larger than 2GB.
4. The Stanford Research Systems DS335 signal generator.
5. One BNC to alligator cable.
6. The Metex 4650 digital meter.
7. The Global Specialities PB10 proto-board (see Appendix A for a description).
You will also need the following components in order to carry out this lab. It makes more sense
to get them as you need them, rather than all at once before the start of the lab.
1. Four 1N4004 diodes.
2. One transformer.
3. One LM7805 Voltage regulator chip.
4. Additional resistors and capacitors you choose to match your circuit designs.
5.4
5.4.1
Procedure
Transformer
Observe, on the oscilloscope, the output waveform of the transformer. Note the frequency and
amplitude. Measure this same signal using the Metex meter. Is the Metex reading consistent
with the observed waveform? Document what you observe in your lab notebook.
5.4.2
A simple series connected diode which blocks half the AC waveform leaves you with a nite
DC or average level. Use the oscilloscope to observe the output waveform of the circuit shown
in Fig. 5.2.
5.4. PROCEDURE
53
Can you compute the average, or DC, voltage? Is what you see consistent with part (1)
and with the diode curves you measured in Lab 1?
v
v
R
i
Figure 5.2: A half-wave rectier using a 1N4004 diode. The input voltage, vi , is the AC from the
wall outlet.
54
v
C
R v
i
Figure 5.3: A full-wave rectier using four 1N4004 diodes, and an electrolytic ltering capacitor.
The input voltage, vi is the AC from the wall outlet.
5.4.3
The diode bridge circuit shown in Fig. 5.3 directs current always in the same direction
through the load. Verify this statement by tracing the current path available when the top
transformer terminal is positive (and negative) with respect to the bottom terminal. Construct
the circuit (without the capacitor Cf ) and observe the waveform.
What, roughly, is the DC, or average, voltage?
Conrm your expectation by switching the oscilloscope input to the AC coupled setting.
How does this signal change when you use a 1k vs a 10k load resistor? Draw a sketch of
what you observe in your lab notebook (or capture).
5.4.4
To smooth the output and better approximate a constant voltage, place a capacitor across the
output as shown in Fig. 5.3.
What is the relevant quantity which determines how constant the voltage is?
5.4. PROCEDURE
55
Try Cf = 0.2F , then a 25F electrolytic capacitor (be sure to observe the polarity here!).
In each case, measure the ripple voltage (peak-to-peak uctuation).
How does the DC voltage vary with load i.e., characterize the voltage regulation?
5.4.5
The simplest way to make a good DC supply for real circuits is to build a rudimentary DC
supply such as the one in Sec. 5.4.4 and then use an integrated circuit (IC) voltage regulator
to stabilize it. Construct the circuit shown in Fig. 5.5 using an LM7805 which is a 5 Volt
supply regulator which is sketched in Figure 5.4. There is also a specication sheet available
on line. The diagram above looks at the 7805 from the labelled side, and the three pins are as
labeled. We use this IC as a black box and just empirically note the quality of performance
(the LM7805 costs $1.18). How does the DC voltage vary with load? You probably own several
power supplies of this sort in various pieces of electronics.
56
Output
Gnd
Input
Top View
Side View
Figure 5.4: The LM7805 voltage regulator pin out.
LM7805
R
v
C gnd
v
i
Figure 5.5: A full-wave rectier with four 1N4004 diodes, an electrolytic ltering capacitor, and an
LM7805 regulator chip. The input voltage, vi is the AC from the wall outlet.
Chapter 6
6.1
Introduction
Active circuits are ones which can yield gain in the sense of being able to yield greater power
output than input. In most cases, more power can be delivered to a load by passing the signal
through an amplier than directly from a signal source. Obviously, the gained power has to
come from somewhere and this is generally from a DC voltage supply (often called a D.C.
power supply for this reason).
We begin with a simple voltage follower circuit that provides an output voltage that
follows the input voltage (i.e., is essentially equal to the input voltage). How can such a
seemingly useless circuit have any function? Because it can be a power amplier: because the
followers output impedance (essentially a resistance) can be quite low compared to that of
the signal source, the follower can supply more power to a load than a high impedance source
could.
In Lab 7, you will examine the common emitter amplier circuit; this can have both voltage
and power gain.
For both labs 6 and 7, we use a simple model for npn transistor operation (to understand
the underlying principles requires an understanding of how electrons behave in crystals the
subject of a course in solid state physics; in class, we will give a quick introduction):
57
58
Ic
Ib
2N2222
B CV
+ E CE
VBE
E
B
Ie
Figure 6.1: The npn transistor schematic symbol, notation, and lead conguration for the 2N2222
transistor.
1. The collector must be more positive than the emitter. This is clearly necessary in order
for current to ow from collector to emitter.
2. The base-emitter and base-collector junctions behave like diodes:
(a) When the base-emitter junction is reverse biased, the transistor is turned o and no
current ows from collector to emitter. The base-emitter junction is like the handle
of a valve it controls the current ow through the collector-emitter circuit.
(b) When the base-emitter is forward biased and the base-collector is reverse biased, the
transistor is in the active or linear operating range. A forward biased diode has
a diode drop of 0.6 to 0.7 Volts (0.65 V).
(c) When both junctions are forward biased, the transistor is saturated and, typically,
VCE 0.1 0.2 Volts.
3. Maximum values of IC and VCE cannot be exceeded without burning out the transistor.
4. If 1 - 3 are obeyed, then IC hF E IB = IB . (or hF E ) is roughly constant in the
active or linear operating range. Typical values are in the range 50 - 250 and can vary
substantially from transistor-to-transistor even for a given transistor type. A good circuit
design is one that does not depend critically on the exact value of but only on the fact
that is a large number.
Figure 6.1 illustrates the denitions of transistor voltages and currents. Note that it is
always true that
= IC + IB .
(6.1)
= ( + 1)IB IC ,
(6.2)
IE
In the active range,
IE
(6.3)
6.1. INTRODUCTION
59
(6.4)
where Re is the equivalent resistance from the emitter terminal to ground. For the output
resistance we will obtain,
Rs
Ro =
,
(6.5)
+1
where Rs is the equivalent source resistance. Hence, a large helps make the input resistance
high (the circuit draws only a small amount of current and therefore receives the maximum
voltage signal from the source) and the output resistance low (the output voltage is independent
of the loadi.e., of the current drawndown to small loads). When you see such statements as
these, you should think of (and even draw) Th`evenin equivalent circuits; here, draw (i) the
equivalent circuit of a source and the input of the transistor circuit and (ii) the equivalent for
the transistor circuit output and a load justify the statements.
60
6.2
The work in this section must be completed and signed o by an instructor before you start
working on the lab. Do this work in your lab book.
12 V
4.7 k
V
4.7 k
470
R
o
1. Draw the voltage divider and the Th`evenin equivalent of the voltage divider from the
gure above. Be sure to determine both Vth and Rth .
61
2. Draw the emitter follower and the Th`evenin equivalent (as seen looking into the base)
of the emitter follower. (You may assume 100 for this transistor.)
3. What is the eect of the emitter follower on the output of the voltage divider?
4. Draw the Th`evenin equivalent for the entire circuit as seen from the output of the
transistor. You do not need to compute Vth and Rth , but EXPLAIN how you would
measure them.
62
6.3
In this lab we will utilize the following equipment. This equipment is located at your lab
station.
1. The Tektronix TDS 2012B digital oscilloscope.
2. Two P2220 probes for the oscilloscope.
3. One USB memory stick which is no larger than 2GB.
4. The Interplex Electronics 1200CA-1 power brick and bus connector.
5. The Stanford Research Systems DS335 signal generator.
6. One BNC to alligator cable.
7. The Metex 4650 digital meter.
8. The Global Specialities PB10 proto-board (see Appendix A for a description).
You will also need the following components in order to carry out this lab. It makes more sense
to get them as you need them, rather than all at once before the start of the lab.
1. 10 resistor.
2. 100 resistor.
3. 4.7 k resistor.
4. One 2N 2222 npn switching transistor.
5. Additional resistors and capacitors you choose to match your circuit designs.
6.4
Procedure
First, you will demonstrate the impedance transformer property of the emitter follower using
just DC voltages. To take advantage of this same property, but applied to AC signals, requires
some additional complications that you will learn about in 6.4.2.
6.4.1
DC Emitter Follower
Use an emitter follower circuit to make a good voltage source out of a lousy one. You should
recall from previous work what constitutes a good voltage source. The circuit in Figure 6.3
shows a voltage divider driving an emitter follower circuit. The large resistances (4.7 k) in
the divider mean that any load driven by the divider would need to have a resistance much
larger than 4.7 k, making this lousy voltage source.
We are going to combine this with the transistor emitter follower to make a voltage source
whose output terminals are indicated by the two open dots near V0 in Figure 6.3. You should
think of everything up to those dots as being the new and improved voltage source whose
characteristics you want to measure.
6.4. PROCEDURE
63
12 V
4.7 k
4.7 k
V
470
R
0
Figure 6.3: DC Emitter Follower Circuit. This circuit is an impedance transformer in that the
I-V characteristic of the output terminals () has a slope that corresponds to a smaller source
resistance than does the I-V characteristic of the Voltage Divider Source by itself. Because the
circuit delivers more power to a small load, RL , than the Voltage Divider Source would by itself,
the emitter follower can have signicant power gain.
1. First, in your notebook, draw the circuit with the input (the voltage divider) replaced by
its Th`evenin equivalent. Draw the transistor circuit attached to this equivalent. Next,
draw the same equivalent circuit of the voltage divider with the transistor circuit replaced
by its equivalent as seen from the base; what is the value of the load resistance seen by
the voltage divider?
2. On the same graph you will use for the emitter follower output, draw the expected I-V
curve for the divider circuit; i.e., for the Th`evenin equivalent just drawn. Use axes that
show the global behavior, going from zero to the maximum values of I and V.
3. Build the circuit shown in Fig. 6.3. You can use the on-board 12V power supply as the
DC source. With multi-part circuits, it is always a good idea to build and test the circuit
in sections. Follow this sequence:
(a) Build the voltage divider rst. Test the output voltage and verify that it is as
expected. You might want to put a load resistor across the output to make sure
your work above is correct.
(b) Add the transistor and emitter resistor but keep RL = . It is advisable to ground
the negative side of the DC power supply used to supply 12V to the divider and the
transistor. Note that because the DC supply is such a good voltage source (constant
voltage regardless of current being supplied), you can think of it as independently
supplying 12V to both parts of the circuit.
(c) What is the voltage divider output now? Is this as expected?
(d) Is V0 the expected value?
(e) If your measurements for any of the above are puzzling, check the DC supply voltage
is this being shorted out? Is the power turned on?
64
What would happen to the functioning of this circuit if we chose voltage divider resistors of 100k (perhaps to reduce power consumption)?
6.4. PROCEDURE
65
What are the minimum and maximum input voltages this circuit canfollow (given
a xed 12V supply at the collector)?
6.4.2
AC Emitter Follower
Before going further, you should understand how the circuit in Fig. 6.4 operates. What are
the functions of C1 and C2 ? What do R1 and R2 achieve? Once you understand the design
principles of this circuit, follow the steps below to select appropriate components for an audio
amplier.
v
C
v
R
C
R
R
VCC
66
Test the circuit operation: can large AC signals still be passed? Does the low-frequency
cut-o change? Is the high-frequency behavior still the same?
Chapter 7
7.1
Introduction
The common emitter amplier appears to be a subtle variation on the emitter follower studied
in lab 6. The collector is attached to the supply through a resistor instead of directly and
the output is taken from the collector terminal of the transistor instead of the emitter. The
emitter may be connected directly to the ground. (Hence the name, common emitter, since the
input and output signals share the common ground at the emitter.) As discussed in the text,
this gives a large gain but has poor linearity, an input impedance that is a function of input
voltage, and is dicult to bias properly. We will use the slightly modied inverting amplier
that includes a resistor RE between the emitter and ground as shown in Fig. 7.1. We will nd
that the gain of the amplier can be controlled with proper selection of RE .
In spite of the similarities, the behavior of this circuit is signicantly dierent from the
emitter follower:
1. We can arrange for signicant voltage gain.
2. The output signal (that is, the AC signal) is inverted relative to the input.
3. The output resistance is quite a lot larger than that of the emitter follower.
67
68
VCC
RC
v
v
C
R
R
R1
If we try to decrease RE toward zero to get higher gain, we nd that the intrinsic emitter
resistance, rE becomes important and limits the gain. rE accounts for the fact that our standard
diode drop of 0.65 Volts is only an approximation. The drop, VBE , is actually a function of
the current through the diode junction as you saw in Lab 1. Based on the I-V characteristic of
a diode, the text argues that
rE
25 mV
IC
near room temperature. For IC = 10 mA, rE = 2.5 (this means that for a 1mA change in
current, VBE changes by 2.5 mV out of the roughly 0.65 Volt total drop). We should write
G=
RC
.
RE + rE
(7.2)
In deciding on component values, we need to change the base bias resistor values (relative to
the emitter follower) in order to set the collector operating point (the collector voltage at zero
AC input) near VCC /2; again, we do this so as to maximize the possible output voltage swing
(which certainly cannot extend below zero volts or above VCC ). Recall that for the follower,
we biased so that the emitter voltage (which was then the output) satised this requirement.
Now we require that
1
(7.3)
VC = VCC IC RC VCC
2
7.1. INTRODUCTION
69
or
IC =
1 VCC
VE
|G|
IE =
=
VE .
2 RC
RE
RC
(7.4)
1 VCC
.
2 |G|
(7.5)
VB = VE + 0.65Volts =
1 VCC
+ 0.65Volts.
2 |G|
(7.6)
This is a lower base voltage than we used for the follower which means that the base or input
voltage wont be able to swing as far as in the follower case (without turning o the transistor).
This is okay: we are building a voltage amplier because we only have a small signal to begin
with!
The output resistance of this circuit (i.e., the Th`evenin equivalent resistance at the output)
is just RC . You should always remember that the collector behaves like a current source and
has large resistance (the IC -VCE characteristic curves are nearly horizontal; the current of the
current source is controlled by the base-emitter voltage see section 5.3.3 ). To get high gain,
we want large RC , but we pay by having a large output impedance.
In selecting R1 and R2 , keep in mind that we want the base bias voltage to be fairly
independent of the of the transistor. To do this, we want the base bias circuit to yield the
same voltage when attached to the transistor as it does all by itself. In other words (#1), we
want to lose only a small fraction of the dividers current into the base. In other words (#2),
the Th`evenin equivalent resistance of the bias circuit should be small compared to the input
resistance of the base (this is the same logic we used for the follower). The base input resistance
is as for the follower:
Rin = ( + 1) (RE + rE ) .
70
7.2
The work in this section must be completed and signed o by an instructor before you start
working on the lab. Do this work in your lab book. After reading the Section 7.1 of your lab
write-up, we want to determine some relevant component parameters. Assume that VCC = 12
V and that the gain, G = 10.
71
7.3
In this lab we will utilize the following equipment. This equipment is located at your lab
station.
1. The Tektronix TDS 2012B digital oscilloscope.
2. Two P2220 probes for the oscilloscope.
3. One USB memory stick which is no larger than 2GB.
4. The Stanford Research Systems DS335 signal generator.
5. The Interplex Electronics 1200CA-1 power brick and bus connector.
6. One BNC to alligator cable.
7. The Metex 4650 digital meter.
8. The Global Specialities PB10 proto-board (see Appendix A for a description).
You will also need the following components in order to carry out this lab. It makes more sense
to get them as you need them, rather than all at once before the start of the lab.
1. 100 resistor.
2. 1 k resistor.
3. 10 k resistor.
72
4. One 2N 2222 npn switching transistor. The pin out for this transistor is reproduced in
Figure 7.2.
5. Additional resistors and capacitors you choose to match your circuit designs.
Ic
Ib
2N2222
B CV
+ E CE
VBE
E
B
Ie
Figure 7.2: The npn transistor schematic symbol, notation, and lead conguration for the 2N2222
transistor.
7.4
7.4.1
Procedure
Inverting Amplier
7.4. PROCEDURE
73
What is the relevant resistance that determines this roll-o ? Draw the relevant equivalent circuit and indicate element values.
4. For a 0.1 V peak-to-peak input at a moderate frequency (f 1000 kHz), sketch (or
capture) the voltages VB ,VE , and VC .
5. For a 0.1 V peak-to-peak input, measure the frequency dependence of the gain and plot
your measurements on a Bode plot. Determine the 3dB points (provided you have the
frequency range available).
Do you think the high frequency roll-o is due to the scope input impedance or is it
intrinsic to the transistor circuit (this could include the possibility of stray capacitance
in the circuit)? Draw the equivalent circuit for this measurement.
6. Pick a mid-range frequency and determine the input voltage dependence of the gain i.e.,
is G dependent on |Vin |?. It may help here to view the output alternately using DC and
AC coupling on the scope. Use AC to accurately see the signal amplitude,. Use DC to
see the actual collector voltage relative to ground and the supply voltage.
74
What is the maximum input voltage that yields an undistorted output signal? What
is it that limits the output?
7. Measure the output resistance of this circuit. Use a mid-range frequency and a mid-range
amplitude. To do this, you need to measure two points on an I V curve for the output
of the transistor. However, we are going to do this using an AC voltage. One point is
the open circuit voltage, while to get a second point on the I V curve, we want to
attach a 4.7 k resistor from the output of the circuit to ground. We then measure the
voltage across this known resistor.
7.4. PROCEDURE
75
Sketch the Th`evenin equivalent as seen at the output of the transistor circuit. If we
just attached this resistor, what will happen to the DC voltage, VC ?
To avoid changing the gain and DC operating point of the circuit, we need to use a
blocking capacitor between the output of the circuit and the resistor to ground. This is
like what you did for the AC emitter follower. Chooses a suciently large capacitor such
that its impedance is small compared to 4.7 k resistor at the frequency you are using.
Do you see the expected result? In other words, is the output impedance what you
expect it to be?
7.4.2
Now try boosting the gain by placing a by-pass capacitor across RE as shown in Fig. 7.3 (see
discussion of Fig. 5.29 in the textbook). As in the previous measurement, this capacitor will
not aect the DC operation of the circuit. However, at signal frequencies, the capacitor should
eectively short out the emitter resistor RE and the gain becomes G = RreC . Measure the
frequency response and the range of input linearity for this circuit and compare to the lower
76
gain circuit studied above. Make sure that you try to measure both the low-frequency and the
high-frequency 3 dB points.
VCC
RC
v
v
C
R
R C
R1
7.4. PROCEDURE
77
VCC
RC
v
v
C
R
R
R
C
R1
Figure 7.4: The inverting amplier with a bypass capacitor and a bypass resistor.
78
Chapter 8
Introduction to Operational
Ampliers
Reference Reading: Chapter 6, Sections 6.1, 6.2, 6.3 and 6.4.
Time: Two and one half lab periods will be devoted to this lab.
Goals:
1. Understand the use of negative feedback to control amplication
2. Understand the concept of slew rate
(a) Be able to dene slew rate
(b) Be able to measure slew rate
(c) Understand how nite slew rate puts limitations on the use of operational ampliers
3. Be able to design and construct the following op-amp circuits:
(a) Voltage follower
(b) Inverting amplier
4. Observe the eect of an op-amps nite gain
8.1
Introduction
Read text sections 6.1 through 6.4 of your textbook before starting.
For reference, the pin conguration for the 741 and the 411 op-amps is shown below. You
will use the proto-board power supply to power the op-amp. You should compare your results
to the specications available in the textbook.
79
80
Offset 1
No Connection
v_
VCC
v+
vout
VEE
Offset
2
3
Figure 8.1: The pin connections for the 741 and the 411 op-amp.
8.2
81
The work in this section must be completed and signed o by an instructor before you start
working on the lab. Do this work in your lab book.
v R
v
f
in
in
82
2. Look at Figure 8.2. What must the voltage at the negative input of the Op-amp be?
What is the voltage drop across Rin ? What is the voltage drop across Rf ?
8.3
In this lab we will utilize the following equipment. This equipment is located at your lab
station.
1. The Tektronix TDS 2012B digital oscilloscope.
2. Two P2220 probes for the oscilloscope.
3. One USB memory stick which is no larger than 2GB.
4. The Interplex Electronics 1200CA-1 power brick and bus connector.
5. The Stanford Research Systems DS335 signal generator.
6. One BNC to alligator cable.
7. The Metex 4650 digital meter.
8. The Global Specialities PB10 proto-board (see Appendix A for a description).
You will also need the following components in order to carry out this lab. It makes more sense
to get them as you need them, rather than all at once before the start of the lab.
1. 1 k resistor.
8.4. PROCEDURE
83
2. 10 k resistor.
3. One 411 OpAmp
4. One 741 OpAmp
5. Additional resistors and capacitors you choose to match your circuit designs.
8.4
8.4.1
Procedure
Voltage Follower
Use a 741 op amp to build a voltage follower as in Fig. 8.3. Note that, as is conventional, the
power pin connections, +VCC and VEE , are not indicated on the diagram (but you need to
include them) and we use no connection to the oset null pins.
vin
v
o
Slew Rate: Start by investigating one of the serious limitations of many op-amps: the slew
rate. The slew rate is the maximum rate at which the output voltage can change. (Typical units
would be volts per microsecond.) The eect of an op-amps slew rate limitation is illustrated
for two output waveforms in Fig. 8.4.
1. Measure the slew rate of the 741 by using a square wave input and observing the output
of the follower. At an input amplitude of, say, Vpp = 5 V, the output square wave will
not change abruptly, but will change to the new value by a straight line with nite slope.
The slope of the line gives the slew rate. You will have to adjust the DS335 square wave
period (and scope time scale) to nd where you can observe this phenomenon.
Are the slew rates on the rising and falling edge of the square wave the same?
84
(a)
output if
not slew-rate
limited
(b)
Figure 8.4: Slew rate limitations illustrated for square wave and sinusoidal wave inputs to an op
amp.
2. To understand the connection between slew rate and frequency response, calculate the
maximum rate of change of a sinusoidal voltage, v(t) = V cos t. Use this result to nd
the relation between amplitude and frequency for which this maximum rate of change
equals the 741s slew rate.
What is the maximum frequency (in Hz) you can use without encountering slew rate
distortion if the signal is 5 V peak-to-peak? If it is 1 V ? If it is 0.1 V ?
3. Make the same measurements for the 411 op-amp and compare to the 741.
8.4. PROCEDURE
85
Gain: It is dicult to measure the open loop gain of even the 741 Op-amp because it is so
large. However, at high frequencies, the open-loop gain rolls o and becomes measurable.
1. Compare the input and output voltages a follower built using the 741 Op-amp over the
entire frequency range of the DS335. Use an input of Vpp = 0.1 V . Make a Bode plot of
the gain, |G(f )|, and a plot of the phase shift, (f ), between input and output signals.
Why might we want to use a small input voltage for this measurement?
2. Observe the eect of larger input voltages. You should see distortion in the output at
high frequencies when the input signal exceeds the slew rate.
3. Repeat the previous measurements using the 411 Op-amp.
From the above small-signal measurements, you can determine the high-frequency openloop gain, A(f ) of the 741 (i.e., the dierential gain), but some analysis is required. We walk
through that as follows. You should understand all the steps here.
The output voltage is
(8.1)
vo = A(f ) (v+ v ) .
The relation between the op-amps open loop gain A(f ) and the actual gain of the circuit G(f )
depends on the negative feedback loop in the circuit. In a voltage follower circuit, input (vin )
is connected to the non-inverting input (v+ ) and the output is connected directly to inverting
input (v ). Thus
vo = A(f ) (vin vo )
(8.2)
or
G(f ) =
G(f ) =
vo
vin
A(f )
A(f ) + 1
(8.3)
G(f )
.
1 G(f )
(8.4)
86
Keep in mind that all bold faced quantities are complex numbers. To determine | A(f ) |, you
can write G in terms of a magnitude and phase as
G(f ) = | G(f ) | ej(f ) .
(8.5)
+ G2
G
.
2G cos
(8.6)
For both the 741 and the 411 op-amps, make a Bode plot of A(f ) in the region where you
can measure it from (8.4) or (8.6), when G 1 and 0, A is large and dicult to measure
quantitatively) and determine the slope of the straight line that best ts the high frequency
region of the results. Find the frequency, fT at which the magnitude of the open loop gain
A(f ) is unity.
Follower Input and Output Impedances: It is also dicult to measure either the input
or output impedances of this circuit. Use the 411 Op-amp for the following. You do not need
to carry out these measurements using the 741.
1. To show that the output impedance is small, observe the gain at f = 1 kHz with an
output load of 10 . Note that the maximum output current of the 411 is about 20 mA,
so limit the output voltage to less than 200 mV .
Can you calculate the output impedance from this measurement? Is it large or small?
2. To demonstrate the large input impedance, insert an 8.2 M resistance in series with the
input and compare the gain at f = 1 kHz to that measured with a direct input from the
DS335.
8.4. PROCEDURE
87
What does this say about the input impedance of the follower?
8.4.2
Here, you will construct and test two inverting amplier circuits, one with gain, G = 10
and one with G = 100. The tests include determination of the DC gain (for the G = 10
case only) and a comparison of the frequency responses of the two circuits (these will also
be compared to that of the voltage follower measured previously). You will use a xed input
resistance of 1 k and the only the 741 Op-amp.
v R
v
f
in
in
(8.7)
(8.8)
88
2. Measure and make a Bode plot of the frequency response of your amplier (you only need
to measure the amplitude response, not the phase shift). Keep in mind, and avoid, the
slew rate limitation of the 741 op amp. Plot 20 log G() on scales which will allow you
to add the G = 100 measurements you will do next.
Build the G = 100 amplier:
1. Measure the frequency (amplitude) response of your amplier. Add these data to the
plot you began above.
The Behavior of the Gain
To understand what you see in the above measurements, we again have to go beyond the zeroth
order analysis. In the above calculations, we assumed that the gain of our Op-amp (A) was
innite, or very large. This led to us nding that the gain of our circuit is given as equation 8.8.
We will refer to the is G , and write that
G =
Rf
.
Rin
(8.9)
We now admit that the Op-amps gain is not innite (we already know it is reduced at high
frequencies) but we keep the approximation that the input resistance is high. Thus, we still
can approximate the behavior be saying that no current can ow into the input of the Op-amp.
8.4. PROCEDURE
89
From Figure 8.5, we have that v+ = 0 as it is connected to ground. Now in this approximation, we will not apply our Op-amp rule that v = v+ , but rather note that there is some
voltage, v at the inverting input. The output voltage, vo is then given as the open-loop gain,
A as
vo = A() (v+ v ) .
(8.10)
vo = A() v .
(8.11)
vo
A()
(8.12)
iin =
(8.13)
and since no current ows into the Op-amp, all this current goes through the feed-back resistor,
if
= iin .
(8.14)
v vo
.
Rf
(8.15)
This is where we continue to assume that the input impedance is innite. We can now
substitute for our unknown v , and the collect all the terms that include vo . Doing so, we nd
vin = vo
1 Rin
1
Rin
+
+
Rf
A() A() Rf
(8.16)
vo
vin
(8.17)
G() = G
A()
A() + G + 1
(8.18)
As long as |A| >> |G |, then we have that G = G , as we found from our simple
calculation. However, as |A| becomes less than |G |, the gain, G becomes limited by the
open-loop gain. We get
G() =
A()
1 + 1/Ginf ty
(8.19)
90
which in our limit is
G() A() .
(8.20)
This is almost independent of the intended G when this number is large. This is the result
you should observe at high frequency. What you have measured is |G()| which should become
equal to |A()| at high frequency. You should see that each circuit becomes limited by A()
at a dierent frequency. The product of the innite gain and the 3 dB frequency is known as
the gain-bandwidth product.
What is the gain-bandwidth product for each of your circuits from above?
8.4. PROCEDURE
91
Make a single Bode plot that contains the results for both your 10 and 100 circuits
and the open-loop gain that you measured. Discuss what you observe on this plot in terms
of the previous discussion.
92
Chapter 9
9.1
Introduction
All the circuits here are based on the inverting amplier conguration of the last lab. However,
we nd here that we can make circuits that perform mathematical functions (integrators and
dierentiators) that are far superior to the passive circuits built in lab 4. To obtain the best
functionality, we use the 411 op-amp.
In Figure 9.1 we show a generalized inverting amplier circuit, where impedances Zin and
Zf replace the resistances Rin and Rf that we studied before. Through the same arguments
as earlier, we have that the gain of this circuit is just
G =
Zf
.
Zin
(9.1)
In the following, we specify the two impedances as a resistor and a capacitor and study the
resulting circuit behaviour.
9.1.1
The Integrator
We will rst consider the simple integrating circuit shown in Figure 9.2. For this circuit, the
inverting input, v , is a virtual ground because the op-amp golden rules tell us v = v+ . The
93
94
Z
v
v
Z
f
in
in
Cf
dvo
dt
vin
Rin
(9.2)
or
vo (t) =
1
Rin Cf
t
vin dt
(9.3)
This time domain treatment shows that the output is 1/(Rin Cf ) times the integral of the
input voltage. It is also instructive to consider the behavior in the frequency domain. First
note that a time-dependent signal can be written as the sum of sinusoidal signals
v(t) = Re
jN t
VN e
(9.4)
v(t)dt = Re
(jN )
jN t
VN e
C
v
v
R
f
in
in
(9.5)
9.1. INTRODUCTION
95
Thus, to form the integral of a general waveform, we need a magnitude response that scales
as 1/ and that has a 90 phase shift over the relevant frequency range. Since the gain of the
generalized inverting amplier (shown in Fig. 9.1) is
G = Zf /Zin ,
(9.6)
the gain of the circuit shown in Fig. 9.2 is just (jRin Cf )1 , so we see that each term is
weighted by the (jN )1 factor required in (9.5) to give the Fourier components of the integral.
This again shows that the output is proportional to the integral of the input with the same
1/(Rin Cf ) proportionality factor as above.
9.1.2
The Dierentiator
The gain of the circuit shown in Figure 9.3 is computed as before from the generalized inverting
amplier.
G() = Zf /Zin = jRf Cin
(9.7)
Using (9.4),
dv
dt
= Re
jN t
(jN ) VN e
(9.8)
so to take the derivative, we need to multiply each Fourier coecient by its frequency, , and
introduce a 90 phase shift. The factor of j in (9.7) shows that the circuit does exactly that.
Thus the circuit in Fig. 9.3 is a dierentiator. You may wish to prove to yourself (or see
your class notes) that a time-domain treatment of the circuit gives the same results.
R
v
v
C
f
in
in
Complications. In practice, both these idealized circuits suer from a similar problem. For
the integrator, we must realize that the input signal is likely to have a small DC oset. Even a
very small DC current will charge up the capacitor and cause the op-amp to reach its maximum
output voltage within a short time period. For a frequency domain treatment of this problem,
remember the gain of the integrator is (jRC)1 . Thus any non-zero DC input (which corresponds to = 0) will have innite gain for an idealized op-amp. In reality, this means the
96
op-amp output will reach its maximum voltage very quickly. A practical op-amp integrator
circuit must be modied to keep the gain nite at low frequencies.
Similarly, the idealized dierentiator has a gain of jRC that becomes large at high frequencies. This is both very dicult to achieve and makes the circuit subject to high frequency
noise. A practical circuit will cut o the divergence of the gain at large so that the output
is not dominated by high frequency noise. The op-amp open-loop gain, A(), will eventually
reduce the gain at high frequencies. This implies that there is a peak in the gain somewhat like
that in a resonant circuit.
The circuits you build in the following sections will demonstrate, at least to some extent,
how to cope with these problems.
9.2
This lab is a natural continuation of lab 8 and there are no preliminary questions.
9.3
In this lab we will utilize the following equipment. This equipment is located at your lab
station.
1. The Tektronix TDS 2012B digital oscilloscope.
2. Two P2220 probes for the oscilloscope.
3. One USB memory stick which is no larger than 2GB.
4. The Interplex Electronics 1200CA-1 power brick and bus connector.
5. The Stanford Research Systems DS335 signal generator.
6. One BNC to alligator cable.
7. The Metex 4650 digital meter.
8. The Global Specialities PB10 proto-board (see Appendix A for a description).
You will also need the following components in order to carry out this lab. It makes more sense
to get them as you need them, rather than all at once before the start of the lab.
1. 1 k resistor.
2. One 411 OpAmp
3. One 741 OpAmp
4. One 1N 4004 diode.
5. Additional resistors and capacitors you choose to match your circuit designs.
For reference, the pin conguration for the 741 and the 411 op-amps is shown in Figure 9.4.
9.4. PROCEDURES
Offset 1
v_
97
No Connection
VCC
v+
vout
VEE
Offset
2
3
Figure 9.4: The pin connections for the 741 and the 411 op-amp.
9.4
Procedures
9.4.1
Integrator
98
v
R
v
f
in
Figure 9.5: A practical integrator circuit including feedback resistor Rf to introduce a low frequency
cuto.
v
R
v
C
f
in
in
in
Figure 9.6: A practical dierentiator circuit including input resistor Rin to introduce high frequency
cuto.
9.4.2
Dierentiator
9.4. PROCEDURES
99
3. Measure the frequency response (magnitude and phase), over the relevant frequency
range. Does the circuit work as designed? Discuss reasons for any deviations from
your expectations.
4. Dierentiate both a square wave and a triangle wave. For the triangle wave, quantitatively
compare with the expected amplitudes of the derivative. Vary the fundamental frequency
of the input waves and observe the circuit limitations at low and high frequencies. You
may observe a ringing response to the square wave; compare the period of the ringing to
the characteristic time determined by your frequency response curve.
9.4.3
Logarithmic Amplier
The circuit shown in Fig. 9.7 can be used to make a crude logarithmic amplier. Note that
this is a non-linear circuit (a sine wave in will not generate a sine wave out), so our analysis is
restricted to the time-domain.
To understand why the output behaves as the log of the input, remember that the diodes
I-V curve can be approximated as:
I = Io (eV /VT 1) Io eV /VT
(9.9)
where Io and VT are constants and V is the diode voltage; the approximation holds for V > VT .
Write the relation between Vi and Vo (remember that the inverting input is a virtual ground).
If you plot Vo vs. log(Vi ), you should get a straight line.
1N4004
v
i
1 k
100 k
100
Chapter 10
10.1
Introduction
In this lab, we will connect the analog world we have been working in to the world of digital
circuitry. For analog circuits, we often are concerned with the value of the voltage at an output.
This voltage is often a function of the voltage at the input. However for digital circuits, a single
output is used only to carry information which can be categorized as TRUE or FALSE. For
example, a convention, called TTL or transistor-transistor logic, is often used: Any output
voltage that is less than 0.5 volts is interpreted as meaning FALSE and any output voltage
greater than 2.7 volts is interpreted as TRUE (voltage levels in between will be avoided). We
could also use a 0 instead of FALSE and a 1 instead of TRUE (or even vise versa). Each input
or output of the circuit represents a bit of information. The bit can only represent information
which can be categorized as TRUE or FALSE such as the answer to Has a button been pushed?
or Is a switch in the ON position?
With the use of several binary bits, we can represent numbers. For example, three bits can
be used to represent any number from 0 to 7.
3 bit binary 000 001 010 011 100 101 110 111
decimal
0 1 2 3 4 5 6 7
101
102
10.2
103
The work in this section must be completed and signed o by an instructor before you start
working on the lab. Do this work in your lab book. Consider the voltage summing circuit
shown in the gure below. Answer the following questions in terms of the resistors R1 , R2 , Rf
and the two input voltages, V1 and V2 .
V
R1
V
R
R
V
1
out
104
6. Explain why we would call this an adder. (Consider in particular, the case in which
R1 = R2 = Rf .)
10.3
In this lab we will utilize the following equipment. This equipment is located at your lab
station.
1. The Tektronix TDS 2012B digital oscilloscope.
2. Two P2220 probes for the oscilloscope.
3. One USB memory stick which is no larger than 2GB.
4. The Interplex Electronics 1200CA-1 power brick and bus connector.
5. The Stanford Research Systems DS335 signal generator.
6. One BNC to alligator cable.
7. The Metex 4650 digital meter.
8. The Global Specialities PB10 proto-board (see Appendix A for a description).
10.4. PROCEDURE
Offset 1
v_
105
No Connection
VCC
v+
vout
VEE
Offset
2
3
Figure 10.2: The pin connections for the 741 and the 411 op-amp.
You will also need the following components in order to carry out this lab. It makes more sense
to get them as you need them, rather than all at once before the start of the lab.
1. Two 1 k resistor.
2. Four 1% 10 k resistors.
3. Five 1% 20 k resistors.
4. One 411 OpAmp
5. Four single-pull, double-throw switches.
6. One 2N3646 npn transistor.
7. One 1 k potentiometer.
8. Additional resistors and capacitors you choose to match your circuit designs.
For reference, the pin conguration for the 741 and the 411 op-amps is shown in Figure 10.2.
10.4
Procedure
10.4.1
Build the following two-input summing amplier. Use a DC source of 5V for the +5V. For the
0V,1V input set your DS335 signal generator to a square wave of 1 Volt peak-to-peak and
apply a voltage oset to produce a signal that switches between 0V and -1V.
Design the circuit so that you obtain an output square wave which alternates between 0 and
5 V. The zero-order analysis is all you need to design this circuit; the feedback current is just
the sum of the currents generated in the input resistors and the negative input to the op-amp
is a virtual ground. Verify that the output represents a weighted sum of the two inputs. You
need to decide what the values of R1 , R2 and Rf are. A good rule of thumb is that for inputs
on the order of volts, we want currents in milliamps. Demonstrate that the output switches
106
+5V
R1
1V
0V,
R
R
2
10.4.2
Use the summing amplier concept to build a DAC using your R-2R ladder circuit from early
in the semester. In this example circuit, the digital side is set by mechanical switches (rather
than a computer) and the analog output is at the op-amp output. The switches, which have
been adapted so they plug into your proto-board) are single pole, double throw. Single pole
means there is one input wire. Double throw means this input can be switched between two
possible output terminals. Be sure you understand which pins are connected for each switch
position before starting to connect up your circuit. In this circuit, a switch which connects the
R-2R resistor to ground corresponds to a 0, whereas a switch which connects the R-2R resistor
to virtual ground (the op-amp input), is a 1. Verify the DAC operation through the 24 switch
settings. In your notebook, specify the bit corresponding to each switch.
10.4.3
Transistor Switch
Use a 2N3646 npn transistor to build the simple digital switch of Fig. 10.5. The operation is
as follows:
a) A 0 Volt input turns the transistor o since VB = VE and the base-emitter junction is
not forward biased. What is VC = Vo in this case?
b) A 5 Volt input strongly forward biases the base-emitter junction. Assuming the transistor
is conducting, what is VB ? Assuming the transistor is in its linear operating range, what
10.4. PROCEDURE
+5 V
107
2R
2R
2R
2R
2R
2R
o
Vcc = 5 V
Rc = 1 k
Vi
1 k
Vo
108
Over what range of input voltages does the output switch states?
How fast can this switch operate? Here, use a 5 V peak-to-peak square wave from the
DS335 with a DC oset so that the voltage varies from 0 to 5 V instead of 2.5 V. To how
high a frequency does the output form a square wave?
At very high frequency, can you see that there is a delay in turning the transistor o ?
Is there a corresponding delay in turning the transistor on? Such delays are intrinsic
limitations of saturated logic bipolar junction transistor circuitry.
10.4. PROCEDURE
10.4.4
109
Op-Amp Comparator
Build the comparator shown in Fig. 10.6 using a 411 op-amp. In this circuit, an adjustable
reference voltage Vr is created using a potentiometer. The 411 op-amp is used to compare the
input signal, Vin , with the reference voltage, Vr . Since there is no feedback network, the op-amp
goes to negative saturation as soon as Vin > Vr and to positive saturation when Vin < Vr .
Check the behavior of this circuit by observing its output when a triangular waveform is
used as the input (visualize both signals on the oscilloscope). Try varying Vr .
vin
Vr
+12 V
1 k
vout
10.4.5
Schmitt Trigger
The output of the comparator shown in Fig. 10.6 is uncertain when Vin Vr (i.e., it is very
sensitive to the exact values). In actual use, we need to worry about what happens as our input
signal crosses Vr . In many applications, the input signal may be varying slowly (compared to
the transition time of the circuit) and may be noisy. In this case, the comparator could
output a series of short pulses as the transition voltage is crossed. This is undesirable behavior.
vin
+12 V
1 k
v
R = 1 k
Vr
out
Figure 10.7: A Schmitt trigger comparator where the reference voltage can be adjusted using the
1 k potentiometer.
Using positive feedback, we can build a circuit that minimizes this problem. Positive feedback
generates hysteresis: once the output switches states, a small noise signal on the input will not
cause the output to switch back. This handy detector circuit is call the Schmitt trigger.
110
Build the circuit shown in Fig. 10.7. Explore the behavior of this circuit using a triangular
waveform for an input signal. Note how the reference voltage used to dene the transition
point for an increasing input signal is higher than the reference voltage for a decreasing signal.
This is the characteristic of positive feedback used in the Schmitt Trigger.
10.4. PROCEDURE
111
Explain how this behavior can be used to avoid oscillations as a noisy input signal crosses
the reference voltage level.
112
Chapter 11
11.1
Introduction
In this lab, we will become familiar with logic gates and the use of more complicated logic
circuits. We will also set up a clock circuit and use it to drive a counting circuit. The logic
gates that we will be using come in rectangular packages called DIPs (dual in-line packages)
as shown in Figure 11.1. The pin numbering scheme is standard over all such chips and is
indicated in the gure. Not only will the IC have inputs and outputs related to the logic gates
inside, it will also have an external power (VCC ) and ground connections. As with op-amps,
these power connections are not typically shown in circuit diagrams, but are crucial to the
operation of the chip.
11.2
114
2 1
3
5 4
13 14
6
12
7
10 11
9
8
Figure 11.1: The pin numbering scheme on rectangular IC packaging. The tab as indicated by the
dark oval in the diagram tags the end of the chip with the lowest and highest pin numbers.
11.3
In this lab we will utilize the following equipment. This equipment is located at your lab
station.
1. The Tektronix TDS 2012B digital oscilloscope.
2. Two P2220 probes for the oscilloscope.
3. One USB memory stick which is no larger than 2GB.
4. The Interplex Electronics 1200CA-1 power brick and bus connector.
5. The Stanford Research Systems DS335 signal generator.
6. One BNC to alligator cable.
7. The Metex 4650 digital meter.
8. The Global Specialities PB10 proto-board (see Appendix A for a description).
You will also need the following components in order to carry out this lab. It makes more sense
to get them as you need them, rather than all at once before the start of the lab.
1. Eight 220 resistors.
2. Two 1 k resistors.
3. Five 1% 20 k resistors.
4. One 7400 Nand Chip.
5. One 7402 Nor Chip.
6. One 555 Clock chip.
7. Eight LEDs.
11.4. PROCEDURE
115
11.4
Procedure
11.4.1
Logic Gates
In this section we will verify the functioning of simple logic gates. The operation of logic gates
are specied by truth tables as shown in the text. In order to verify the operation of a gate it
is necessary to measure the output for all possible combinations of inputs. In this section we
will verify the truth table for the 7400 NAND gate and the 7402 NOR gates ( pin-outs shown
in Figure 11.3). The specications sheets for these two gates can be found on the course web
site. Note that the pin conguration for the two integrated circuits is dierent. You will nd
that each of the ICs that we use are so-called quad packs, meaning that they each contain
four independent gates. We will only need to measure one of the gates in each IC.
While we could simply test this with a 5 V power supply and a DVM, we will build a
somewhat more sophisticated circuit for this. We will us a 5 V DC power supply and a single
ground connection to power the IC. We will also use the 5 V supply to provide the logic signals
to the IC. To do this, we will us a pair of single pole double throw switches (SPDT) to switch
the gate inputs between the supply level and ground. It is important to note that for logic
inputs we must use either 5 V or 0 V . We cannot simply let an input oat if we want 0 V . The
correct wiring is indicated in Figure 11.2.
+5 V
+5 V
Output
Figure 11.2: Two single pole double throw switches which are used to control the input to a NAND
logic gate. The output is then measured to the right of the gate.
You could use either the scope or an LED to observe the output. In this lab, we will measure
the output of the logic gate using an LED. When using LEDs to observe the output of TTL
logic, be sure to put them in series with current-limiting resistors. This limits the maximum
current to around 10 mA and will protect the output ports of the gates. Such a circuit is
shown in Figure 11.4, we can have the LED on either when the output is high or when it is
low, depending on which conguration we use. In fact, we could also connect LEDs to the two
inputs to the gate as well. In such a case, we could easily read o the truth table for our logic
gates.
Use the circuits to measure the truth tables for both the NAND and NOR gate as indicated
above. Demonstrate that it agrees with what is listed in your text book.
116
1A
14
VCC
1Y
14
VCC
1B
13
4B
1A
13
4Y
1Y
12
4A
1B
12
4B
2A
11
4Y
2Y
11
4A
2B
10
3B
2A
10
3Y
2Y
3A
2B
3B
GND
3Y
GND
3A
Figure 11.3: The pin out of the 7400 (left)and 7402 (right) chips. These each have four gates,
with inputs A and B and output Y. Note that they are not pin compatible.
220
5V
220
Figure 11.4: Current limiting resistors should be used in series with LEDs. (left) LED lights when
output high. (right) LED lights when output low.
In order to see how fast these ICs are and how clean the signals are at high frequency,
replace one of the switches with the DS335 (5V peak-to-peak, 2.5V oset square wave) and
drive the circuit at high speed. Tie the second input either to ground or to 5V so that the
DS335 switches the output, then look at the output on your scope.
Can you deduce a rough estimate for the maximum clock rate at which such circuits can
be used?
11.4. PROCEDURE
11.4.2
117
RS Flip Flops
A ip-op circuit is a memory circuit. It can be set into two possible output states. A common
holding input will then keep both of these output states until some input changes. In this sense,
the ip-op can hold one bit of informationeither a 0 or a 1. The simplest of the ip-op
circuits is an RS ip-op. In an RS ip-op, the R stands for RESET and the S stands for
SET. They can be thought of as either SETting the output to 1 or RESETting the output to
0.
Procedure An RS ip-op can be built using two NAND gates as shown on the left-hand side
of Figure 11.5. While the circuit diagrams in this section look deceptively simpleno resistors,
no capacitors, no inductorsthey are not. You will nd it necessary to be very careful in wiring
the circuits as there are lots of wires and interconnections. At this point, we will note that a
NAND and an inverted OR are the same thing. This amounts to an application of DeMorgans
theorem. If you switch where the inverting circles are (between inputs and outputs ) and switch
between OR and AND, you have the same thing you started with. Show that the truth table
for both a NAND gate and an inverted OR gate are the same.
Figure 11.5: The left-hand circuit shows an Reset-Set (RS) ip-op built from two NAND gates.
By DeMorgans Theorem, this can be shown to be logically equivalent to the circuit on the right
which has the negated R and S going into two OR gates.
We will now build an RS ip-op using the 74xx00 NAND gate that we used earlier. Dont
forget to wire up the +5 V and ground to your gate. SETing this circuit makes the Q output
high (and the Q output low). RESETting reverses this. Keeping the SET and RESET signal
o (which means at the supply voltage) leaves the circuit in its previous state. So the normal
state of the circuit is to have both inputs high. In this state, the output remembers which
input was last toggled from high to low and back to high again. Any number ( 1) of such
toggles yields the same output. As soon as the opposite input is toggled to low, the output
switches and stays the same when this input is returned to the high state.
You can use the switch set-up you used above to toggle the inputs to low and back to high.
Verify the memory feature of this circuit and the ability to set outputs to a desired state. Write
out the values of the four inputs to the two gates, for each of the four possible SET/RESET
input combinations. What happens when both the SET and RESET signals are present at the
same time? (Demonstrate the memory eect of this circuit.)
118
A Switch De-bouncer When we use a switch in a circuit, we nominally assume that its
output will be a perfect step function. Either going from low to high or from high to low, and
then remaining. Unfortunately, the mechanical nature of many switches leads to a situation
where the process of mechanically opening or closing a switch actually causes the switch to
bounce, and the output oscillates many times before settling in to the desired state. In many
situations, this is not desirable. An RS ip op can be used to de-bounce a switch. Once a RS
ip-op has changed states, it will not change back unless the other input is toggled. Because
a switch does not actually bounce back and forth between the two inputs, we can use an RS
ip-op to ignore the bounce. Such a circuit is shown in Figure 11.6.
+5 V
1 k
1 k
+5 V
Figure 11.6: An RS ip-op used to de-bounce the output from a switch. Once the ip-op changes
state, it will remain in the new state, independent of whether the switch bounces.
Build the de-bounce circuit shown in Figure 11.6 and demonstrate that it does function as
a switch. To see the de-bouncing eect, you can look at the input to the Set on one scope trace
and the Q output on the other. Note what you observe in your lab book.
11.4.3
Clocks
Digital electronics does not normally sit in some xed state, but rather performs logic operations
on input to produce output. The rate at which these operations are performed is dened by an
external clock. A typical processor chip for a computer has a rating that is in GigaHertz that
indicates the clock speed. While we will not be doing such high-speed electronics, we will set
up a clock in this lab and then use its output to drive a circuit. We will us a so-called 555 chip
for this. This is a very common chip whose pin-out has been standardized over all vendors.
This is shown in Figure 11.7. The circuit inside the 555 is shown in Figure 11.8. A detailed
discussion of how this works can be found in section 7.6 in your textbook. The basic idea is
to use an RC circuit to dene a characteristic time, RC , at which the clock ticks. However,
we have somewhat more control in that we can also control what fraction of the clock period
which is high and that which is low, fhigh and flow .
11.4. PROCEDURE
119
Ground 1
8 VCC
Trigger 2
7 Discharge
Output 3
6 Threshold
Reset 4
5 Control
Voltage
VCC
5k
2
3 VCC
Output
Threshold
V
5k
Discharge
Trigger
5k
R
S
1
3 CC
Figure 11.8: The circuit inside the 555, showing the two comparators and RS ip-op.
This functionality can be achieved using two resistors and a capacitor which are hooked up
externally to the 555. The appropriate circuit is shown in Figure 11.9. In terms of R1 , R2 and
C, it can be shown that the period of the clock is
T555 = ln(2) (R1 + 2R2 ) C .
The ln(2) comes from the exponential decay of an RC circuit and what fraction of the characteristic time it takes to fall below some threshold. In addition to the period, we have the high
and low fractions. These are given as
flow =
fhigh =
R2
R1 + 2R2
R1 + R2
R1 + 2R2
120
G
IS OK
P
IT O
Clock
R OD
555
C
CC
Figure 11.9: A 555 clock IC in a circuit to produce a clock output signal with period T = 0.693
(R1 + 2R2 ) C. The output is on the Clock line.
CLOCK CIRCUIT. It is also advisable that you try to build your clock circuit as close to
one end of your proto-board as possible. Otherwise, you will run out of board real estate later
in the lab.
In this lab, we would like to set up our 555 chip to have a period of about 1 second and to
have the high fraction be about twice the low fraction. Before starting, use the high and low
fractions to nd the relative size of the two resistors. Using the relation that you derived, it is
possible to calculate the needed capacitance for a specied resistance to yield the correct period.
Work out several possible values that use dierent orders of magnitudes of the capacitance,
(e.g F , 10s of F , 100s of F and 1000s of F . Based on the values you get, justify your
decision for your nal choice.
At this point, inventory the capacitors that are available in lab. Choosing one that we have,
determine the values of the needed resistances and see how close you can get to them. Once
you have all your components (measured), build the circuit shown in Figure 11.9 and measure
its output. Does it have the expected period. Finally, add an LED to the output of your clock
chip (Figure 11.4) and let the lights ash.
11.4.4
In addition to the RS ip-op, there are other types of ip-op circuits. In this section, we
will use a so-called JK ip-op (see section 7.5.2 in your textbook) to build a counting circuit.
The JK ip-op has three main inputs, J, K and a clock. It also has a clear which allows it to
be put in some default state.
Depending on the levels at the J and K inputs, the rising edge of the clock ( or the falling
edge, in some chips) causes the output Q to change. The truth-table for the JK ip-op is
shown in Table 11.1. We rst note that CLR is high (or in the table, the NOT CLR is low),
the ip-op is put into a default state. In normal operation, the CLR is low (the NOT CLR is
11.4. PROCEDURE
121
high). In normal operation, if both J and K are low, then clocking the circuit leaves the Q and
outputs unchanged. If one of J or K is high, and the other is low, then Q is set to the value
Q
is set to the value of K. If both J and K are high, then clocking the circuit causes
of J and Q
was before the clock pulse, while Q
will be set to the former value of Q.
Q to be set to what Q
In this mode, we say that it toggles the value of Q. In this lab, we will be using the 7473 chip
which has a NOT CLR input. The truth table for this chip is given in Table 11.1.
CLR
L
H
H
H
H
CLK
x
falling
falling
failing
falling
J
x
L
H
L
H
K
x
L
L
H
H
Q
H
Qn1
L
H
Qn1
Q
L
Qn1
H
L
n1
Q
Comment
Default
Hold
Set
ReSet
Toggle
Table 11.1: The truth table for the JK ip-op. In this case, the ip-op responds to the falling
edge of the clock pulse.
In the toggling mode (both J and K high), it is easy to show that the output changes state
at one-half the frequency of the clock input. We will take advantage of the toggling output
mode to build a digital counter circuit. The basic idea being that output of one JK ip-op
will serve as the clock input to the next one. As such,each subsequent ip-op will be clocked
at one-half the frequency of the previous one.
Procedure We will use the 7473 dual JK ip-op (spec sheet is on the course web site) to
build an eight-bit binary counter(pin-out shown in Figure 11.11). We will use the 555 clock
circuit that you set up earlier as the clock input to our circuit.
+
Q0
J
input clock
clk
K
Q1
clk
K
Figure 11.10: A two-bit binary counter built using JK ip-ops. This can easily be extended to
more bits.
Start by setting up the circuit shown in Figure 11.10 for a two-bit counter. You will nd
that the 7473 is a dual-pack (it has two ip-ops on a single chip). Hook the outputs, Q0 and
Q1 to LEDs as done earlier in the lab. Use the 555 circuit that you set up as the clock input
122
for the counter. Once you have veried that the circuit is indeed counting, add two more bits
to your circuit to build a four-bit counter.
You could also try using a switch, rather than your 555 clock, for the input to the counter.
However, you would nd that switches produce erratic output due to contact bounce as discussed
above. The counter (or any logic circuit) may see many logic pulses, rather than a single pulse,
as the mechanical switch makes or breaks contact. This is one example where the de-bouncer
discussed above can be used as input to the circuit. Such a de-bouncer circuit is commonly used
on momentary push-button switches which change state when they are pressed and released.
1CLK
14
1J
14
VCC
1CLR
13
1Q
13
Q7
1K
12
1Q
Q0
12
Q6
VCC
11
GND
Q1
11
Q5
2CLK
10
2K
Q2
10
Q4
2CLR
2Q
Q3
MR
2J
2Q
GND
CP
Figure 11.11: (Left) The pin-out of the SN7473 JK-ip-op chip. (Right) The pin-out of the
SNLS164 8-bit shift register chip. Both the A and B inputs need to be high to set Q0. CP is the
clock input and M R is the master reset. The outputs are Q0 through Q7.
11.4.5
A shift register is a circuit that shifts bits by one bit on each input clock pulse. Section 7.8 of
your text book shows how a simple shift register can be built using D ip-ops. In this section,
we will use an SN74LS164, which is an 8-bit shift-register chip, rather than building our own.
The pin-out for this chip is shown in Figure 11.11 and its truth table is given in Table 11.2.
Operating
Mode
Reset
Shift
Inputs
MR A
L
X
H
L
H
L
H
H
H
H
B
X
L
H
L
H
Outputs
Q0 Q1-Q7
L
L-L
L Q0-Q6
L Q0-Q6
L Q0-Q6
H Q0-Q6
Table 11.2: The truth-table for the SN74LS164 8-bit shift register. If the reset line goes low,
the chip is reset. If the reset is high, then the contents of Q0 to Q7 are clocked through the
shift register. If both A and B are high, then Q0 is turned on during the clock pulse.
The shift-register has four inputs and eight outputs. The clock input is labeled CP and
11.4. PROCEDURE
123
there is a reset input labeled M R. If the reset is pulled low, then all of the outputs (Q0 to
Q7) are set to zero. As long as the reset is held high, the shift register will clock the bits from
lowest (Q0) to highest (Q7), with one shift on each clock pulse. Finally, there two inputs A
and B allow one to set the lowest bit high. As long as one of these (A or B) is held low, Q0
will not be set. If both are high, then Q0 will go high on the next clock pulse.
Procedure In this section, we are going to set up an eight bit shift register which is driven
by the 555 clock circuit from above. Each of the eight bits needs to be connected via an LED to
ground. We will then connect the B input to VCC and use a single pole double throw switch to
toggle the A input between ground and VCC (see Figure 11.2). Finally, we need to connect the
reset (M R) to VCC . To each of the eight outputs, connect an LED as we did in the left-hand
circuit of Figure 11.4.
It is advisable that you sketch the circuit which you want to build in your lab book before
starting. You will also need to lay out the real estate on you circuit board carefully so that
things t.
124
Appendix A
Introduction
126
two rows of the board, and the two blocks of connectors which encompass all the remaining
connections on the board. These are discussed below.
A.2
A.2.1
Banana Jacks
The three banana jacks on the board, labeled V1, V2 and GND are not connected to any other
part of the proto-board. However, the colored plastic unscrews exposing a metal core in the
center of the jack. There is a hole through this core into which we can insert a wire, which
is then held in place by tightening the plastic screw on the outside of the jack. Thus, we can
make a solid electrical connection from the jack to any point on the proto-board using the wire
we have attached.
The jack itself is convenient for connecting external power and ground to the board. For
example, we might use a pair of banana plug cables to connect our DC power supply to the
V1 and GND banana jacks on our board, then use wires to bring these to the needed points
on the board.
A.2.2
The Buses
The buses are four rows of connections points on the board that are connected together along
the row. On this board, the horizontal connection is not made across the middle of the row.
This means that each row is in fact a pair of buses. To be more specic, we look at the top row
of connectors on the PB10 proto-board. The 25 connections on the left-hand side of the board
(ve blocks of ve) are all connected together. Similarly, the 25 connections on the right-hand
side of the board are also connected together. The is repeated for the second row from the top,
and the bottom two rows on the board as well. These connections are sketched in Figure A.2.
...
...
25 Connectors
...
...
25 Connectors
Figure A.2: The connections of the buses on the PB10 proto-boards. The horizontal line through
the buses indicate which holes are connected together.
In using the buses, it is often convenient to have them extend along the entire row. In order
to do this, we place a small wire jumper across the middle of the row to connect the two halves
together. In using the board, it is often useful to have one of the top two rows connected to a
positive DC voltage level, while one of the bottom two layers is connected to ground.
A.2.3
The Connectors
We refer to the remaining holes in the proto-board as normal connectors, or just connectors.
Each column of ve of these holes are connected together, with no connection made across the
127
gap in the middle of the board. These connections are shown in Figure A.3. Thus, we have
128 blocks of ve pins connected together for connecting circuit elements. You do not want
to put both ends of a component in the same block of ve holes, as this will short both ends
together.
...
...
64 Rows
Figure A.3: The connections for the connectors on the PB10 proto-boards. The vertical lines
through the pins indicate which holes are connected together.
A.3
In building circuits on the PB10 proto-board, it is useful to minimize the number of external
jumper wires that you use, and maximize the number of internal connections you use. This
serves two purposes. First, it makes your circuit neater, which in turn makes it easier to debug
if there is a problem. Second, the wire connections can be aky, so minimizing their use can
minimize potential problems in your circuit.
We also noted above that it is often convenient to make one up the upper two buses a
non-zero DC voltage, and one of the lower two buses ground. This provides a large number of
connection points to these voltage levels, and can in turn minimize the use of jumper wires.
128
Appendix B
Component Labels
Components are labeled in a number of ways. Color codes are typical for resistors, while various
combinations of numbers, letters and colors may be used for capacitors. In this section, we show
some of the common methods of labeling components. This list is by no means comprehensive,
and when in doubt about a particular component value, measuring it is always the right thing
to do.
As mentioned above, colors are used in labeling several dierent components. The colorto-number correlation is given in Table B.1. There are numerous poems and phrases in which
the rst letter of the color name is the rst letter of a word, and the poem or phrase follows
the 0-to-9 order in the following table. None of these phrases will be repeated here.
Color
Black
Brown
Red
Orange
Yellow
Green
Blue
Violet
Grey
White
Value
0
1
2
3
4
5
6
7
8
9
B.1
Resistor Codes
The most common usage of color codes is in labeling resistors. Typical resistors have four color
bands as shown on the left side of Figure B.1. Precision resistors have a 5th colored band as
shown in the right side of the gure. For a resistor with n bands, the rst n 2 bands give the
numerical part of the resistance, the (n 1)th band gives the power-of-ten multiplier, and the
129
130
nth band gives the tolerance. Table B.2 shows how this works for four-band resistors, while
table B.3 explains ve-band resistors.
11
00
00
11
00
11
00
11
00
11
00
11
11
00
00
11
00
11
00
11
00
11
00
11
Tolerance
11
00
00
11
00
11
00
11
00
11
00
11
Band 4
Band 1
11
00
00
11
00
11
00
11
00
11
00
11
Band 3
11
00
00
11
00
11
00
11
00
11
00
11
Band 2
11
00
00
11
00
11
00
11
00
11
00
11
Tolerance
11
00
00
11
00
11
00
11
00
11
00
11
Band 3
Band 2
Band 1
11
00
000
00111
11
000
111
00
11
000
00111
11
000
111
00
11
000
00111
11
000
111
Figure B.1: The left-hand diagram shows a normal resistor with 4 bands. The method for reading
these is shown in Figure B.2. The right-hand diagram shows the coding on precision resistors.
Table B.3 gives the rules for reading these.
Color
Black
Brown
Red
Orange
Yellow
Green
Blue
Violet
Grey
White
Gold
Silver
(None)
1st
0
1
2
3
4
5
6
7
8
9
2nd
0
1
2
3
4
5
6
7
8
9
3rd
100
101
102
103
104
105
106
4th
101
102
5%
10%
20%
131
Color
Black
Brown
Red
Orange
Yellow
Green
Blue
Violet
Grey
White
Gold
Silver
1st
0
1
2
3
4
5
6
7
8
9
2nd
0
1
2
3
4
5
6
7
8
9
3rd
0
1
2
3
4
5
6
7
8
9
4th
100
101
102
103
104
105
106
5th
1%
.1%
.01%
.001%
101
102
gold
black
yellow
red
5%
red
brown
purple
black
2 0 4
red
black
7 0 1 2 .1%
gold
red
red
red
2 0 1
5%
Figure B.2: Examples of reading 4-band and 5-band resistors. Note that in the third example, the
color of the fourth band is none.
132
B.2
Capacitors
There are probably more ways of labeling capacitors than one can count. In this section, we
go over a number of the labeling schemes that one may encounter in building circuits. As with
any component, measuring it is probably the most accurate way to determine its actual value.
Electrolytic capacitors tend to come in cylindrical cans. These capacitors have a denite parity
with the positive terminal (anode) being labeled in some fashion. A mark may be printed
on the capacitor, or there may be a band or ring around one end of the capacitor as shown
in Figure B.3. The capacitor will also normally have its capacitance printed on the side in
F ; however, a 22 F capacitor (for example) may be labeled as 22 M, where M is used
to represent F . In addition, the capacitor will have a voltage rating which indicates the
maximum voltage at which the capacitor can operate. If one of these devices is hooked up
backwards and subjected to a large voltage, one of the ends tends to remove itself from the the
capacitor with a loud bang.
Crimp or band
Figure B.3: An electrolytic capacitor. Capacitance is indicated in F , while the end with the crimp
or band is the positive end (anode) of the capacitor.
Another type of capacitor is the ceramic disk capacitor. The are typically at discs. A
couple of typical labeling schemes for these are shown in Figure B.4.
You may also encounter tantalum electrolytic capacitors, seen in Figure B.5. Some of these
are color-coded as shown in the gure, where Table B.4 shows how to interpret the colors on
the capacitor.
B.2. CAPACITORS
133
XXM
YYV
CCM
Figure B.4: The ceramic capacitor on the left is labeled with three numbers as shown, CCM. The
value of the capacitor is given as CC 10M pF . The label 103 translates to 10 103 pF , while
501 translates to 50 101 pF . The capacitor on the right has both a capacitance and a voltage on
it. The XXM is XX F , while the voltage is given as Y Y V .
Figure B.5: A tantalum electrolytic capacitor. The capacitance can be written numerically on
the capacitor in F , or the color code in Table B.4 can be used. If the color code is used, the
capacitance is in pF .
134
Color
Black
Brown
Red
Orange
Yellow
Green
Blue
Violet
Grey
White
Voltage
4
6
10
15
20
25
35
50
Value
0
1
2
3
4
5
6
7
8
9
Multiplier
104
105
106
107
Table B.4: The color code for the tantalum electrolytic capacitors shown in Figure B.5. The
capacitance is given in pF .
B.3
135
Semiconductor Labels
136
B.4
Diodes
In a diode, the pin which is connected to the p-type semiconductor layer is the anode, while
that connected to the n-type layer is the cathode, and it is crucial to know which one is which.
The diode is said to be forward biased when the anode is at higher potential than the cathode,
or reverse biased when the cathode is at higher potential. Figure B.6 shows a couple of typical
diode packages on the left, while on the right are a couple of typical light-emitting diode (LED)
packages. For the diode, the pointed end of the can, or the end with the stripe or band around
it, indicates the cathode. In the LED, the shorter leg, or the side that has a at spot on the
base of the can, is the cathode. Zener diodes will probably have the breakdown voltage printed
Cathode
Anode
Cathode
Anode
Anode
Cathode
Cathode
Anode
1
0
0
1
0
1
0
1
0
1
0
1
Figure B.6: Typical diode and light-emitting diode containers. Under forward biasing, the anode
is at higher potential than the cathode.
on the can as well. 5.6 would mean that the diode breaks down when it is reverse biased with
5.6 V . There may also be colored bands on a diode. This information codes the diode type. Two
examples of this are shown in Figure B.7 while Table B.5 shows what each color means. The
last band is always the sux letter, with black indicating that there is no sux. The remaining
bands, reading away from the cathode, give the diode identication number. To get the full
number, add 1N to the start of the code. In the examples, yellow-black-black-yellow-brown
corresponds to 4004A. This is then a 1N4004A diode.
B.4. DIODES
green
yellow
green
black
yellow
black
black
yellow
brown
137
4 0 0 4 A
5 4 5
1N545
1N4004A
Color
Black
Brown
Red
Orange
Yellow
Green
Blue
Violet
Grey
White
Digit
0
1
2
3
4
5
6
7
8
9
Sux
(none)
A
B
C
D
E
F
G
H
J
138
B.5
Transistors
The pin labels of typical bipolar transistors are shown in Figure B.8. While it is usually safest
to double-check the pins on the transistor spec sheet, Figure B.8 does accurately describe a
majority of these transistors. The base connection is in the middle. Most bipolar transistors
will function, but not as well, if one reverses E and C in a circuit.
E BC
E
B
Figure B.8: Typical pinouts for bipolar transistors. The three pins are the emitter (E), the base
(B), and the collector (C).
B.6
139
Integrated Circuits
Typical ICs come in 8- and 14-pin packages. Figure B.9 shows the pin numbering scheme on a
14-pin package. The key identifying mark is the tab shown at the center of the right-hand side
of the chip. Looking at the top of the package with the tab on the right, pin 1 is above the tab
and the highest-numbered pin (14) is below the tab.
2 1
3
4
5
13 14
6
7
11 12
10
8 9
10
11
12
13
14
Figure B.9: The pin number scheme on a 14-pin IC package. Pin 1 is to the right of the tab, and
pin 14 is to the left of the tab.