LED Applications Design and Implementation of A Novel Bridgeless Interleaved SEPIC Converter For
LED Applications Design and Implementation of A Novel Bridgeless Interleaved SEPIC Converter For
LED Applications Design and Implementation of A Novel Bridgeless Interleaved SEPIC Converter For
R.Seyezhai
PG scholar,
Department of EEE,
SSN College of Engineering,
Chennai, India
rsreemallika@gmail.com
Associate Professor,
Department of EEE,
SSN College of Engineering,
Chennai, India
seyezhair@ssn.edu.in
I. INTRODUCTION
LED Lighting technology is fast emerging in the recent
years. Around 19% of the electrical energy is consumed by
residential, commercial or industrial lighting worldwide.
Generally incandescent bulbs, halogen bulbs, fluorescent
lamps, compact fluorescent lamps (CFL), and high intensity
discharge (HID) lamps are used for lighting applications. With
the development of new materials and manufacture
procedures, LEDs are now attracting more and more attention
as they are eco-friendly, energy efficient, mercury-free,
difficult to break, long lifetime (10 times more than that of
CFL), high efficacy, less energy consumption, fast turn on/off
time and compact. [1]
It is a challenge for the engineers to develop high quality
LED power supplies in order to achieve a good performance
lighting system. So it has been a constant concern to maintain
the power factor as high as possible in order to have a high
power quality LED supply systems. The European standard
IEC 61000-3-2 mandates to stipulate the power factor for all
lighting products above 25 W [2]. For this purpose, switchmode DC-DC converters incorporate Power Factor Correction
(PFC) circuits to emulate a resistive behaviour of the
converter. This ensures a high power factor at the supply side
[3].Active switches are used in combination with reactive
elements to control the supply current so that the current
waveform follows exactly the supply voltage waveform and a
controllable output voltage is obtained. This is called active
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International Conference on Recent Advances in Mechanical Engineering and Interdisciplinary Developments [ICRAMID - 2014]
D Io
5
Vc fsw
where Vc is Capacitor Voltage Ripple and Io is the load
current.
C
B. Simulation Parameters
The simulation parameters for the proposed SEPIC PFC
converter are tabulated in Table 1.
TABLE I. SIMULATION PARAMETERS OF SEPIC RECTIFER
Parameter
Input Voltage
Switching Frequency
Duty Cycle
L1 , L2 , L3 , L4
L5 , L6 , L7 , L8
C1 , C2 , C3 ,C4
Output Capacitor
Output voltage
A. Design Considerations
The design of the proposed converter involves the selection of
duty cycle, inductor and SEPIC capacitors. The following
equations are used to design the proposed converter. [5]
Specification
24V,50Hz
25kHz
59%
2.8mH
4.03mH
6.7F
3200F
48V
(1)
Selection of Inductor:
RL
L1c
2fsw M + M 2
L2c
M+1
(2)
(3)
Po
Vo 2Vo 2fs
(4)
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International Conference on Recent Advances in Mechanical Engineering and Interdisciplinary Developments [ICRAMID - 2014]
60
50
Output Voltage(V)
40
30
20
10
-10
0.01
0.02
0.03
0.04
0.05
0.06
0.07
0.08
0.09
0.1
Time(sec)
40
30
20
10
-10
-20
-30
-40
0.02
0.03
0.04
0.05
0.06
0.07
0.08
0.09
0.1
Time(sec)
0.03
0.04
0.05
0.06
Time(sec)
0.07
0.08
0.09
Fig.5 (a) Supply voltage and current (b) FFT Analysis of supply current
of Average current controlled Bridgeless Interleaved SEPIC Rectifier
0.1
60
Output Voltage(V)
50
40
30
20
10
0.01
0.02
0.03
0.04
0.05
0.06
0.07
0.08
0.09
0.1
Time(sec)
Fig.6 shows that the THD is 4.20% and hence it has a low
harmonic profile. So the power factor is better than its open
loop configuration.
V. PERFORMANCE PARAMETERS OF PFC TOPOLOGIES
The performance of a converter is evaluated in terms of
THD and power factor.
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International Conference on Recent Advances in Mechanical Engineering and Interdisciplinary Developments [ICRAMID - 2014]
b) Displacement Factor(K ):
The displacement factor K is the cosine of the displacement
angle () between the fundamental input current and the input
voltage.
K = cos
(7)
c) Power Factor(PF):
Here, Power Factor refers to the quality of supply current. In
case of non-sinusoidal signals, power factor is the product of
the distortion factor, K d and the displacement factor, K .
PF = K d K
(8)
Performance Parameters
Active PFC
Topology
THD
(%)
SEPIC
Bridgeless SEPIC
Bridgeless
Interleaved SEPIC
Power
Factor
16.79
9.35
0.9862
0.9956
0.9855
0.9781
0.9719
0.9738
6.26
0.9980
0.9903
0.9883
Table III compares the power factor obtained for open loop
and closed loop implementation for the proposed PFC
converter. It is observed that implementation of ACMC
improves the power factor to 0.9936.
TABLE III COMPARISON OF PERFORMANCE PARAMETERS OF BRIDGELESS
INTERLEAVED SEPIC CONVERTERS
Bridgeless
Interleaved
SEPIC Rectifier
Topology
Open Loop
Average Current
control
Performance Parameters
THD
(%)
Power
Factor
6.26
0.9980
0.9903
0.9883
4.20
0.9991
0.9945
0.9936
IV. CONCLUSION
This paper proposes a novel Bridgeless Interleaved
SEPIC converter for LED applications that provides an
improved power factor and a better harmonic profile. A
comparative analysis with the conventional SEPIC topology
has been done and it is significant from the simulation results
that the proposed converter exhibits better power factor and a
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REFERENCES
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[10] Arias, Manuel, Aitor Vzquez, and Javier Sebastin "An overview of
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