Assignment

1
Embedded Systems
Advanced RAM

NIKHIL S
1181210093
1

Advanced RAM
DRAMs commonly used as main memory in processor based embedded
systems high capacity, low cost
Many variations of DRAMs proposed
need to keep pace with processor speeds
FPM DRAM: fast page mode DRAM
EDO DRAM: extended data out DRAM
SDRAM/ESDRAM: synchronous and enhanced synchronous DRAM
RDRAM: rambus DRAM

Basic DRAM

Address bus multiplexed between row and column components

Row and column addresses are latched in, sequentially, by strobing ras (row
address strobe) and cas (column address strobe) signals, respectively
Refresh circuitry can be external or internal to DRAM device
strobes consecutive memory address periodically causing memory content
to be refreshed
Refresh circuitry disabled during read or write operation
Refresh
Circuit

data
. Buffer
In
Buffer

rd/ wr

Data

Col

Out
Buffer
Data

Sense
Amplifiers

Addr

cas

Row
Decod
er

Buff
er
Addr.
Row

Col Decoder

ras, clock

cas,

ras

address

Bit storage array

The Basic Dynamic RAM Structure

Fast Page Mode DRAM (FPM DRAM)

Each row of memory bit array is viewed as a page

Page contains multiple words
Individual words addressed by column address
Timing diagram:
row (page) address sent
2

3 words read consecutively by sending column address for each

Extra cycle eliminated on each read/write of words from same
ras

cas

address

row

col

col
data

col
data

data

data
The timing diagram in FPM DRAM

Extended data out DRAM (EDO DRAM)

Improvement of FPM DRAM

Extra latch before output buffer
allows strobing of cas before data read operation completed
Reduces read/write latency by additional cycle
ras
cas
address

row

data

col

col

col
data

data

data

Speedup through overlap

The timing diagram in EDORAM

(S) Synchronous and Enhanced Synchronous (ES) DRAM

SDRAM latches data on active edge of clock

Eliminates time to detect ras/cas and rd/wr signals
A counter is initialized to column address then incremented on active edge of clock
to access consecutive memory locations
ESDRAM improves SDRAM
o added buffers enable overlapping of column
addressing
o faster clocking and lower read/write latency possible
3

clock
ras
cas
address

row

col

data

data

data

data

The timing diagram in SDRAM

Rambus DRAM (RDRAM)

More of a bus interface architecture than DRAM architecture

Data is latched on both rising and falling edge of clock
Broken into 4 banks each with own row decoder : can have 4 pages open at a time
Capable of very high throughput

DRAM Integration Problem

SRAM easily integrated on same chip as processor

DRAM more difficult
o Different chip making process between DRAM and conventional logic
Goal of conventional logic (IC) designers:
minimize parasitic capacitance to reduce signal propagation delays and
power consumption
o Goal of DRAM designers:
create capacitor cells to retain stored information
o Integration processes beginning to appear

Memory Management Unit (MMU)

Duties of MMU
Handles DRAM refresh, bus interface and arbitration
Takes care of memory sharing among multiple processors
Translates logic memory addresses from processor to physical memory
addresses of DRAM
4

Modern CPUs often come with MMU built-in

Single-purpose processors can be used

STATIC RAM
Static RAM uses a completely different technology. In static RAM, a form of flip-flop holds each bit of
memory (see How Boolean Logic Works for details on flip-flops). A flip-flop for a memory cell takes
four or six transistors along with some wiring, but never has to be refreshed. This makes static RAM
significantly faster than dynamic RAM. However, because it has more parts, a static memory cell
takes up a lot more space on a chip than a dynamic memory cell. Therefore, you get less memory per
chip, and that makes static RAM a lot more expensive.
Static RAM is fast and expensive, and dynamic RAM is less expensive and slower. So static RAM is
used to create the CPU's speed-sensitive cache, while dynamic RAM forms the larger system RAM
space.
Memory chips in desktop computers originally used a pin configuration called dual inline
package (DIP). This pin configuration could be soldered into holes on the computers motherboard or
plugged into a socket that was soldered on the motherboard. This method worked fine when
computers typically operated on a couple of megabytes or less of RAM, but as the need for memory
grew, the number of chips needing space on the motherboard increased.
The solution was to place the memory chips, along with all of the support components, on a separate
printed circuit board (PCB) that could then be plugged into a special connector (memory bank) on
the motherboard. Most of these chips use a small outline J-lead (SOJ) pin configuration, but quite a
few manufacturers use the thin small outline package (TSOP) configuration as well. The key
difference between these newer pin types and the original DIP configuration is that SOJ and TSOP
chips are surface-mounted to the PCB. In other words, the pins are soldered directly to the surface
of the board, not inserted in holes or sockets.
Memory chips are normally only available as part of a card called a module. You've probably seen
memory listed as 8x32 or 4x16. These numbers represent the number of the chips multiplied by the
capacity of each individual chip, which is measured in megabits (Mb), or one million bits. Take the
result and divide it by eight to get the number of megabytes on that module. For example, 4x32
means that the module has four 32-megabit chips. Multiply 4 by 32 and you get 128 megabits. Since
we know that a byte has 8 bits, we need to divide our result of 128 by 8. Our result is 16 megabytes!

Types of RAM:

SRAM: Static random access memory uses multiple transistors, typically four to six, for each memory
cell but doesn't have a capacitor in each cell. It is used primarily for cache.

DRAM: Dynamic random access memory has memory cells with a paired transistor
and capacitor requiring constant refreshing.

FPM DRAM: Fast page mode dynamic random access memory was the original form of DRAM. It
waits through the entire process of locating a bit of data by column and row and then reading the bit
before it starts on the next bit. Maximum transfer rate to L2 cache is approximately 176 MBps.

EDO DRAM: Extended data-out dynamic random access memory does not wait for all of the
processing of the first bit before continuing to the next one. As soon as the address of the first bit is
located, EDO DRAM begins looking for the next bit. It is about five percent faster than FPM.
Maximum transfer rate to L2 cache is approximately 264 MBps.

SDRAM: Synchronous dynamic random access memory takes advantage of the burst mode
concept to greatly improve performance. It does this by staying on the row containing the requested
bit and moving rapidly through the columns, reading each bit as it goes. The idea is that most of the
time the data needed by the CPU will be in sequence. SDRAM is about five percent faster than EDO
RAM and is the most common form in desktops today. Maximum transfer rate to L2 cache is
approximately 528 MBps.

DDR SDRAM: Double data rate synchronous dynamic RAM is just like SDRAM except that is has
higher bandwidth, meaning greater speed. Maximum transfer rate to L2 cache is approximately 1,064
MBps (for DDR SDRAM 133 MHZ).

RDRAM: Rambus dynamic random access memory is a radical departure from the previous
DRAM architecture. Designed by Rambus, RDRAM uses a Rambus in-line memory module
(RIMM), which is similar in size and pin configuration to a standard DIMM. What makes RDRAM so
different is its use of a special high-speed data bus called the Rambus channel. RDRAM memory
chips work in parallel to achieve a data rate of 800 MHz, or 1,600 MBps. Since they operate at such
high speeds, they generate much more heat than other types of chips. To help dissipate the excess
heat Rambus chips are fitted with a heat spreader, which looks like a long thin wafer. Just like there
are smaller versions of DIMMs, there are also SO-RIMMs, designed for notebook computers.

Credit Card Memory: Credit card memory is a proprietary self-contained DRAM memory module that
plugs into a special slot for use in notebook computers.

PCMCIA Memory Card: Another self-contained DRAM module for notebooks, cards of this type are
not proprietary and should work with any notebook computer whose system bus matches the memory
card's configuration.

CMOS RAM: CMOS RAM is a term for the small amount of memory used by your computer and
some other devices to remember things like hard disk settings. This memory uses a small battery to
provide it with the power it needs to maintain the memory contents.

VRAM: VideoRAM, also known as multiport dynamic random access memory (MPDRAM), is a
type of RAM used specifically for video adapters or 3-D accelerators. The "multiport" part comes from
the fact that VRAM normally has two independent access ports instead of one, allowing the CPU and
graphics processor to access the RAM simultaneously. VRAM is located on the graphics card and
comes in a variety of formats, many of which are proprietary. The amount of VRAM is a determining
factor in there solution and color depth of the display. VRAM is also used to hold graphics-specific
information such as3-D geometry data and texture maps. True multiport VRAM tends to be
expensive, so today, many graphics cards use SGRAM (synchronous graphics RAM) instead.
Performance is nearly the same, but SGRAM is cheaper.