Introductory Overview: 2009 Texas Instruments, All Rights Reserved
Introductory Overview: 2009 Texas Instruments, All Rights Reserved
Introductory Overview: 2009 Texas Instruments, All Rights Reserved
1.Introductory Overview
Topic
Page
1.1
1.2
1.3
1.2.1
1.2.2
1.2.3
1.2.4
1.2.5
1.2.6
1.2.7
1.2.8
1.2.9
1.4
How
to
read technical specifications in
MSP430
datasheets ............................................................................... 1-19
1.5
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1-1
Introductory Overview
1.6
1-2
1.5.2
1.5.3
Data declaration.......................................................1-25
1.5.4
1.5.5
Masks.......................................................................1-30
1.5.6
1.5.7
1.6.2
1.7
Quiz ...............................................................................1-33
1.8
FAQs ..............................................................................1-35
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x(t)
1.2
1
0.8
0.6
0.4
0.2
0
0.1
0.2
0.3
0.4
t
0.5
0.6
0.7
0.8
x(n)
1.2
1
0.8
0.6
0.4
0.2
0
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10
20
30
40
n
50
60
70
80
1-3
Introductory Overview
3000
2500
x[n]
2000
1500
1000
500
10
20
30
40
n
50
60
70
80
an
1-4
n 1
1b
+ an
n 2
2b
+ ... + a0b0
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Mathematical notations
5
25
32
0
4
24
16
1
3
23
8
0
2
22
4
1
1
21
2
0
0
20
1
0
1-5
Introductory Overview
Binary
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
1 0000
Hexadecimal
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
0x10
This table provides all the information needed to convert from one
number base into any other number base for the decimal values
from 0 to 16.
To convert a hexadecimal number into a binary number, simply
break the binary number into 4-bit groups beginning with the least
significant bit (LSB) and substitute the corresponding four bits in
binary for each hexadecimal digit in the number.
For example, to convert the hexadecimal value 0x0ABCD (0ABCD16)
into a binary value, simply convert each hexadecimal digit according
to the table above. The binary equivalent is:
0x0ABCD
1-6
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Mathematical notations
162
256
161
16
160
1
2x101
1x100
29 = 512
721
512
209
2 = 256
27 = 128
209
128
81
81
2 = 64
64
17
2 = 32
24 = 16
17
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16
1
Copyright 2009 Texas Instruments, All Rights Reserved
1-7
Introductory Overview
23 = 8
22 = 4
21 = 2
20 = 1
10310/2
Remainder: 1 (LSB)
51
0x101
3x100
51/2
25
Remainder: 1
25/2
12
Remainder: 1
12/2
Remainder: 0
6/2
Remainder: 0
3/2
Remainder: 1
1/2
Remainder: 1 (MSB)
1
0
= 1 x 26 =
5
= 0 x 2 =
64
0
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Mathematical notations
5th bit:
= 1 x 24 =
16
4th bit:
= 0 x 2 =
3rd bit:
= 1 x 22 =
2nd bit:
LSB:
1
1
= 1 x 2 =
0
= 1 x 2 =
2
+
1111
1011
0010
1010
1111
1011
0010
This
yields
the
binary
number
10101111101100102
1010 1111 1011 00102 in a more readable format.
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or
1-9
Introductory Overview
A*163F*162
B*161
2*160
10*4096
15*256
11*16
40960
3840
176
2*1
+
4497810
1-10
Division
Quotient
Remainder
Hexadecimal number
44978 / 16
2811
2811 / 16
175
11
B2
175 / 16
10
15
FB2
10 / 16
10
0AFB2
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Mathematical notations
without carry
0 + 1 = 1
without carry
1 + 1 = 0
000101102
011100112
01102
00000000
01011101
01011101
+ 00000000
010001011102
Other operations are possible, but the algorithms are more
complicated.
So far, only the representation of positive numbers has been
introduced. However there is also the need to use negative
numbers. This representation can be achieved using the ones
complement or twos complement methods.
The ones complement is achieved by complementing the number
representation bit-by-bit. Here complement means transform 0 -> 1
and transform 1 -> 0.
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1-11
Introductory Overview
0100 10012
The result is positive because the most significant bit is zero.
Example 9: Perform the subtraction operation between 101000112
and 000101102.
0001 01102 Ones complement + 1 = 1110 10102
1010 00112 - 0001 01102
It is equal to:
1010 00112
+ 1110 10102
1000 11012
The result is negative because the most significant bit is one.
1-12
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i n 1
ab
i0
i
i
Eq. 1.1
Table 1-4 details the numerical bases and their digits, most used in
numerical representation in microprocessor systems.
Table 1-4. Numerical representations in microprocessor systems.
Bases
Binary
Octal
Decimal
Hexadecimal
Digits
0, 1
0, 1, 2, 3, 4, 5, 6, 7
0, 1, 2, 3, 4, 5, 6, 7, 8, 9
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F
1-13
Introductory Overview
000
+0
+0
+0
001
+1
+1
+1
010
+2
+2
+2
011
+3
+3
+3
100
-0
-3
-4
101
-1
-2
-3
110
-2
-1
-2
111
-3
-0
-1
au
0 au
Eq. 1.2
2q
2p q 1
Eq. 1.3
2q
r 2q
Eq. 1.4
Qm.n
1-14
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2p q
as
2q
2p q 1
Eq. 1.5
2q
Some of the fixed point formats are shown in Table 1-6. For
simplification, when p and q are null, the formats are ignored.
Table 1-6. Fixed point formats.
Format
(UQ16.)
(UQ.16)
(Q15.)
(Q.15)
(UQ16.16)
(Q15.16)
Minimum
0
0
-215
-1
0
-215
Maximum
216-1
1-2-16
215-1
1-2-15
216-1
215-2-16
r
1
2-16
1
2-15
2-16
2-16
n
16
16
16
16
32
32
p
16
0
15
0
16
15
q
0
16
0
15
16
16
15
S
14
I3
13
I2
12
I1
11
Q11
10
Q10
9
Q9
0
Q0
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1-15
Introductory Overview
****
Byte 3
****
****
****
Byte 2
Byte 1
Byte 0
15
S
14
Q14
13
Q13
12
Q12
11
Q11
10
Q10
9
Q9
0
Q0
1-16
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1-17
Introductory Overview
Sign
1
1
1
1
Exponent
5
8
11
15
Exponent bias
15
127
1023
16383
Mantissa
10
23
52
112
exponent bias
mantissa .
The number integer part can be converted to the binary value 11102,
while the fractional number part is converted to the binary value
0.001111000010100011112. The number can be represented in the
binary base as:
1110.001111000010100011112
The number normalization requires that radix is moved to the left:
1.110001111000010100011112 23
We can now code the floating-point representation in the single
format (32-bit) as:
Sign (1-bit): 0 (the number is positive);
Exponent (8-bit): 127 + 3 = 130 = 10000010;
Fraction (23-bit): 11000111100001010001111 (fractional part of
the mantissa).
Exponent
10000010
Fraction
11000111100001010001111
1-18
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1-19
Introductory Overview
1-20
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This is a multiplexed block that has four inputs and one output. The
input that is redirected to the output is selected using the SELMx
bits. If the SELMx bits are 00, the first input is routed to the
multiplexer output line, if SELMx bits are 01, the second input is
routed to the multiplexer output line, and so on.
SELMx is a mnemonic, meaning a way to introduce numbers in the
registers without knowing their value, but using an easy way to
remember them. In this case, SELMx (Select Multiplexer) has two
bits, so the code should use SELM0 and SELM1, with SELM0 the less
significant bit.
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1-21
Introductory Overview
SMCLKOFF
XT2OFF
Bit
6
SMCLKOFF
XT2OFF
4-3
SELMx
SELS
1-0
FLL_DIVx
SELMx
SELS
FLL_DIVx
Description
Disable the submain clock signal (SMCLK):
SMCLKOFF = 0
SMCLK active
SMCLKOFF = 1
SMCLK inactive
Disable the second crystal oscillator (XT2):
XT2OFF = 0
XT2 active
XT2OFF = 1
XT2 inactive
Select the master clock (MCLK) source:
SELM1 SELM0 = 0 0
DCO
SELM1 SELM0 = 0 1
DCO
SELM1 SELM0 = 1 0
XT2
SELM1 SELM0 = 1 1
LFXT1
Select the submain clock (SMCLK) source:
SELS = 0
DCO
SELS = 1
XT2
Select the auxiliary clock (ACLK) signal divider:
FLL_DIV_0 = 0 0
Divider factor: /1
FLL_DIV_1 = 0 1
Divider factor: /2
FLL_DIV_2 = 1 0
Divider factor: /4
FLL_DIV_3 = 1 1
Divider factor: /8
SELMx are the 3rd and 4th bit of FLL_CTL1 control register and their
configuration selects the master clock (MCLK) source. If SELMx =11,
or, SELM0 = 1 and SELM1 = 1, the low frequency oscillator LFXT1 is
selected as the master clock source. It can also be used with
decimal or hexadecimal numbers directly in the register to influence
the bits, but using mnemonics makes the code much more readable.
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Programming issues
programming
language
topics
are
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1-23
Introductory Overview
P3OUT |= 0x04;
while(1){
if(!CMBufIsEmpty()){
cmd = CMGetComand();
ACStop();
switch (cmd){
case DEMO1:
//demo1 procedure
demo1ctr ++;
ACLoad((unsigned char *)Demo1Action[demo1ctr]);
if (Demo1Action[demo1ctr + 1]){
ACSetNextAction(DEMO1);
}else{
ACSetNextAction(ENDMOV);
demo1ctr = 0;
}
break;
case ENDMOV:
ACSetLEDDefault();
break;
default:
1-24
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Programming issues
a = (4 + c) * 2;
// NOT: a=(b+c)*d
1-25
Introductory Overview
signed char
char, unsigned char
short, signed short
unsigned short
int, signed int
unsigned int
long, signed long
unsigned long
float
double
long double
Size
[bits]
8
8
16
16
16
16
32
32
32
32
32
Representation
ASCII
ASCII
2s complement
Binary
2s complement
Binary
2s complement
Binary
IEEE 32-bit
IEEE 32-bit
IEEE 32-bit
Range
Minimum
-128
0
-32768
0
-32768
0
-2147483648
0
1.175495e-38
1.175495e-38
1.175495e-38
values
Maximum
127
255
32767
65535
32767
65535
2147483647
4294967295
3.40282346e+38
3.40282346e+38
3.40282346e+38
1-26
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Programming issues
Examples:
unsigned int weight; // unsigned integer variable;
int temperature; // signed integer variable;
float speed, // real variable.
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1-27
Introductory Overview
Syntax
+a
a+b
++a
a++
a += b
-a
a-b
--a
a-a -= b
a*b
a *= b
a/b
a /= b
a%b
a %= b
Syntax
a<b
a <= b
a>b
a >= b
a != b
a == b
!a
a && b
a || b
Syntax
a=b
a()
a[b]
*a
&a
a->b
a.b
a->*b
a.*b
(type) a
a,b
a?b:c
a::b
sizeof a
sizeof (type)
typeid type
new type
new type[n]
delete a
delete[] a
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Programming issues
Original form
x=x+y
x=x-y
x=x*y
x=x/y
x=x%y
x=x&y
x=x|y
x=x^y
x = x << y
x = x >> y
The use of the operators must take into account their priority.
Table 1-16. Priority of operators.
Priority
Highest
Operator
() [] ->
! ~ + - &
* / %
+ << >>
< <= > >=
== !=
&
^
|
&&
||
?
Lowest
= += -= *= /= %= &= |= ^=
<<= >>=
.
Description
Grouping, scope, array/member access
Size of type cast (most) unary
operations,
Multiplication, division, modulo
Addition, subtraction
Bitwise shift left and right
Comparisons: less-than, ...
Comparisons: equal and not equal
Bitwise AND
Bitwise exclusive OR
Bitwise inclusive (normal) OR
Logical AND
Logical OR
Conditional expression (ternary
operator)
Assignment operators
Concatenation ("comma")
1-29
Introductory Overview
1.5.5 Masks
Masks are used to set (make 1) certain bits in a variable, or to clear
certain bits (make 0).
Examples:
P5OUT = 0x80;
P5OUT = 0x04;
P5OUT |= 0x04
Syntax
a << b
a <<= b
a >> b
a >>= b
~a
a&b
a &= b
a|b
a |= b
a^b
a ^= b
Example:
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Programming issues
In the case of an arithmetic shift, the bits that are shifted out of
either end are discarded (not in assembler - there it would placed in
Carry bit). In an arithmetic shift left, zeros are shifted in on the
right.
Example 8: Left shift value 0011 1001 in an 8-bit register.
Figure 1-7. Arithmetic Left shift.
x = y << 2;
This assigns to x the result of shifting y to the left by two shifts. To
shift only one bit, a second argument of 1 should be used:
x = y << 1;
A shift of one to the right is a quick way to multiply by two.
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1-31
Introductory Overview
x = y >> 1;
Here, x is assigned the value of y, which has been right shifted by
1. This is a quick way to perform a divide by two.
1-32
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Quiz
1.7 Quiz
1. An analogue signal:
(a) 256;
(b) 255;
(c) 16;
(d) 128.
4. A computer performs signed arithmetic using:
(a) The Twos complement representation inverts all bits and adds 1;
(b) Invert the MSB bit;
(c) Invert the LSB bit;
(d) The Ones complement representation has both +0 and -0.
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1-33
Introductory Overview
(a) -5;
(b) -13;
(c) 3;
(d) 3.
9. The binary value 1100.0112 in unsigned binary is:
(a) -4.375;
(b) 12.375;
(c) 4.375;
(d) -12.375.
10. The result of the following addition in unsigned binary will result
in an overflow:
(a) 0xDC;
(b) 0x24;
(c) 0xDB;
(d) 0x23.
12. A signed addition will cause a carry when:
1-34
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FAQs
1.8 FAQs
1. When will an overflow occur?
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1-35