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    Computer Archiecture 1 D3804a15

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    Surendra Singh Chauhan
    This document contains a student's answers to questions about computer organization and architecture. The student answered questions about encoders/decoders, multiplexers/demultiplexers, flip-flops, counters, registers, and bus systems. The questions covered application areas, logic behind counters, effects of removing buffer gates, roles of clear and load signals, register content after shifting, implementing register transfer statements, and multiplexer requirements for a bus system connecting 16 registers of 32 bits each.

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    Computer Archiecture 1 D3804a15

    Uploaded by

    Surendra Singh Chauhan
    491 views5 pages
    This document contains a student's answers to questions about computer organization and architecture. The student answered questions about encoders/decoders, multiplexers/demultiplexers, flip-flops, counters, registers, and bus systems. The questions covered application areas, logic behind counters, effects of removing buffer gates, roles of clear and load signals, register content after shifting, implementing register transfer statements, and multiplexer requirements for a bus system connecting 16 registers of 32 bits each.

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    Computer Archiecture 1 d3804a15

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    This document contains a student's answers to questions about computer organization and architecture. The student answered questions about encoders/decoders, multiplexers/demultiplexers, flip-flops, counters, registers, and bus systems. The questions covered application areas, logic behind counters, effects of removing buffer gates, roles of clear and load signals, register content after shifting, implementing register transfer statements, and multiplexer requirements for a bus system connecting 16 registers of 32 bits each.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOC, PDF, TXT or read online from Scribd
    Download as doc, pdf, or txt
    491 views5 pages

    Computer Archiecture 1 D3804a15

    Uploaded by

    Surendra Singh Chauhan
    This document contains a student's answers to questions about computer organization and architecture. The student answered questions about encoders/decoders, multiplexers/demultiplexers, flip-flops, counters, registers, and bus systems. The questions covered application areas, logic behind counters, effects of removing buffer gates, roles of clear and load signals, register content after shifting, implementing register transfer statements, and multiplexer requirements for a bus system connecting 16 registers of 32 bits each.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOC, PDF, TXT or read online from Scribd
    Download as doc, pdf, or txt
    of 5

    Home Work-1

    CAP211:COMPUTER ORGANIZATION AND


    ARCHITECTURE

    SUBMITTED TO:- SUBMITTED BY:-

    JITESHVER ANAND SURENDRA

    MCA 3nd SEM

    ROLL NO- D3804A15

    REGD NO- 10806601


    Question 1.Identify at least two application areas (discuss their roles also) for

    (a) Encoder/Decoder

    (b) Multiplexer/De multiplexers

    (c) Flip flops

    ANSWER:

    (a) Application of encoder:

    1. One of the application of encoder is to convert octal to binary.

    2. Encoder is used in integrated circuits.

    3. Encoder is opposite of decoder.

    Application of decoder:

    1) First application of decoder is it convert binary to octal.

    2) Used in circuits.

    3) Used in multiplexer.

    (b) Application of Multiplexer:

    I. It is used in communication system.

    II. Multiplexer is used in parallel to series conversion and logic function generator.

    Application of demultiplexer :

    1. The demultiplexer enables the bidirectional 800 Mbit/s-High-speed-data-transmission


    accordingly to the IEEE 1394-standard.

    2. The demultiplexer contains a patent pending optical lenses system correctiving geometric
    aberrations in a large spectral range.
    (c) Application of flip flop.

    1) A flip-flop in combination with a Schmitt trigger can be used for the


    implementation of an arbiter in asynchronous circuits.

    2) One use is to build finite state machines from electronic logic. The flip-
    flops remember the machine's previous state, and digital logic uses that
    state to calculate the next state.

    3) It stores smallest unit of memory.

    Question 2.Discuss the basic logic behind counter i.e. how will you obtain 1000(8) from
    0111(7)? How will you implement the same? How many flip flops will be complemented in a
    10 bit binary counter to reach the next count after 1001100111?

    ANSWER:

    A register that goes through a predetermined sequence of states upon the application of input
    pulses is called a counter. The input pulses may be clock pulses or may originate from an external
    source. They may occur at uniform interval of time or at random. Counter are found in almost all
    equipment containing digital logic. They are used for counting the no. of occurrence of an event
    and are useful for generating timing signals to control the sequence of operations in digital
    computers.

    Going through the sequence of binary no. such as 0000,0001,0010,0011 and so on, we note that
    the lower-order bit is completed from one count to the next if and only if all its lower order bits are
    equal to 1.for example binary count from 0111(7) to 1000(8) is obtained by

     Complimenting the lower order bit.


     Compliment the second-order bit because the first bit of 0111 is 1.
     Complimenting the third-order bit because the first two bits of 0111 are 1’s.
     Complimenting the forth-order bit because the first three bits of 0111 are 1’s.
    Three flip-flop be complimented to reach the next count after 1001100111.

    Question 3.What will happen if buffer gate in the clock input of the register is removed?
    What is the role of clear and load signals in designing register with parallel load?

    ANSWER:

    BUFFER GATE:-

    The buffer gate in the clock input reduces the power requirement from the clock generator .less
    power is required when the clock is connected to only one input gate instead of power
    consumption that four inputs would have required if the buffer will not used.

    LOAD SIGNAL:-
    The load input in the register determines the action to be taken with each clock pulse. When load
    input is 1,the data in the four inputs are transferred into the register with the next positive
    transition of a clock pulse. When the load input is 0, the data inputs are inhibited and the D inputs
    of the flip-flop are connected to their outputs.

    CLEAR SIGNAL:-

    The clear signal goes to the special terminal in each flip-flop. When the input goes to 0, all flip-
    flops are reset asynchronously. The clear input is useful for clearing the register to all zeros prior
    to its clocked operation. The clear input must be maintained at logic 1 during normal clocked
    operation. The clock signal enables the D input but that the clear input is independent of the clock.

    Question 4.The content of a four bit register is initially 1101. The register is shifted six times
    to the right with the serial input being 101101.what is the content of the register after each
    shift?

    ANSWER:

    The content of a 4-bit counter is initially 1101.

    Serial input = 101101

    We use the last 4 bits (1101)

    After 1st shift 1110

    After 2nd shift 0111

    After 3rd shift 1011

    After 4th shift 1101

    After 5th shift 0110

    After 6th shift 1011

    Question 5.Draw the block diagram to implement following register transfer statement

    yT2:R2 R1, R1 R2

    ANSWER:
    This simultaneous operation is possible with registers that have edge-triggered flip-flops. The
    registers are connected to each other and the signal from the AND-gate serves as LD (load)
    signal.

    Question 6.A digital computer has a common bus system for 16 registers of 32 bit each. The
    bus is constructed with multiplexers.

    (a) How many selection inputs are there in each multiplexer?

    (b) What sizes of multiplexers are needed?

    (c) How many multiplexers are there in the bus?

    ANSWER:

    a) 16 registers = 24 => 4 selection inputs

    b) 16 registers => 16 x 1 line multiplexers

    c) 32 bits / register => 32 multiplexers

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