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    Hyundai Electronics America HY6264A-I 8K X 8bit Cmos Sram Ratings Information

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    6264

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    Hyundai Electronics America HY6264A-I 8K X 8bit Cmos Sram Ratings Information

    Uploaded by

    asdasd
    93 views6 pages
    6264

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    6264

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    6264

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    93 views6 pages

    Hyundai Electronics America HY6264A-I 8K X 8bit Cmos Sram Ratings Information

    Uploaded by

    asdasd
    6264

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 6

    HYUNDAI ELECTRONICS AMERICA

    HY6264A-I
    8K x 8bit CMOS SRAM

    RATINGS INFORMATION

    ABSOLUTE MAXIMUM RATING (1)


    Symbol

    Parameter

    Rating

    Vcc VIN VOUT

    Power Supply
    Input/Output -0.5 to 7.0
    Voltage

    TA

    Operating
    Temperature

    Unit

    Remark

    0 to 70

    HY6264A

    -40 to 85

    HY6264A-I

    TSTG

    Storage
    Temperature

    -65 to 125

    PD

    Power
    Dissipation

    1.0

    IOUT

    Data Output
    Current

    50

    mA

    TSOLDER

    Lead
    Soldering
    Temperature
    & Time

    260 / 10

    C / sec

    Note
    1. Stresses greater than those listed under ABSOLUTE MAXIMUM
    RATINGS may cause permanent damage to the device. This is stress
    rating only and the functional operation of the device under these or
    any other conditions above those indicated in the operation of this

    specification is not implied. Exposure to the absolute maximum


    rating conditions for an extended period may affect reliability.

    RECOMMENDED DC OPERATING CONDITIONS


    TA=0C TO 70C / -40C TO 85C
    Symbol

    Parameter

    Min

    Typ

    Max

    Unit

    Vcc

    Supply Voltage

    4.5

    5.0

    5.5

    VIH

    Input High Voltage

    2.2

    Vcc+0.5 V

    VIL

    Input Low Voltage

    -0.5(1)

    0.8

    Note
    1. VIL = -3.0V for pulse width less than 50ns

    TRUTH TABLE
    /CS1
    H

    CS2
    X

    /WE
    X

    /OE

    MODE

    I/O OPERATION

    High-Z
    Standby

    High-Z

    Output Disabled

    High-Z

    Read

    Data Out

    Write

    Data In

    Note
    1. H=VIH, L=VIL, X=Don't Care

    DC ELECTRICAL CHARACTERISTICS
    Vcc = 5.0V 10%, TA =0C to 70C(Normal) / -40C to 85C (E.T.) unless
    otherwise specified
    Symb

    Parameter

    Test Condition

    Min

    Typ

    Max

    Unit

    ol
    ILI

    Input Leakage
    Current

    -1

    uA

    ILO

    Vss <= VOUT <= Vcc


    Output Leakage /CS1=VIH or
    -1
    Current
    CS2=VIL or /OE = VIH
    or /WE = VIL

    uA

    Icc

    Operating
    Power Supply
    Current

    /CS1 = VIL CS2=VIH


    VIN = VIH or VIL II/O = OmA

    30

    50

    mA

    Icc1

    Average
    Operating
    Current

    /CS1 = VIL CS2=VIH


    Min. Duty
    Cycle = 100% II/O =
    OmA

    30

    50

    mA

    ISB

    TTL Standby
    Current
    (TTL Input)

    /CS1 = VIH or
    CS2=VIL

    0.4

    mA

    mA

    100

    uA

    10

    uA

    100

    uA

    30

    uA

    ISB1

    Vss <= VIN <= Vcc

    CMOS
    /CS1 =
    Standb HY626
    Vcc- 0.2V L
    4A
    y
    CS2 <=
    Current
    LL
    0.2V or
    (CMO
    CS2 = VccS
    L
    0.2V
    Input) HY626
    4A-I
    LL

    VOL

    Output Low
    Voltage

    IOL= 2.1 mA

    0.4

    VOH

    Output High
    Voltage

    IOH = -1.0mA

    2.4

    Note: Typical values are at Vcc = 5.0V, TA = 25C

    AC CHARACTERISTICS
    Vcc = 5.0V 10%, TA = 0C to 70C(Normal) / -40C to 85C (E.T ), unless
    otherwise noted

    -70

    Sym
    bol

    -85

    -10

    Parameter

    Unit
    Min. Max. Min. Max. Min. Max.

    READ CYCLE
    1

    tRC Read Cycle Time

    70

    85

    100 -

    tAA Address Access Time

    70

    85

    100 ns

    tAC Chip Select Access


    S
    Time

    70

    85

    100 ns

    tOE

    45

    50

    55

    ns

    tCL Chip Select to Output


    Z
    in Low Z

    10

    10

    10

    ns

    tOL Output Enable to


    Z
    Output in Low Z

    ns

    tCH Chip Deselection to


    Z
    Output in High Z

    30

    35

    35

    ns

    tOH Out Disable to Output


    0
    Z
    in High Z

    30

    35

    35

    ns

    tOH

    10

    ns

    70

    85

    100 -

    ns

    Output Enable to
    Output Valid

    Output Hold from


    Address Change

    ns

    WRITE CYCLE
    10

    tWC Write Cycle Time

    11

    tCW

    Chip Selection to End


    55
    of Write

    60

    70

    ns

    12

    tAW

    Address Valid to End


    of Write

    55

    60

    70

    ns

    13

    tAS Address Set-up Time

    ns

    14

    tWP Write Pulse Width

    50

    55

    60

    ns

    15

    tWR Write Recovery Time

    ns

    16

    tWH Write to Output in

    30

    35

    35

    ns

    High Z

    17

    tDW

    Data to Write Time


    Overlap

    18

    tDH

    19

    tOW

    35

    35

    40

    ns

    Data Hold from Write


    0
    Time

    ns

    Output Active from


    End of Write

    ns

    AC TEST CONDITIONS
    TA = 0C to 70C(Normal) / -40C to 85C (E.T.), unless otherwise
    specified
    PARAMETER

    Value

    Input Pulse Level

    0.8V to 2.4V

    Input Rise and Fall Time

    5ns

    Input and Output Timing Reference


    Level

    1.5V

    Output Load

    CL = 100pF + 1TTL Load

    AC TEST LOADS

    Note: Including jig and scope capacitance

    CAPACITANCE
    Temp = 25C, f= 1.0MHz
    Symbol

    Parameter

    Condition

    Max

    Unit

    CIN

    Input Capacitance

    VIN= 0V

    pF

    CI/O

    Input/Output Capacitance

    VI/O = 0V 8

    pF

    Note: These parameter are sampled and not100% tested

    Features | Pins |Ratings | Timing | Package | Ordering


    3101 North First Street, San Jose, CA 95134
    Phone: 408-232-8000 URL: http://www.hea.com/

    SRAM Data Sheets | Memory Products | email: DRAMSRAMmemory@hea.com


    Copyright 1997 Hyundai Electronics America.

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