Hex Buffer/Converter: Order Codes
Hex Buffer/Converter: Order Codes
Hex Buffer/Converter: Order Codes
HEX BUFFER/CONVERTER
s
HIGH SPEED: tPD = 8ns (TYP.) at VCC =6V LOW POWER DISSIPATION: ICC = 1A(MAX.) at TA=25C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 6mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 4050
DIP
SOP
TSSOP
ORDER CODES
PACKAGE DIP SOP TSSOP TUBE M74HC4050B1R M74HC4050M1R T&R M74HC4050RM13TR M74HC4050TTR
DESCRIPTION The M74HC4049 is an high speed CMOS HEX BUFFER fabricated with silicon gate C2MOS technology. The internal circuit is composed of 3 stages, which enables high noise immunity and a stable output.
Input protection circuits are different from those of the high speed CMOS ICs. The Vcc side diodes are designed to allow logic-level conversion from high-level voltages (up to 13V) to low level voltages.
July 2001
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M74HC4050
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No 2, 4, 6, 10, 12, 15 3, 5, 7, 9, 11, 14 13, 16 8 1 SYMBOL 1Y to 6Y 1A to 6A NC GND VCC NAME AND FUNCTION Data Outputs Data Inputs Not Connected Ground (0V) Positive Supply Voltage
TRUTH TABLE
INPUT nA L H OUTPUT nY L H
ICC or IGND DC VCC or Ground Current PD Power Dissipation Tstg TL Storage Temperature Lead Temperature (10 sec)
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied (*) 500mW at 65 C; derate to 300mW by 10mW/C from 65C to 85C
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M74HC4050
DC SPECIFICATIONS
Test Condition Symbol Parameter VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 VOL Low Level Output Voltage 2.0 4.5 6.0 4.5 6.0 II ICC Input Leakage Current Quiescent Supply Current 6.0 6.0 IO=-20 A IO=-20 A IO=-20 A IO=-4.0 mA IO=-5.2 mA IO=20 A IO=20 A IO=20 A IO=4.0 mA IO=5.2 mA VI = VCC or GND VI = 13 V VI = VCC or GND TA = 25C Min. 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 4.18 5.68 2.0 4.5 6.0 4.31 5.8 0.0 0.0 0.0 0.17 0.18 0.1 0.1 0.1 0.26 0.26 0.1 0.5 1 1.9 4.4 5.9 4.13 5.63 0.1 0.1 0.1 0.33 0.33 1 5 10 Typ. Max. Value -40 to 85C Min. 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 4.10 5.60 0.1 0.1 0.1 0.40 0.40 1 20 A A V V Max. -55 to 125C Min. 1.5 3.15 4.2 0.5 1.35 1.8 Max. V Unit
VIH
High Level Input Voltage Low Level Input Voltage High Level Output Voltage
VIL
VOH
tTLH tTHL Output Transition Time tPLH tPHL Propagation Delay Time
50
50
ns
150
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M74HC4050
CAPACITIVE CHARACTERISTICS
Test Condition Symbol Parameter VCC (V) 5.0 5.0 TA = 25C Min. Typ. 5 26 Max. 10 Value -40 to 85C Min. Max. 10 -55 to 125C Min. Max. 10 pF pF Unit
CIN CPD
1) CPD is defined as the value of the ICs internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/6 (per gate)
TEST CIRCUIT
CL = 50pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50)
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M74HC4050
P001C
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M74HC4050
PO13H
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M74HC4050
A2 A1 b e K c L E
E1
PIN 1 IDENTIFICATION
1
0080338D
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M74HC4050
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