International Journal on Recent and Innovation Trends in Computing and Communication

Volume: 2 Issue: 3

ISSN: 2321-8169
578 585

__________________________________________________________________________________________

A Survey on Parallel Architecture and Parallel Programming Languages

and Tools
C.Namrata Mahender
Dept. of CS and IT,
Dr.Babasaheb Ambedkar Marathwada University,
Aurangabad,India
e-mail: nam.mah@gmail.com

Abstract In this paper, we have presented a brief review on the evolution of parallel computing to multi-core architecture. The survey
briefs more than 45 languages, libraries and tools used till date to increase performance through parallel programming. We have given
emphasis more on the architecture of parallel system in the survey.
Keywords- Parallel Computing, Parallelization, Classification, shared memory, distributed memory architecture
__________________________________________________*****_________________________________________________

I.

INTRODUCTION

In 1945 Von Neumann suggested the stored-program

model of computing, the architecture stated that a program is
a sequence of instructions stored sequentially in the
computers memory and are executed one after the other in a
linear, single-threaded fashion. As time went on
advancement in mainframe technology expanded the idea of
proposed by Von Neumann, the 1960 saw the advent of time
sharing OS, run on large mainframe computer. Then the
standalone PC became the buzz but due to large computation
required and cost of Pc, need of concurrency came into
picture, thus parallel computing became the need of
time.[1,2]
Parallel computing came in the late 1950s ,with
advancements surfacing in the form of supercomputers
throughout the 60s and 70s. These were shared memory
multiprocessors ,with multiple processors working side-byside on shared data. In the mid 1980s a new kind of parallel
computing was launched when the Caltech Concurrent
computation project built a supercomputer for scientific
applications from 64 Intel 8086/8087 processors. This
system showed that extreme performance could be achieved
with mass market, off the shelf microprocessors. These
massively parallel processor came to dominate the top end of
computing, with ASCI Red supercomputer in 1997 breaking
the barrier of one trillion floating point operations per
seconds. Science then MPPS has continued to grow in size
and power.
Staring in the late 80s, cluster came to compete and
eventually displace MPPs for many applications. A cluster is
a type of parallel computer built from large numbers of offthe-shelf computers connected by an off-the-shelf network.
Today, clusters are the workhorse of scientific computing
and are the dominant architecture in the data centers that
power the modern information age.

Today, parallel computing is becoming mainstream based on

multicore processors most desktop and laptop systems now ship
with multiple cores. The reason is that increasing performance
through parallel processing can be far more energy-efficient than
increasing microprocessor clock frequency.[2,3]

A. Era of computing
The most prominent two eras of computing are:
sequential and parallel era. In the past decade parallel
machines have become significant competitors to vector
machines in the quest of high performance computing. A
century wide view of development of computing eras is
shown in figure 1.
The computing era starts with
development in hardware architecture, followed by system
software particularly in the era of compilers and operating
system, applications and reaching its saturation point with its
growth in problem solving environment s. every element of
computing
undergoes
three
phases:
R&D,
Commercialization and commodity.[4]

Figure 1. Two Eras of Computing

578
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International Journal on Recent and Innovation Trends in Computing and Communication

Volume: 2 Issue: 3

ISSN: 2321-8169
578 585

__________________________________________________________________________________________
II.

PARALLEL COMPUTING CLASSIFICATION

Parallel computing can be defined based on architecture

or the way programs are implemented, or the way the
algorithm or program is decomposed.
A. Parallel computer based on Architecture
1) Flynns taxonomy
Flynn's
taxonomy
distinguishes
multi-processor
computer architectures according to how they can be
classified along the two independent dimensions of
Instruction and Data. Each of these dimensions can have
only one of two possible states: Single or Multiple.The
system has four classes SISD,SIMD,MISD,MIMD

a) Single Instruction, Single Data (SISD):

A serial (non-parallel) computer
Single Instruction: Only one instruction stream is
being acted on by the CPU during any one clock
cycle
Single Data: Only one data stream is being used as
input during any one clock cycle
Deterministic execution
This is the oldest and even today, the most common
type of computer
Examples:
older
generation
mainframes,
minicomputers and workstations; most modern day
PCs.
b) Single Instruction, Multiple Data (SIMD):
A type of parallel computer
Single Instruction: All processing units execute the
same instruction at any given clock cycle
Multiple Data: Each processing unit can operate on a
different data element
Best suited for specialized problems characterized by
a high degree of regularity, such as graphics/image
processing.
Synchronous (lockstep) and deterministic execution
Two varieties: Processor Arrays and Vector
Pipelines
c) Multiple Instruction, Single Data (MISD):
A type of parallel computer
Multiple Instruction: Each processing unit operates
on the data independently via separate instruction
streams.
Single Data: A single data stream is fed into multiple
processing units.
Few actual examples of this class of parallel
computer have ever existed. One is the experimental
Carnegie-Mellon C.mmp computer (1971).
Some conceivable uses might be:
multiple
frequency filters operating on a single signal stream,
multiple cryptography algorithms attempting to
crack a single coded message.
d) Multiple Instruction, Multiple Data (MIMD):
A type of parallel computer

Multiple Instruction: Every processor may be

executing a different instruction stream
Multiple Data: Every processor may be working
with a different data stream
Execution can be synchronous or asynchronous,
deterministic or non-deterministic
Currently, the most common type of parallel
computer - most modern supercomputers fall into
this category.
Examples: most current supercomputers, networked
parallel computer clusters and "grids", multiprocessor SMP computers, multi-core PCs. [4]
2)
Fengs Classification
Tse-yun Feng suggested the use of degree of parallelism
to classify various computer architectures. Serial Versus
Parallel Processing The maximum number of binary digits
that can be processed within a unit time by a computer
system is called the maximum parallelism degree P.A bit
slice is a string of bits one from each of the words at the
same vertical position. There are 4 types of methods under
above classification
Word Serial and Bit Serial (WSBS)
Word Parallel and Bit Serial (WPBS)
Word Serial and Bit Parallel(WSBP)
Word Parallel and Bit Parallel (WPBP)
WSBS has been called bit parallel processing because
one bit is processed at a time.WPBS has been called bit slice
processing because m-bit slice is processes at a time.WSBP
is found in most existing computers and has been called as
Word Slice processing because one word of n bit processed
at a time. WPBP is known as fully parallel processing in
which an array on n x m bits is processes at one time.[4]
Mode
WSPS
N=1,M=1
WPBS
N=1,M>1
WSBP
n>1,m=1(Word Slice
Processing)
WPBP n>1,m>1(fully
parallel processing)

Table 1: Fengs Computer Classification

Computer Model
Degree of
Parallelism
The MINIMA
(1,1)

STARAN,
MPP,
DAP
IBM 370/168 UP
CDC6600
Burrough 7700
VAX 11/780
ILLiav IV

(1,256),
(1,16384),
(1,4096)
(64,1)
(60,1)
(48,1)
(16/32,1)
(64,64)

3)
Handlers Classification
Wolfgang Handler has proposed a classification scheme
for identifying the parallelism degree and pipelining degree
built into the hardware structure of a computer system. He
considers at three subsystem levels:
Processor Control Unit (PCU)
Arithmetic Logic Unit (ALU)
Bit Level Circuit (BLC)
Each PCU corresponds to one processor or one CPU. The
ALU is equivalent to Processor Element (PE). The BLC
corresponds to combinational logic circuitry needed to
perform 1 bit operations in the ALU.
579

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ISSN: 2321-8169
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A computer system C can be characterized by a triple
containing six independent entities
T(C) = <K x K', D x D', W x W' >
Where K = the number of processors (PCUs) within the
computer,
D = the number of ALUs under the control of one CPU,
W = the word length of an ALU or of an PE,
W' = The number of pipeline stages in all ALUs or in a
PE,
D' = the number of ALUs that can be pipelined,
K' = the number of PCUs that can be pipelined.
B. Parallel computer based on memory architecture
Generally system for parallel computer can be classified
by using memory in two types shared memory and
distributed memory
1) Shared Memory Architecture
Shared memory machines can be divided into two main
classes based upon memory access times: UMA and NUMA.
a) Uniform Memory Access (UMA):

Most commonly represented today by Symmetric

Multiprocessor (SMP) machines
Identical processors
Equal access and access times to memory
Sometimes called CC-UMA - Cache Coherent
UMA.Cache coherent means if one processor
updates a location in shared memory, all the other
processors know about the update. Cache coherency
is accomplished at the hardware level.

explicitly define how and when data is

communicated. Synchronization between tasks is
likewise the programmer's responsibility.
The network "fabric" used for data transfer varies
widely, though it can can be as simple as Ethernet.

3) Hybrid -Distributed memory architecture

The largest and fastest computers in the world today
employ both shared and distributed memory architectures.
The shared memory component can be a cache
coherent SMP machine and/or graphics processing
units (GPU).
The distributed memory component is the
networking of multiple SMP/GPU machines, which
know only about their own memory - not the
memory on another machine. Therefore, network
communications are required to move data from one
SMP/GPU to another.
Parallel Processing based on data Parallelism
There are many ways program is parallelized,
majorly it is done in three ways instruction, task and
data . In data parallel processing, full jobs are
assigned for processing . it is efficient with coarse
grained tasks and quasi scheduling , the figure 2
shows the different methods of data processing
.[3,5]

b) Non-Uniform Memory Access (NUMA):

Often made by physically linking two or more SMPs

One SMP can directly access memory of another
SMP
Not all processors have equal access time to all
memories
Memory access across link is slower
If cache coherency is maintained, then may also be
called CC-NUMA - Cache Coherent NUMA

2) Distributed memory architecture

Distributed memory systems require a communication
network to connect inter-processor memory.
Processors have their own local memory. Memory
addresses in one processor do not map to another
processor, so there is no concept of global address
space across all processors.

Because each processor has its own local memory,

it operates independently. Changes it makes to its
local memory have no effect on the memory of other
processors. Hence, the concept of cache coherency
does not apply.
When a processor needs access to data in another
processor, it is usually the task of the programmer to

Figure 2. Shows various Methods of parallel processing

III.

PARALLEL PROGRAMMING LANGUAGE

AND TOOLS

Numerous programming frameworks have been

developed so far to support parallel execution in parallel
computing system. The frameworks function at various
levels of abstraction, represents different formal models for
parallelism, exploit dedicated or general-purpose languages
and vary from local area network based systems to
geographically distributed systems. Each framework is
specialized for a particular type of applications. Here we
have given brief information about more than 45 languages
and tools used to perform parallel programming.
1) Parallel Programming
Here we are just briefing the majorly used languages for
parallel programming with for which they extension, support
580

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International Journal on Recent and Innovation Trends in Computing and Communication

Volume: 2 Issue: 3

ISSN: 2321-8169
578 585

__________________________________________________________________________________________
used for executing on platform and does has GUI interface.
Table 2 gives the brief about parallel languages.[ 6-62]
Sr.
No

Table 1: Types of Parallel Programming [6-62]

Language
Language
GUI Support
supported
Adaptor(Automatic

Data Parallelism
TranslatOR)

CM,Fortran,Subset

Athena Widget,X-

of Fortran 90

Windows system

Caper(Concurrent
2

Application

C,C++,Concurrent
C

X11 R3-R5

C++)

PC++(Parallel C++)

25

Compostion

Charm

PCN,C, Fortran

Debugger+

X11R5

Performance
Tool

26

C/Fortran

Debugger+

None

Language

Fortran77

None

Language

SR

X Windows

Language

PDDP(The Parallel

Performance
Tool

C, Fortran77

Preprocessor)

27

Data Distribution
Preprocessor)

CC++

None

Language

SR(Synchronizing

28

Resources)

C,C++

X Motif

Language+

Performance
29

Strand88,

Strand 88

Code2.0,C

X11R4 or X11R5

Debugger+

X11

Fortran,C

Language+
Code2.0

Language
Language+

PCP/PFP(Parallel

Tool

None

Notation)

Language+
4

pC++

Language

Environment )
CC++(Compositional

24

PCN(Program

Type

Language +

Programming

Tool

Performance
Tool

Performance

Language+

Tool
COOL(Concurrent
6

Object Oriented

Language+
COOL

None

TOPSys(Tools for

30

Performance

Language)

Fortran77,C

Parallel Systems)

Debugger+

X Windows

Performance
Tool

Tool

Dino

None

Language

Fortran90

Fortran90

None

Language

Fortran D

Fortran77

X11R4

Language

10

Fortran M

FortranM

None

Language

11

Grids

Fortran77

X11R5

Language

31

Vienna Fortran

32

Attributed Graph

Vienna Fortran,

X11R5,OSF/Motif

Language

GL

Performance

Fortran,C

None

Language

Fortran77

Visage(VIsual

Language+

Enviornment)
33
12

HPF(High
Performance Fortran)

HPF

None

Language

None

Performance

Language+
13

Hypertool

Tool
14

Jade

None

Language
Language+

15

Linda

C, Fortran77

X11R4

Debugger +
Performance
Tool

16

MeldC

17

Mentat

18

Modula-2*

19

20
21

O-OFortran(Object
oriented Fortran)

MeldC
MPL-an Extended

None

Language+
Debugger

None

Language

Modula-2*

None

Language

Fortran77,C++

None

Language

None

Language

C++

P-D Linda (Prolog-

SICStus Prolog

DLinda)

0.7 and 2.1

P-Languages

PC,P Fortran

None

Language
Language+

22

Parallelax

Parallelax

Macintosh

Performance
Tool

X3H5

2) Parallel Libraries and tools

The fifteen tools described in this part try to achieve
portability by providing libraries. Most of them support
parallelism within an application, Application-oriented highlevel abstractions are provided in Canopy, whereas the others
support programming languages such as C and Fortran with
parallel extensions. A few support programming in both
shared-memory paradigm and message-passing paradigm.
Several of them extend the support for distributed memory
machines to a network of computers. Table 3 shows the
different libraries used till date.[62-89]
Table 2: Types of Parallel Programming Libraries [62-89]
Language
Sr.No
Libraries
GUI Support
Supported
1
APPL
Fortran,C
None
2
Canopy
Fortran,C
None
CM(Communication
3
C
None
Manager)
CPS(Cooperative
4
Preocesses
Fortran,C
None
Software)
X-indows,
5
Express
Fortran 77,C
Sunview,postscript

Language+
23

Parallelaxis

Parallelaxis

X11R5

Debugger+

Tool

GenMP(GENeric
MultiProcessor)

Fortran 77

None

Performance

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International Journal on Recent and Innovation Trends in Computing and Communication

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ISSN: 2321-8169
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__________________________________________________________________________________________
7

LMPS(The
Livermore Message
Passing System)

Fortran 77,C

None

Mtask(MultiTasking
Package)

None

P4

Fortran 77,C

None

10

Parmacs

Fortran77,C,
PARMACS
6.0

X11R3

11

Parti(Parallel
Automated Runtime
Toolkit at ICASE)

Fortran,C

None

12

PICL(A portable
Instrumented
Communication
Library for Intel)

Fortran 77,C

None

13

PVM(Parallel
Virtual Machine)

Fortran 77,C

14

SPPL(The Stuttgart
Parallel Processing
Library)

15

TCGMSG
(Theoretical
Chemistry Group
Message Passing
Toolkit)

Fortran,C

None

16

OpenMp

Fortran,C/C++

X Windows

17

Pthreads

C/C++

Any

IV.

None

[7]

Thomas Sterling, Paul Messina, Marina Chen, Frederica

Darema, Geoffrey Fox,Michael Heath, Ken Kennedy, Robert
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None

CONCLUSION

In this paper we have discussed all major parallel

architecture and its characteristics. We have discussed all
major aspects of parallel computing, staring from its
evolution to the present multi-core era. We covered almost
all languages and libraries and tools which are used to
implement parallel programs, improve performance and
computing speed respectively.

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ISSN: 2321-8169
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__________________________________________________________________________________________
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__________________________________________________________________________________________
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International Journal on Recent and Innovation Trends in Computing and Communication

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