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    Introduction To Quartus II 9.1 Web Edition

    Uploaded by

    lmnnreg
    This document provides an overview of the Quartus II integrated development environment (IDE) and design flow, including how to start and configure projects, write and check code, perform functional simulation, implement designs through pin assignment and compilation, and program designs onto hardware. The key steps are starting a new project through the wizard, opening existing projects, using templates to write VHDL code, checking for errors, generating a simulation netlist to run functional simulation in the waveform editor, assigning pins in the assignment editor, compiling the project, and using the programmer to download the design onto an Altera FPGA development board.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd

    Introduction To Quartus II 9.1 Web Edition

    Uploaded by

    lmnnreg
    387 views7 pages
    This document provides an overview of the Quartus II integrated development environment (IDE) and design flow, including how to start and configure projects, write and check code, perform functional simulation, implement designs through pin assignment and compilation, and program designs onto hardware. The key steps are starting a new project through the wizard, opening existing projects, using templates to write VHDL code, checking for errors, generating a simulation netlist to run functional simulation in the waveform editor, assigning pins in the assignment editor, compiling the project, and using the programmer to download the design onto an Altera FPGA development board.

    Original Description:

    Quartus II 9.1 free software intro

    Original Title

    Introduction to Quartus II 9.1 Web Edition

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    © © All Rights Reserved

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    PDF, TXT or read online from Scribd

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    This document provides an overview of the Quartus II integrated development environment (IDE) and design flow, including how to start and configure projects, write and check code, perform functional simulation, implement designs through pin assignment and compilation, and program designs onto hardware. The key steps are starting a new project through the wizard, opening existing projects, using templates to write VHDL code, checking for errors, generating a simulation netlist to run functional simulation in the waveform editor, assigning pins in the assignment editor, compiling the project, and using the programmer to download the design onto an Altera FPGA development board.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    387 views7 pages

    Introduction To Quartus II 9.1 Web Edition

    Uploaded by

    lmnnreg
    This document provides an overview of the Quartus II integrated development environment (IDE) and design flow, including how to start and configure projects, write and check code, perform functional simulation, implement designs through pin assignment and compilation, and program designs onto hardware. The key steps are starting a new project through the wizard, opening existing projects, using templates to write VHDL code, checking for errors, generating a simulation netlist to run functional simulation in the waveform editor, assigning pins in the assignment editor, compiling the project, and using the programmer to download the design onto an Altera FPGA development board.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 7

    Introduction to Quartus II 9.

    1 Web Edition
    TOC

    IDE (Integrated Development Environment)


    Starting a new project
    Opening a project
    Starting and configuring text editor
    Using templates
    Checking the code
    Functional simulation
    Editing waveform stimulus
    Running a functional simulation
    Implementing the application
    Pin assignment
    Compiling the project
    Programming the hardware

    IDE (Integrated Development Environment)

    Windows
    Project Navigator
    Tasks
    Messages
    Large area for other windows (VHDL editor, squematics editor, Simulator Tool, Assignment Editor, Compilation
    Report)

    Starting a new project


    1. File > New Project Wizard

    a.

    2. [Page 1 of 5]
    a. Working directory: D:\DSDC\P1
    b. Name of the project= Name of the top-level design entity
    c. Next
    3. [Page 2 of 5] All in blank
    a. Next
    4. [Page 3 of 5] Select device (the same as in the Altera DE2 Board)
    a. Device family: Cyclone II
    b. Target device: Specific device selected in 'Available devices' list
    c. Available devices: EP2C35F672C6

    c. Available devices: EP2C35F672C6

    d.

    5. [Page 4 of 5] All <None>


    a. Next
    6. [Page 5 of 5]
    a. Check data, in particular folder and device
    b. Finish

    Opening a project
    1. File > Open Project...

    Starting and configuring text editor


    The text editor supports code folding and colours keywords
    1. Select File > New
    a. Choose VHDL File. Ok. This opens the text editor.
    2. To see the new file included in the Project Navigator window you have to save it
    a. File > Save As
    b. Choose VHDL File.

    c.

    3. Then write a file name and ensure 'Add file to current project' option is checked:

    a.
    4. Text editor options: Tools > Options > Text Editor
    Suggested font: Lucida Console

    Suggested font: Lucida Console

    Using templates
    Templates help us to write code. Quartus II templates include statements and full designs in several languages.
    1. Edit > Insert Template
    a. Choose VHDL > Library Clause, etc.

    b.

    2. Save the file

    Checking the code


    Tool to check code for errors:
    1. Ensure you have selected the target file in the Project Navigator window
    2. Check tool: Processing > Analyze Current File
    a. See Flow Summary in the new window:

    b. Check for errors in Message windows, Processing tab. If any, double click on it to locate it in the code.

    Functional simulation
    A netlist is needed.
    1. Processing > Simulator Tool

    a.

    b. Simulation mode: Functional


    c. Generate Functional Simulation Netlist
    d. Open (to open the waveform editor)

    Editing waveform stimulus


    1. In the waveform editor, open contextual menu to insert node:

    a.

    b.

    c. Use Node Finder to select one of available nodes:

    d.

    e. Use List and add all the nodes listed in Nodes Found list. Then add all of them with '>>' button.
    f. In the waveform editor, select a node and use different tools to edit it.

    f. In the waveform editor, select a node and use different tools to edit it.

    g.

    h. Save it: a .vwf file is created.

    Running a functional simulation


    1. Processing > Start Simulation

    a.

    Implementing the application


    Pin assignment
    1. Assignment > Assignment Editor
    2. To view nodes, click on Show All Know Pin Names button:
    a.

    a.

    b. In the Category window, select Pin:

    c.

    3. Load assignment for Altera DE2 board:


    a. Assignments > Import Assignments

    b.

    c. The Assignment Editor window will be updated


    4. Assign a node: double click on the cell

    a.

    b. Assign (check the Altera DE2 pin table)


    i. X1: PIN_N25 (SW[0])
    ii. X2: PIN_N26 (SW[1])
    iii. f: PIN_AE22 (LEDG[0])
    c. Remove obsolete assignments: Assignments > Remove Assignments (ensure to check the option)

    d.

    e. Result:

    f.

    Compiling the project


    1. Compilation: Processing > Start Compilation

    Programming the hardware


    1.
    2.
    3.
    4.

    Use USB Blaster port to connect to USB port in host computer.


    Ensure programmer switch is RUN position.
    Plug the power cord to Altera DE2 board. Switch on the board.
    In Quartus II, use Tools > Programmer
    a. Push Hardware Setup button and select the hardware USB-Blaster. Ensure the Currently selected hardware is
    USB-Blaster and close the window.

    USB-Blaster and close the window.

    b.

    c. Push Start button


    5. Test the application using switches SW0 and SW1, and check result in led LEDG0

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