An Implementation Study of Airborne Medium PRF Doppler Radar Signal Processing On A Massively Parallel SIMD Processor Architecture
An Implementation Study of Airborne Medium PRF Doppler Radar Signal Processing On A Massively Parallel SIMD Processor Architecture
100
1
Range, b h number
10 10
100
loloo;c! LPD
Instruction
t
30
100
300
Range
* 32-bit YO-registers
L
Multiplication
1.5 Mops
20 Gops
MultiplyAnd-Accumulate
1.5 Mops
20 Gops
Table 1
I
1
Data U 0
I1 THEFVIP ARCHITECTURE
GLU
32-bit accumulator
:1
=_I
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I11 ALGORITHM
{CHI
, CH2 , CH3 , C H 4 )
&
4*2*f6
Detection of
,
(b/
4*2*16
/II ;" I
Pulse code
4*2*f6
Vector
adjustment
('1
4*2*28
Amplitude
normqlization
_$
{ CHl ,CH2
(i)
4*2*17
0)
li;.
k24
(01
11-3
14-6
I Range bins
I300
I100
:i
2 *2*24 C
{ cH
h1
43),
Samples processed
Envelope
detection
fl
9900
17-9
I30
1300
257
Pulse processed
12900
7710
CFAR
4*2*17
I CPI
4*2*7
Amplitude
normalization
1
4 *2*23
+ Q 2 ( r , p ) > Threshold
(2)
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S(&
PI =
S(&
P ) . ein+
(3)
s,,,<r,n= s(g)("-f) N ,
*
(9)
554
need to store data from the 9 latest CPIs. These data are
stored in a memory which is handled by the F V P b array
controller, but the writing into the table is made with the
data extracted from the FVlPa array.
Frequency
One PE
FVIPa
Range
Extracted data
memory
Frequency (RAM)
One PE
t
*
Reset RAM
while (Data in table)
k2
Range
FVIPb
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N=32
N=128
N=256
(a)
410
410
410
(b)
160
160
160
3 84
1152
2176
(c)
I(d)
I136
I136
I (e>
I23184
I47872
I79456
(f)
(g)
~~~
Total, 4
channels
I136
I132
I132
I132
I6798
I7398
I2278
1528
~528
1528
5673
7977
11049
76570
100106
119748
I
I
I
~
Resolving
I Sum
161,100
171,900 I
V CONCLUSIONS
We have shown that the FVIP is capable of performing a
typical MPD radar signal processing. The main signal
processing part of the algorithm is parallel 1D fourier
transforms of different length. The key of the success is the
good neighbor communication which makes it possible to
do the 2D parts of the signal processing without much
performance loss apd which also to make the F'FI
implementation effective.
The resolving is solved with a separate, slightly different
FVIP array with extended RAM to handle the large
VI ACKNOWLEDGEMENT
The authors would like to thank the Swedish Board for
Technical Development (NUTEX) for financial support.
REFERENCES
[I]
[21
[31
[41
[5]
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