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Operating System Assignment 1

The document discusses the basic components of a computer system including the processor, main memory, I/O modules, and system bus. It describes how these components interact and how instruction execution works, with the processor fetching and executing instructions from memory. It also covers memory hierarchy, I/O techniques including programmed I/O, interrupt-driven I/O, and direct memory access (DMA).

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Utsav Preet
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© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
53 views

Operating System Assignment 1

The document discusses the basic components of a computer system including the processor, main memory, I/O modules, and system bus. It describes how these components interact and how instruction execution works, with the processor fetching and executing instructions from memory. It also covers memory hierarchy, I/O techniques including programmed I/O, interrupt-driven I/O, and direct memory access (DMA).

Uploaded by

Utsav Preet
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Assignment 1 (CS0206)

Date: 28/01/2016

Computer System Overview


An operating system exploits and manages all kinds of computer hardware to
provide a set of services directly or indirectly to the users. Services may be
functions the human users can use directly, e.g. file creation, user management,
etc., and also those that may be used indirectly, which embody as application
programming interface, all kinds of libraries and functions they provide.
In a computer system, there are all kinds of hardware, CPUs, mainboards,
monitors, network adapters, sound cards, mice, keyboards, printers, hard disks,
etc. Mainboard is not something that provides a specific function, instead it is a
collection of all kinds of slots and modules. To make all these things work
together, mainboard provides some kind of physical connections among them,
i.e. what we call system bus.

Basic Element
1. Processor
2. Main Memory
3. I/O Modules
4. System Bus Processor
Processor
Controls operation, performs data processing
Two internal registers Memory address resister (MAR) Memory buffer
register (MBR)
I/O address register
I/O buffer register
Main Memory
Volatile Data is typically lost when power is removed
Referred to as real memory or primary memory
Consists of a set of locations defined by sequentially numbers addresses
Containing either data or instructions
I/O Modules
Moves data between the computer and the external environment such as:
Storage (e.g. hard drive) Communications equipment Terminals
Specified by an I/O Address Register (I/OAR)
System Bus
Communication among processors, main memory, and I/O modules

Instruction Execution
A program consists of a set of instructions stored in memory

Two steps
Processor reads (fetches) instructions from memory
Processor executes each instruction
Basic Instruction Cycle

Instruction Fetch and Execute


The processor fetches the instruction from memory
Program counter (PC) holds address of the instruction to be fetched next PC is
incremented after each fetch
Instruction Register
Fetched instruction loaded into instruction register
Categories
Processor-memory
processor-I/O
Data processing
Control

Interrupts
Interrupt the normal sequencing of the processor
Provided to improve processor utilization

Most I/O devices are slower than the processor


Processor must pause to wait for device

Interrupt Cycle
After the execute cycle is completed, a test is made to determine if an interrupt was
enabled (e.g. so that another process can access the CPU)

If not, instruction cycle returns to the fetch cycle


If so, the interrupt cycle might performs the following tasks: (simplified...)
move the current value of PC into MBR
move the PC-save-address into MAR
move the interrupt-routine-address into PC
move the contents of the address in MBR into indicated memory cell

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continue the instruction cycle within the interrupt routineafter the interrupt
routine finishes, the PC-save-address is used to reset the value of PC and
program execution can continue

Memory Hierarchy
Major constraints in memory

Amount
Speed
Expense

Faster access time, greater cost per bit

Greater capacity, smaller cost per bit


Greater capacity, slower access speed

The Memory Hierarchy


Going down the hierarchy

Decreasing cost per bit


Increasing capacity
Increasing access time
Decreasing frequency of access to the memory by the processor

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Secondary Memory

Auxiliary memory
External
Nonvolatile
Used to store program and data files

Cache Memory
Invisible to the OS

Interacts with other memory management hardware


Processor must access memory at least once per instruction cycle

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Exploit the principle of locality with a small fast memory

I/O Techniques
When the processor encounters an instruction relating to I/O
it executes that instruction by issuing a command to the appropriate I/O
module.
Three techniques are possible for I/O operations:
Programmed I/O
Interrupt-driven I/O
Direct memory access (DMA)

Programmed I/O
The I/O module performs the requested action

then sets the appropriate bits in the I/O status register

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but takes no further action to alert the processor.

As there are no interrupts, the processor must determine when the instruction
is complete

Programmed I/O Instruction Set


Control Used to activate and instruct device
Status Tests status conditions
Transfer Read/write between process register and device

Interrupt-Driven I/O
Processor issues an I/O command to a module and then goes on to do some
other useful work.
The I/O module will then interrupt the processor to request service when it is
ready to exchange data with the processor. InterruptDriven I/O

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Eliminates needless waiting But everything passes through processor.

Direct Memory Access


Performed by a separate module on the system
When needing to read/write processor issues a command to DMA module
with:
Whether a read or write is requested
The address of the I/O device involved
The starting location in memory to read/write
The number of words to be read/written Direct Memory Access
I/O operation delegated to DMA module
Processor only involved when beginning and ending transfer.

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Much more efficient.

Assignment Submitted By
Utsav Preet
CSE - B(2nd Year)

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