DTSP 2marks PDF
DTSP 2marks PDF
DTSP 2marks PDF
2MARKS:
UNIT-I
INTRODUCTION
1. Define Signal.
A Signal is defined as any physical quantity that varies with time, space or any
other independent variables.
2. Define a system.
A System is a physical device (i.e., hardware) or algorithm (i.e., software) that
performs an operation on the signal.
3. What are the steps involved in digital signal processing?
o
o
o
15. What are the basic elements used to construct the block diagram of discrete time
system?
The basic elements used to construct the block diagram of discrete time
Systems are Adder, Constant multiplier &Unit delay element.
16. What is ROC in Z-Transform?
The values of z for which z transform converges is called region of
convergence (ROC). The z-transform has an infinite power series; hence it is
necessary to mention the ROC along with z-transform.
17. List any four properties of Z-Transform.
o
Linearity
o
Time Shifting
o
Frequency shift or Frequency translation
o
Time reversal
18. What are the different methods of evaluating inverse z-transform?
o
Partial fraction expansion
o
Power series expansion
o
Contour integration (Residue method)
19. Define sampling theorem.
A continuous time signal can be represented in its samples and recovered back if the
sampling frequency Fs 2B. Here Fs is the sampling frequency and B is the
maximum frequency present in the signal.
20. Check the linearity and stability of g(n),
Since square root is nonlinear, the system is nonlinear.
As long as x(n) is bounded, its square root is bounded. Hence this system is stable.
21. What are the properties of convolution?
1. Commutative property x(n) * h(n) = h(n) * x(n)
2. Associative property [x(n) * h1(n)]*h2(n) = x(n)*[h1(n) * h2(n)]
3. Distributive property x(n) *[ h1(n)+h2(n)] = [x(n)*h1(n)]+[x(n) * h2(n)]
UNIT-II
DISCRETE TIME SYSTEM ANALYSIS
1. Define DTFT.
Let us consider the discrete time signal x(n).Its DTFT is denoted as X(w).It is given as
X(w)= x(n)e-jwn
2. State the condition for existence of DTFT?
The conditions are
If x(n)is absolutely summable then
|x(n)|< 1
If x(n) is not absolutely summable then it should have finite energy for DTFT to exit.
3. List the properties of DTFT.
Periodicity
Linearity
Time shift
Frequency shift
Scaling
Differentiation in frequency domain
Time reversal
Convolution
Multiplication in time domain
Parsevals theorem
11. What is the way to reduce number of arithmetic operations during DFT
computation?
Number of arithmetic operations involved in the computation of DFT is greatly reduced by
using different FFT algorithms as follows.
1. Radix-2 FFT algorithms.
-Radix-2 Decimation in Time (DIT) algorithm.
- Radix-2 Decimation in Frequency (DIF) algorithm.
2. Radix-4 FFT algorithm.
12. What is the computational complexity using FFT algorithm?
1. Complex multiplications = N/2 log2N
2. Complex additions = N log2N
13. How linear filtering is done using FFT?
Correlation is the basic process of doing linear filtering using FFT. The correlation is
nothing but the convolution with one of the sequence, folded. Thus, by folding the sequence
h (n), we can compute the linear filtering using FFT.
14. What is zero padding? What are its uses?
Let the sequence x (n) has a length L. If we want to find the N point DFT (N>L) of the
sequence x (n). This is known as zero padding. The uses of padding a sequence with zeros
are
(i) We can get better display of the frequency spectrum.
(ii) With zero padding, the DFT can be used in linear filtering.
15. Why FFT is needed?
The direct evaluation of the DFT using the formula requires N2 complex multiplications
and N (N-1) complex additions. Thus for reasonably large values of N (inorder of 1000)
direct evaluation of the DFT requires an inordinate amount of computation. By using FFT
algorithms the number of computations can be reduced. For example, for an N-point DFT,
The number of complex multiplications required using FFT is N/2log2N. If N=16, the
number of complex multiplications required for direct evaluation of DFT is 256, whereas
using DFT only 32 multiplications are required.
16. What is the speed of improvement factor in calculating 64-point DFT of a sequence
using direct computation and computation and FFT algorithms?
Or
Calculate the number of multiplications needed in the calculation of DFT and FFT
with 64-point sequence.
The number
of complex multiplications required using direct computation is
N2=642=4096.
The number of complex multiplications required using FFT is
N/2 log2N = 64/2log264=192.
Speed improvement factor = 4096/192=21.33
17. What is the main advantage of FFT?
FFT reduces the computation time required to compute discrete Fourier transform.
18. Calculate the number of multiplications needed in the calculation of DFT using
FFT algorithm with using FFT algorithm with 32-point sequence.
For N-point DFT the number of complex multiplications needed using FFT algorithm is
N/2 log2N.
For N=32, the number of the complex multiplications is equal to 32/2log232=16*5=80.
19. What is FFT?
The fast Fourier transforms (FFT) is an algorithm used to compute
the DFT. It makes use of
the Symmetry and periodically properties of twiddles factor W KN to effectively reduce the
DFT computation time. It is based on the fundamental principle of decomposing the
computation of the DFT of a sequence of length N into successively smaller discrete Fourier
transforms. The FFT algorithm provides speed-increase factors, when compared with direct
computation of the DFT, of approximately 64 and 205 for 256-point and 1024-point
transforms, respectively.
20. How many multiplications and additions are required to compute N-point DFT
using redix-2 FFT?
The number of multiplications and additions required to compute N-point DFT using redix-2
FFT are N log2N and N/2 log 2N respectively.
21. What is meant by radix-2 FFT?
The FFT algorithm is most efficient in calculating N-point DFT. If the number of output
points N can be expressed as a power of 2, that is, N=2M, where M is an integer, Then this
algorithm is known as radix-s FFT algorithm.
22. What is a decimation-in-time algorithm?
Decimation-in-time algorithm is used to calculate the DFT of a N-point Sequence. The idea
is to break the N-point sequence into two sequences, the DFTs of which can be combined to
give the DFT of the original N-point sequence. Initially the N-point sequence is divided into
two N/2-point sequences xe(n) and x0(n), which have the even and odd members of x(n)
respectively. The N/2 point DFTs of these two sequences are evaluated and combined to
give the N point DFT. Similarly the N/2 point DFTs can be expressed as a combination of
N/4 point DFTs. This process is continued till we left with 2-point DFT. This algorithm is
called Decimation-in-time because the sequence x(n) is often splitted into smaller sub
sequences.
23. What are the differences and similarities between DIF and DIT algorithms?
Differences:
1. For DIT, the input is bit reversal while the output is in natural order, whereas for DIF, the
input is in natural order while the output is bit reversed.
2. The DIF butterfly is slightly different from the DIT butterfly, the difference being that
the complex multiplication takes place after the add-subtract operation in DIF.
Similarities: Both algorithms require same number of operations to compute the
DFT. Bot algorithms can be done in place and both need to perform bit reversal at some
place during the computation.
24. What are the applications of FFT algorithms?
1. Linear filtering
2. Correlation
3. Spectrum analysis
DFT
DTFT
1.
2.
Continuous function of
Fourier transform
2.
Approximation of derivatives
Impulse invariance
Bilinear transformation.
3) Which of the methods do you prefer for designing IIR filters? Why?
Bilinear transformation is best method to design IIR filter, since there is no aliasing in it.
4) What is the main problem of bilinear transformation?
Frequency warping or nonlinear relationship is the main problem of bilinear
transformation.
5) What is prewarping?
Prewarping is the method of introducing nonlinearly in frequency relationship to
compensate warping effect.
6) State the frequency relationship in bilinear transformation?
= 2 tan (w/2) T
Analog filter
i) Operates on analog signals.
ii) It is governed by linear difference
equation.
iii) It consists of electrical components
like resistors, capacitors and inductors.
iv) In digital filters the approximation
problem is solved to satisfy the desired
frequency response.
Increasing the length of the registers can enhance the performance characteristics
like accuracy, dynamic range, stability and tolerance.
The analog poles on the left half of s-plane are mapped into the interior of unit circle in
z-plane.
The analog poles on the imaginary axis of s-plane are mapped into the unit circle in the
z-plane.
The analog poles on the right half of s-plane are mapped into the exterior of unit circle
in z-plane.
18) What is the importance of poles in filter design?
The stability of a filter is related to the location of the poles. For a stable analog filter the
poles should lie on the left half of s-plane. For a stable digital filter the poles should lie
inside the unit circle in the z-plane.
19) Why an impulse invariant transformation is not considered to be one-to-one?
In impulse invariant transformation any strip of width 2/T in the s-plane for values of splane in the range (2k-1)/T (2k-1) /T is mapped into the entire z-plane. The left half
of each strip in s-plane is mapped into the interior of unit circle in z-plane, right half of
each strip in s-plane is mapped into the exterior of unit circle in z-plane and the imaginary
axis of each strip in s-plane is mapped on the unit circle in z-plane. Hence the impulse
invariant transformation is many-to-one.
20) What is Bilinear transformation?
The bilinear transformation is conformal mapping that transforms the s-plane to z-plane. In
this mapping the imaginary axis of s-plane is mapped into the unit circle in z-plane, The left
half of s-plane is mapped into interior of unit circle in z-plane and the right half of s-plane is
mapped into exterior of unit circle in z-plane. The Bilinear mapping is a one-to-one mapping
and it is accomplished when
21) How the order of the filter affects the frequency response of Butterworth filter.
The magnitude response of butterworth filter is shown in figure, from which it can be
observed that the magnitude response approaches the ideal response as the order of the
filter is increased.
Chebyshev Type - 1
i. All pole design.
ii. The poles lie on a ellipse in s-plane.
iii. The magnitude response is equiripple
in passband and monotonically
decreasing in the stopband.
iv. The normalized magnitude response
2
has a value of 1 / (1+ ) at the cutoff
frequency c.
v. A large number of parameters has to
be calculated to determine the transfer
function.
IIR filter
These filters do not have linear phase.
IIR filters can be realized recursively.
Less flexibility,usually limited to
kind of filters.
The roundoff noise in IIR filters are
more.
36. What are the conditions to be satisfied for constant phase delay in linear phase
FIR filters?
The conditions for constant phase delay ARE
Phase delay, = (N-1)/2 (i.e., phase delay is constant)
Impulse response, h(n) = -h(N-1-n) (i.e., impulse response is antisymmetric)
37. How constant group delay & phase delay is achieved in linear phase FIR filters?
The following conditions have to be satisfied to achieve constant group delay &
phase delay.
Phase delay, = (N-1)/2 (i.e., phase delay is constant)
Group delay, = /2 (i.e., group delay is constant)
Impulse response, h(n) = -h(N-1-n) (i.e., impulse response is antisymmetric)
38. What are the possible types of impulse response for linear phase FIR filters?
There are four types of impulse response for linear phase FIR filters
Symmetric impulse response when N is odd.
Symmetric impulse response when N is even.
Antisymmetric impulse response when N is odd.
Antisymmetric impulse response when N is even.
39. List the well-known design techniques of linear phase FIR filters.
There are three well-known design techniques of linear phase FIR filters. They are
Fourier series method and window method
The width of the mainlobe should be small and it should contain as much of the total
energy as possible.
43. Write the procedure for designing FIR filter using frequency-sampling method.
Choose the desired (ideal) frequency response Hd(w).
Take N-samples of Hd(w) to generate the sequence
Take inverse DFT of Hd(w) to get the impulse response h(n).
The transfer function H(z) of the filter is obtained by taking z-transform of impulse
response.
44. What are the drawback in FIR filter design using windows and
frequency sampling method? How it is overcome?
The FIR filter design using windows and frequency sampling method does not have
Precise control over the critical frequencies such as wp and ws.This drawback can be
overcome by designing FIR filter using Chebyshev approximation technique.In this technique
an error function is used to approximate the ideal frequency response, in order to satisfy the
desired specifications.
45. Write the characteristic features of rectangular window.
The mainlobe width is equal to 4/N.
The maximum sidelobe magnitude is 13dB.
The sidelobe magnitude does not decrease significantly with increasing w.
46. List the features of FIR filter designed using rectangular window.
The width of the transition region is related to the width of the mainlobe of window
spectrum.
Gibbs oscillations are noticed in the passband and stopband.
The attenuation in the stopband is constant and cannot be varied.
47. Why Gibbs oscillations are developed in rectangular window and how it can
be eliminated or reduced?
The Gibbs oscillations in rectangular window are due to the sharp transitions from 1
to 0 at the edges of window sequence.
These oscillations can be eliminated or reduced by replacing the sharp transition by
gradual transition. This is the motivation for development of triangular and cosine
windows.
48. List the characteristics of FIR filters designed using windows.
The width of the transition band can be made narrow by increasing the value
of N where N is the length of the window sequence.
The attenuation in the stop band is fixed for a given window, except in case of
Kaiser window where it is variable.
Hanning Window
i)The width of mainlobe in window
spectrum is 8/N
ii) The maximum sidelobe magnitude in
window spectrum is 31dB.
iii) In window spectrum the sidelobe
magnitude decreases with increasing w.
iv) In FIR filter designed using hanning
window the minimum stopband
attenuation is 44dB.
Hamming Window
i)The width of mainlobe in window
spectrum is 8/N
ii) The maximum sidelobe magnitude in
window spectrum is 41dB.
iii) In window spectrum the sidelobe
magnitude remains constant.
iv) In FIR filter designed using
hamming window the minimum
stopband attenuation is 44dB.
The width of the mainlobe and the peak sidelobe are variable.
The parameter in the Kaiser Window function is an independent variable that can
be varied to control the sidelobe levels with respect to mainlobe peak.
The width of the mainlobe in the window spectrum can be varied by varying the length
N of the window sequence.
Kaiser Window
i) The width of mainlobe in window
spectrum depends on the values of &
N.
ii) The maximum sidelobe magnitude
with respect to peak of mainlobe is
variable using the parameter .
iii) In window spectrum the sidelobe
magnitude decreases with increasing w.
iv) In FIR filter designed using Kaiser
window the minimum stopband
attenuation is variable and depends on
the value of .
11.What are the instructions used for block transfer in C5X Processors?
The BLDD, BLDP and BLPD instructions use the BMAR to point at the source or
destination space of a block move. The MADD and MADS also use the BMAR to address
an operand in program memory for a multiply accumulator operation
12. Briefly explain about the dedicated register addressing modes.
The dedicated-registered addressing mode operates like the long immediate
addressing modes, except that the address comes from one of two special-purpose memorymapped registers in the CPU: the block move address register (BMAR) and the dynamic bit
manipulation register (DBMR).
The advantage of this addressing mode is that the address of the block of memory to
be acted upon can be changed during execution of the program.
13. Briefly explain about bit-reversed addressing mode?
In the bit-reversed addressing mode, INDX specifies one-half the size of the FFT. The
value contained in the current AR must be equal to 2n-1, where n is an integer, and the FFT
size is 2n. An auxiliary register points to the physical location of a data value. When we add
INDX t the current AR using bit reversed addressing, addresses are generated in a bitreversed fashion. Assume that the auxiliary registers are eight bits long, that AR2 represents
the base address of the data in memory (0110 00002), and that INDX contains the value
0000 10002.
14. Briefly explain about circular addressing mode.
Many algorithms such as convolution, correlation, and finite impulse response (FIR) filters
can use circular buffers in memory to implement a sliding window; which contains the
most recent data to be processed. The C5x supports two concurrent circular buffer
operating via the ARs. The following five memory-mapped registers control the circular
buffer operation.
1. CBSR1- Circular buffer 1 start register.
2. CBSR2- Circular buffer 2 start Register,
3. CBER1- Circular buffer 1 end register
4. CBER2- Circular buffer 2 end register
5. CBCR - Circular buffer control register.
15. Write the name of various part of C5X hardware.
1.
2.
3.
4.
5.
16. Write short notes about arithmetic logic unit and accumulator.
The 32-bit general-purpose ALU and ACC implement a wide range of arithmetic and
logical functions, the majority of which execute in a single clock cycle. Once an operation
is performed in the ALU, the result is transferred to the ACC, where additional operations,
such as shifting, can occur. Data that is input to the ALU can be scaled by the prescaler.
The following steps occur in the implementation of a typical ALU instruction:
1. Data is fetched from memory on the data bus,
2. Data is passed through the prescaler and the ALU, where the arithmetic is performed,
and
3. The result is moved into the ACC.
The ALU operates on 16-bit words taken from data memory or derived from immediate
instructions. In addition to the usual arithmetic instructions, the ALU can perform Boolean
operations, thereby facilitating the bit manipulation ability required of high-speed
controller. One input to the ALU is always supplied by the ACC. The other input can be
transferred from the PREG of the multiplier, the ACCB, or the output of the prescaler.
After the ALU has performed the arithmetic or logical operation, the result is stored in the
ACC.
17. Write short notes about parallel logic unit.
The parallel logic unit (PLU) can directly set, clear, test, or toggle multiple bits in
control/status register pr any data memory location. The PLU provides a direct logic
operation path to data memory values without affecting the contents of the ACC or the
PREG.
18. What is meant by auxiliary register file?
The auxiliary register file contains eight memory-mapped auxiliary registers (AR0-AR7),
which can be used for indirect addressing of the data memory or for temporary data storage.
Indirect auxiliary register addressing allows placement of the data memory address of an
instruction operand into one of the AR. The ARs are pointed to by a 3-bit auxiliary register
pointer (ARP) that is loaded with a value from 0-7, designating AR0-AR7, respectively.
19. Write short notes about circular registers in C5X.
The C5x devices support two concurrent circular buffers operating in conjunction with
user-specified auxiliary register. Two 16-bit circular buffer start registers (CBSR1 and
CBSR2) indicate the address where the circular buffer starts. Two 16-bit circular buffer end
registers (CBER1 and CBER2) indicate the address where the circular buffer ends. The 16bit circular buffer control register (CBCR) controls the operation of these circular buffers
and identifies the auxiliary registers to be used.