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Digital Logic Review

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Digital Logic Circuits

NUMBER SYSTEMS

Conversion
Binary to Hex: (10010110010.00101)2 = (010010110010.00101000)2 = (4B2.28)16

Hex to Binary: (AB9.F03)16 = (1010 1011 1001 . 1111 0000 0011)2

Binary to Octal: (100101010.0101)2 = (100101010.010100)2 = (452.24)8

Octal to Binary: (567.03)8 = (101 110 111 . 000 011)2

Complements
1's complement of 10102 is 01012 (bit by bit complement operation)

2's complement of 10102 = (1's complement of 10102 ) + 1 = 01102

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Digital Logic Circuits

SIGNED NUMBERS

Need to be able to represent both positive and negative numbers

- Following 3 representations

Signed magnitude representation


Signed 1's complement representation
Signed 2's complement representation

Example: Represent +9 and -9 in 7 bit-binary number

Only one way to represent +9 ==> 0 001001

Three different ways to represent -9:

In signed-magnitude: 1 001001 Complement only the sign bit


In signed-1's complement: 1 110110 Complement all the bits including sign bit
In signed-2's complement: 1 110111 Take the 2's complement of the number,
including its sign bit
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Digital Logic Circuits

ARITHMETIC ADDITION: SIGNED 2’s COMPLEMENT

Add the two numbers, including their sign bit, and discard any carry out of
leftmost (sign) bit - Look out for an overflow

Example
6 0 0110 -6 1 1010
+) 9 0 1001 +) 9 0 1001
15 0 1111 3 0 0011

6 0 0110 -9 1 0111
+) -9 1 0111 +) -9 1 0111
-3 1 1101 -18 0 1110

9 0 1001 overflow
+) 9 0 1001 2 operands have the same sign
18 1 0010 and the result sign changes
(cn-1⊕ cn = 1)

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Digital Logic Circuits

ARITHMETIC SUBTRACTION

Arithmetic Subtraction in 2’s complement

Take the complement of the subtrahend (including the sign bit)


and add it to the minuend including the sign bits.

(±A)-(-B) =(±A)+ B
(±A)- B=(±A)+( -B)

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Digital Logic Circuits

COMBINATIONAL LOGIC CIRCUITS


y y
Half Adder x y c s x
0 0 0 0 0 0 0 1 c
y
0 1 0 1 x 0 1 x 1 0
1 0 0 1 c = xy s = xy’ + x’y s
1 1 1 0 =x ⊕ y
Full Adder
y y
x y cn-1 cn s
0 0 0 0 0 0 0 0 1
0 0 1 0 1 0 1 c 1 0 c
n-1 n-1
0 1 0 0 1 x 1 1 x 0 1
0 1 1 1 0 0 1 1 0
1 0 0 0 1 cn s
1 0 1 1 0
1 1 0 1 0 cn = xy + xcn-1+ ycn-1
1 1 1 1 1 = xy + (x ⊕ y)cn-1
s = x’y’cn-1+x’yc’n-1+xy’c’n-1+xycn-1
= x ⊕ y ⊕ cn-1 = (x ⊕ y) ⊕ cn-1
x
y S
cn-1
cn

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Digital Logic Circuits

MULTIPLEXER

4-to-1 Multiplexer
Select Output
A B Y
0 0 C
0 1 D
1 0 1
1 1 C·D

C D0
D D1
1 D2 Out Y
C D3
D
A S1 4-to-1
B S0 MUX

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Digital Logic Circuits

DECODER

X Y Z Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0
0 0 0 0 0 0 0 0 0 0 1
0 0 1 0 0 0 0 0 0 1 0
0 1 0 0 0 0 0 0 1 0 0
0 1 1 0 0 0 0 1 0 0 0
1 0 0 0 0 0 1 0 0 0 0
1 0 1 0 0 1 0 0 0 0 0
1 1 0 0 1 0 0 0 0 0 0
1 1 1 1 0 0 0 0 0 0 0

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Digital Logic Circuits

ENCODER

I7 I6 I5 I4 I3 I2 I1 I0 A2 A1 A0

8-to-3 Encoder 0 0 0 0 0 0 0 1 0 0 0

0 0 0 0 0 0 1 0 0 0 1

0 0 0 0 0 1 0 0 0 1 0

0 0 0 0 1 0 0 0 0 1 1

0 0 0 1 0 0 0 0 1 0 0

0 0 1 0 0 0 0 0 1 0 1

0 1 0 0 0 0 0 0 1 1 0

1 0 0 0 0 0 0 0 1 1 1

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Digital Logic Circuits

PRIORITY ENCODER

I7 I6 I5 I4 I3 I2 I1 I0 A2 A1 A0 IDLE

0 0 0 0 0 0 0 0 X X X 1

0 0 0 0 0 0 0 1 0 0 0 0

0 0 0 0 0 0 1 X 0 0 1 0

0 0 0 0 0 1 X X 0 1 0 0

0 0 0 0 1 X X X 0 1 1 0

0 0 0 1 X X X X 1 0 0 0

0 0 1 X X X X X 1 0 1 0

0 1 X X X X X X 1 1 0 0

1 X X X X X X X 1 1 1 0

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Digital Logic Circuits

D FLIP-FLOP

• Characteristic Table
D Q(t+1) Operation S
0 0 Reset D Q

1 1 Set

• Characteristic Equation C Q
Q(t+1) = D R

• Excitation Table
Q(t) Q(t+1) D Operation
0 0 0 Reset
0 1 1 Set
1 0 0 Reset
1 1 1 Set

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Digital Logic Circuits

T FLIP-FLOP

• Characteristic Table
T Q(t+1) Operation
0 Q(t) No Change T Q
1 Q’(t) Complement

• Characteristic Equation
Q(t+1) = T ⊕ Q(t) C
• Excitation Table
Q(t) Q(t+1) T Operation
0 0 0 No Change
0 1 1 Complement
1 0 1 Complement
1 1 0 No Change

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Digital Logic Circuits

J-K FLIP-FLOP

• Characteristic Table
J K Q(t+1) Operation J Q
0 0 Q(t) No Change
0 1 0 Reset C
1 0 1 Set
K
1 1 Q’(t) Complement

• Characteristic Equation
Q(t+1) = J Q(t)’ + K’ Q(t)
• Excitation Table Q(t) Q(t+1) J K Operation
0 0 0 X No Change
0 1 1 X Set
1 0 X 1 Reset
1 1 X 0 No Change

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Digital Logic Circuits

FLIP-FLOP BEHAVIOR EXAMPLE

• Use the characteristic tables to find the output


waveforms for the flip-flops shown:

Clock

D ,T

D QD
C

T QT

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Digital Logic Circuits

FLIP-FLOP BEHAVIOR EXAMPLE (CONTINUED)

• Use the characteristic tables to find the output


waveform for the flip-flop shown:
Clock

J QJK
C
K

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Digital Logic Circuits

REGISTER

Select Output
Operation
Clear S1 S0 Q3 Q2 Q1 Q0
0 X X 0 0 0 0 Clear
1 0 0 Q3 Q2 Q1 Q0 No Change
1 0 1 RSI Q3 Q2 Q1 Shift Right
1 1 0 Q2 Q1 Q0 LSI Shift Left
1 1 1 I3 I2 I1 I0 Parallel Load
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Digital Logic Circuits

COUNTER

Clear Load Count Operation


0 X X Clear
1 0 0 No Change
1 0 1 Count
1 1 X Load

A mod-12 counter : => two alternatives

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