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    Common Source/Gate/Drain Amplifiers: Prof. Niknejad

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    peter
    This document summarizes Prof. Niknejad's EECS 105 lecture on common source, common gate, and common drain amplifiers. The lecture covered: 1) Load line analysis and small signal modeling of the common source amplifier. Maximizing gain by increasing transconductance or load resistance was discussed. 2) Using a current source supply to make load resistance independent of voltage for the common source amplifier. 3) Analyzing the common gate amplifier as a current amplifier with near-zero input resistance and output resistance equal to the transistor's output resistance. 4) Demonstrating the common drain amplifier has a voltage gain near one, high input impedance, and low output impedance making it a voltage buffer

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    Common Source/Gate/Drain Amplifiers: Prof. Niknejad

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    peter
    59 views28 pages
    This document summarizes Prof. Niknejad's EECS 105 lecture on common source, common gate, and common drain amplifiers. The lecture covered: 1) Load line analysis and small signal modeling of the common source amplifier. Maximizing gain by increasing transconductance or load resistance was discussed. 2) Using a current source supply to make load resistance independent of voltage for the common source amplifier. 3) Analyzing the common gate amplifier as a current amplifier with near-zero input resistance and output resistance equal to the transistor's output resistance. 4) Demonstrating the common drain amplifier has a voltage gain near one, high input impedance, and low output impedance making it a voltage buffer

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    Lecture 17-electronics

    Original Title

    Lecture 17-electronics

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    This document summarizes Prof. Niknejad's EECS 105 lecture on common source, common gate, and common drain amplifiers. The lecture covered: 1) Load line analysis and small signal modeling of the common source amplifier. Maximizing gain by increasing transconductance or load resistance was discussed. 2) Using a current source supply to make load resistance independent of voltage for the common source amplifier. 3) Analyzing the common gate amplifier as a current amplifier with near-zero input resistance and output resistance equal to the transistor's output resistance. 4) Demonstrating the common drain amplifier has a voltage gain near one, high input impedance, and low output impedance making it a voltage buffer

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    59 views28 pages

    Common Source/Gate/Drain Amplifiers: Prof. Niknejad

    Uploaded by

    peter
    This document summarizes Prof. Niknejad's EECS 105 lecture on common source, common gate, and common drain amplifiers. The lecture covered: 1) Load line analysis and small signal modeling of the common source amplifier. Maximizing gain by increasing transconductance or load resistance was discussed. 2) Using a current source supply to make load resistance independent of voltage for the common source amplifier. 3) Analyzing the common gate amplifier as a current amplifier with near-zero input resistance and output resistance equal to the transistor's output resistance. 4) Demonstrating the common drain amplifier has a voltage gain near one, high input impedance, and low output impedance making it a voltage buffer

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 28

    EECS 105 Fall 2003, Lecture 17

    Lecture 17:
    Common Source/Gate/Drain
    Amplifiers

    Prof. Niknejad

    Department of EECS

    University of California, Berkeley

    EECS 105 Fall 2003, Lecture 17

    Prof. A. Niknejad

    Lecture Outline

    
    
    
    

    Department of EECS

    MOS Common Source Amp


    Current Source Active Load
    Common Gate Amp
    Common Drain Amp

    University of California, Berkeley

    EECS 105 Fall 2003, Lecture 17

    Prof. A. Niknejad

    Common-Source Amplifier

    Isolate DC level

    Department of EECS

    University of California, Berkeley

    EECS 105 Fall 2003, Lecture 17

    Prof. A. Niknejad

    Load-Line Analysis to find Q


    I RD =

    VDD Vout
    RD

    Q
    slope =

    5V
    ID =
    10k

    1
    10k

    0V
    ID =
    10k
    Department of EECS

    University of California, Berkeley

    EECS 105 Fall 2003, Lecture 17

    Prof. A. Niknejad

    Small-Signal Analysis

    Rin =

    Department of EECS

    University of California, Berkeley

    EECS 105 Fall 2003, Lecture 17

    Prof. A. Niknejad

    Two-Port Parameters:
    Generic Transconductance Amp
    Rs
    +
    vs

    vin

    Rin

    Gmvin

    Rout

    RL

    Find Rin, Rout, Gm

    Rin =

    Gm = g m Rout = ro || RD
    Department of EECS

    University of California, Berkeley

    EECS 105 Fall 2003, Lecture 17

    Prof. A. Niknejad

    Two-Port CS Model
    Reattach source and load one-ports:

    Department of EECS

    University of California, Berkeley

    EECS 105 Fall 2003, Lecture 17

    Prof. A. Niknejad

    Maximize Gain of CS Amp


    Av = g m RD || ro
    
    
    

    Increase the gm (more current)


    Increase RD (free? Dont need to dissipate extra
    power)
    Limit: Must keep the device in saturation

    VDS = VDD I D RD > VDS , sat


    
    

    For a fixed current, the load resistor can only be


    chosen so large
    To have good swing wed also like to avoid getting
    to close to saturation

    Department of EECS

    University of California, Berkeley

    EECS 105 Fall 2003, Lecture 17

    Prof. A. Niknejad

    Current Source Supply

    
    

    Department of EECS

    Solution: Use a
    current source!
    Current independent
    of voltage for ideal
    source
    University of California, Berkeley

    EECS 105 Fall 2003, Lecture 17

    Prof. A. Niknejad

    CS Amp with Current Source Supply

    Department of EECS

    University of California, Berkeley

    EECS 105 Fall 2003, Lecture 17

    Prof. A. Niknejad

    Load Line for DC Biasing

    Both the I-source and the transistor are idealized for DC bias
    analysis
    Department of EECS

    University of California, Berkeley

    EECS 105 Fall 2003, Lecture 17

    Prof. A. Niknejad

    Two-Port Parameters
    From current
    source supply

    Rin =
    Gm = g m
    Rout = ro || roc
    Department of EECS

    University of California, Berkeley

    EECS 105 Fall 2003, Lecture 17

    Prof. A. Niknejad

    P-Channel CS Amplifier

    DC bias: VSG = VDD VBIAS sets drain current IDp = ISUP


    Department of EECS

    University of California, Berkeley

    EECS 105 Fall 2003, Lecture 17

    Prof. A. Niknejad

    Two-Port Model Parameters


    Small-signal model for PMOS and for rest of circuit

    Department of EECS

    University of California, Berkeley

    EECS 105 Fall 2003, Lecture 17

    Prof. A. Niknejad

    Common Gate Amplifier

    DC bias:

    I SUP = I BIAS = I DS

    Department of EECS

    University of California, Berkeley

    EECS 105 Fall 2003, Lecture 17

    Prof. A. Niknejad

    CG as a Current Amplifier: Find Ai

    iout = id = it
    Ai = 1
    Department of EECS

    University of California, Berkeley

    EECS 105 Fall 2003, Lecture 17

    Prof. A. Niknejad

    CG Input Resistance

    vgs = vt

    At input:

    it = g m vgs + g mb vt

    vt
    +

    vout
    ro

    Output voltage: v = i (r || R ) = i (r || R )
    out
    d oc
    L
    t oc
    L
    it = g m vt + g mb vt
    Department of EECS

    vt
    +

    ( roc || RL ) it
    ro

    University of California, Berkeley

    EECS 105 Fall 2003, Lecture 17

    Prof. A. Niknejad

    Approximations
    

    We have this messy result


    1
    g m + g mb +
    it
    ro
    1
    = =
    roc || RL
    Rin vt
    1+
    ro

    But we dont need that much precision. Lets start


    approximating:
    g m + g mb >>

    1
    ro

    roc || RL RL
    Rin =

    Department of EECS

    RL
    0
    ro

    1
    g m + g mb
    University of California, Berkeley

    EECS 105 Fall 2003, Lecture 17

    Prof. A. Niknejad

    CG Output Resistance

    vs
    vs vt
    g m vgs ( g mb vs ) +
    =0
    RS
    ro

    1
    1 vt
    vs
    + g m + g mb + =
    ro ro
    RS
    Department of EECS

    University of California, Berkeley

    EECS 105 Fall 2003, Lecture 17

    Prof. A. Niknejad

    CG Output Resistance
    Substituting vs = itRS
    it RS

    1
    1 vt
    + g m + g mb + =
    RS
    ro ro

    The output resistance is (vt / it)|| roc


    Rout = roc

    Department of EECS

    || RS

    ro
    + g m ro + g mb ro + 1

    RS

    University of California, Berkeley

    EECS 105 Fall 2003, Lecture 17

    Prof. A. Niknejad

    Approximating the CG Rout


    Rout = roc || [ro + g m ro RS + g mb ro RS + RS ]
    The exact result is complicated, so lets try to
    make it simpler:
    g m 500S

    g mb 50S

    ro 200k

    Rout roc || [ro + g m ro RS + RS ]


    Assuming the source resistance is less than ro,

    Rout roc || [ro + g m ro RS ] = roc || [ro (1 + g m RS )]


    Department of EECS

    University of California, Berkeley

    EECS 105 Fall 2003, Lecture 17

    Prof. A. Niknejad

    CG Two-Port Model

    Function: a current buffer


    Low Input Impedance
    High Output Impedance
    Department of EECS

    University of California, Berkeley

    EECS 105 Fall 2003, Lecture 17

    Prof. A. Niknejad

    Common-Drain Amplifier
    I DS

    VGS = VT +

    Department of EECS

    W 1
    = Cox
    (VGS VT ) 2
    L 2

    2 I DS
    W
    Cox
    L

    Weak IDS dependence


    University of California, Berkeley

    EECS 105 Fall 2003, Lecture 17

    Prof. A. Niknejad

    CD Voltage Gain

    Note vgs = vt vout

    vout
    = g m vgs g mb vout
    roc || ro

    vout
    = g m ( vt vout ) g mb vout
    roc || ro
    Department of EECS

    University of California, Berkeley

    EECS 105 Fall 2003, Lecture 17

    Prof. A. Niknejad

    CD Voltage Gain (Cont.)


    vout
    = g m ( vt vout ) g mb vout
    roc || ro

    KCL at source node:

    roc || ro

    + g mb +

    g m vout

    = g m vt

    Voltage gain (for vSB not zero):


    vout
    =
    vin

    gm
    1
    + g mb + g m
    roc || ro

    vout
    gm

    1
    vin
    g mb + g m
    Department of EECS

    University of California, Berkeley

    EECS 105 Fall 2003, Lecture 17

    Prof. A. Niknejad

    CD Output Resistance

    Sum currents at output (source) node:


    Rout

    Department of EECS

    vt
    = ro || roc ||
    it
    Rout

    it = g m vt + g mb vt

    1
    g m + g mb
    University of California, Berkeley

    EECS 105 Fall 2003, Lecture 17

    Prof. A. Niknejad

    CD Output Resistance (Cont.)


    ro || roc is much larger than the inverses of the
    transconductances  ignore
    Rout

    1
    g m + g mb

    Function: a voltage buffer


    High Input Impedance
    Low Output Impedance
    Department of EECS

    University of California, Berkeley

    EECS 105 Fall 2003, Lecture 17

    Department of EECS

    Prof. A. Niknejad

    University of California, Berkeley

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