ELECTRONIC DEVICES CIRCUITS (EDC)

LABORATORY MANUAL

FOR II / IV B.E (ECE) : I - SEMESTER

DEPT. OF ELECTRONICS AND COMMUNICATION

ENGINEERING

SIR C.R.REDDY COLLEGE OF ENGINEERING

ELURU 534 007
 ELECTRONIC DEVICES CIRCUITS (EDC) - LAB

FOR II / IV B.E (ECE), I - SEMESTER

LIST OF EXPERIMENTS

1. CHARACTERISTICS OF PN JUNCTION DIODE

2. CHARACTERISTICS OF ZENER DIODE

3. HALF-WAVE & FULL-WAVE RECTIFIERS

4. BRIDGE RECTIFIER

5. CB TRANSISTOR CHARACTERISTICS

6. CE TRANSISTOR CHARACTERISTICS

7. DESIGN SELF BIAS CIRCUIT

8. CE TRANSISTOR AMPLIFIER

9. JFET DRAIN & TRANSFER CHARACTERISTICS (CS)

10. JFET AMPLIFIER (COMMON SOURCE)

11. TRANSISTOR AS A SWITCH

12. CHARACTERISTICS OF UJT

13. CC TRANSISTOR AMPLIFIER

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 CHARACTERISTICS OF PN JUNCTION DIODE

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
CIRCUIT DIAGRAMS:

MODEL GRAPH:

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 CHARACTERISTICS OF PN JUNCTION DIODE

AIM: 1. To Plot the Volt Ampere Characteristics of PN Junction Diode under

Forward and Reverse Bias Conditions.
2. To find the Cut-in voltage, Static Resistance, Dynamic Resistance for Forward Bias
& Reverse Bias

APPARATUS:

S.No Name Range / Value Quantity

1 DC Regulated Power Supply 0 30 volts 1

2 Diode 1N 4001 1
3 Diode OA 82 1
4 Resistor 1K 1
5 D.C Ammeters 0100mA, 0500A Each 1
6 D.C Volt meters 02V, 020V Each 1
7 Bread Board and connecting wires - 1 Set

PROCEDURE:
FORWARD BIAS CHARACTERISTICS:

1. Connect the Circuit as per the Circuit Diagram on the bread board.
2. Switch on the Regulated Power Supply and slowly increase the source voltage.
Increase the Diode Current in steps of 2mA and note down the corresponding
voltage across the PN junction Diode under forward Bias condition as per table
given below.
3. Take the readings until a Diode Current of 30mA.
4. Repeat the same by using Ge Diode instead of Si Diode.
5. Plot the graph VF versus IF on the graph Sheet in the 1st quadrant as in Fig.
6. From the graph find out the Static & Dynamic forward Bias resistance of the
diode
V VF
R = F, rac = .
IF I F
7. Observe and note down the cut in Voltage of the diode.

REVERSE BIAS CHARACTERISTICS:

1. Connect the Circuit as per the Circuit Diagram on the bread board.
2. Switch on the Regulated Power Supply and slowly increase the source voltage.
Increase the Diode voltage in steps of 2.0 volts and note down the corresponding
Current against the Voltage under Reverse Bias condition as per table given
below.
3. Take readings until a Diode Voltage reaches 30.0V.
4. Repeat the same by using Ge Diode instead of Si Diode.
5. Plot the graph VR versus IR on the graph Sheet in the 3rd quadrant as in Fig.
6. From the graph find out the Dynamic Reverse Bias resistance of the diode.
V VR
R = R, r ac = .
IR I R
7. Observe and note down the break down Voltage of the diode.

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
TABULAR FORMS:
FORWARD BIAS: REVERSE BIAS:
Voltmeter Reading Ammeter Reading Voltmeter Reading Ammeter Reading
S.No
VF(Volts) IF (mA) VR (Volts) IR (A)
1 0.0 0
2 0.2 2
3 0.6 4
4 2 6
5 4 8
6 6 10
7 8 12
8 10 14
9 14 16
10 18 18
11 20 20

RESULT :
The V-I Characteristics of the PN Junction Diode are plotted for the both Forward and
Reverse Bias conditions and Calculated the Cut in Voltage, Dynamic Forward and Reverse
Bias resistance.

Specifications Si Ge
Cut in Voltage
F. Bias
Static Resistance
R. Bias
F. Bias
Dynamic Resistance
R. Bias

PRECAUTIONS:
1. Check the wires for continuity before use.
2. Keep the power supply at Zero volts before Start.
3. All the contacts must be intact.

VIVA QUESTIONS:

1. Draw the circuit symbol of the Diode?

2.. What are the materials used for Anode and Cathode?
3. Draw ideal Diode Volt Ampere Characteristics?
4. What is Cut in Voltage?
5. What are Static and Dynamic Resistances?
6. Explain the working of a Diode as a switch
7. What is space charge?
8. What is Diffusion Capacitance?
9. What are Minority and Majority carriers in P type and in N type materials?
10. What are the specifications of a Diode?
11. What is PIV?
12. Why leakage current is more for Ge Diode?
13. What is work function?
14. What is the current equation of the Diode?
***

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 CHARACTERISTICS OF ZENER DIODE

CIRCUIT DIAGRAMS:

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
VOLTAGE REGULATION:

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 CHARACTERISTICS OF ZENER DIODE & LOAD REGULATION
AIM: i) To Obtain the Forward Bias and Reverse Bias characteristics of a Zener diode.
ii) Find out the Zener Break down Voltage from the Characteristics.
iii) To Obtain the Load Regulation Characteristics.

APPARATUS:
S.No Name Range / Value Quantity
1 DC Regulated Power Supply 0 30 volts 1
2 Diode ECZ 5.1 1
3 Resistor 1K, 560 Each 1
4 D.C Ammeters 0200mA 1
5 D.C Volt meters 02V, 020V Each 1
6 Decade Resistance Box - 1
7 Bread Board and connecting wires - 1 Set

PROCEDURE:
FORWARD BIAS CHARACTERISTICS:
1. Connect the Circuit as per the Circuit Diagram on the bread board.
2. Switch on the Regulated Power Supply and slowly increase the source voltage.
Increase the Diode Current in steps of 2mA and note down the corresponding
voltage across the Zener Diode under forward Bias condition as per table given
below.
3. Take the readings until a Diode Current of 20mA.
4. Plot the graph VF versus IF on the graph Sheet in the 1st quadrant as in Fig.
5. From the graph find out the Static & Dynamic forward Bias resistance of the
diode
V VF
R = F, rac = .
IF I F
REVERSE BIAS CHARACTERISTICS:
1. Connect the Circuit as per the Circuit Diagram on the bread board.
2. Switch on the Regulated Power Supply and slowly increase the source voltage.
Increase the Diode Current in steps of 2mA and note down the corresponding
voltage across the Zener Diode under Reverse Bias condition as per table given
below.
3. Take the readings until a Diode Current of 20mA.
4. Plot the graph VR versus IR on the graph Sheet in the 3rd quadrant as in Fig.
5. From the graph find out the Dynamic Reverse Bias resistance of the diode.
V VR
R = R, r ac = .
IR I R
7. Observe and note down the break down Voltage of the diode.

LOAD REGULATION CHARACTERISTICS:

1. Connect the Circuit as per the Circuit Diagram on the bread board.
2. By changing the load Resistance, kept constant I/P Voltage at 5V, 10 V, 15 V as
per table given below. Take the readings of O/P Voltmeter (Vo=Vz).
3. Now by changing the I/P Voltage, kept constant load Resistance at 1K, 2K, 3K as
per table given below. Take the readings of O/P Voltmeter (Vo=Vz).

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
TABULAR FORMS:

FORWARD BIAS: REVERSE BIAS:

Voltmeter Reading Ammeter Reading Voltmeter Reading Ammeter Reading

S.No
VF(Volts) IF (mA) VR (Volts) IR (mA)
1 0.0 0.0
2 0.2 0.2
3 0.4 0.4
4 0.6 0.6
5 0.8 0.8
6 2 2
7 4 4
8 6 6
9 8 8
10 10 10
11 12 12
12 16 16
13 18 18
14 20 20

LOAD REGULATION:

Vi1= 5V Vi2= 10V Vi3=15V RL1=1K RL2=2K RL3=3K

S.No RL () Vi (V)
VO (V) VO (V) VO (V) VO (V) VO (V) VO (V)
1 100 0
2 300 1
3 500 3
4 700 5
5 900 7
6 1K 9
7 3K 11
8 5K 13
9 7K 15
10 10K 20

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
ZENER BREAKDOWN VOLTAGE:
Draw a tangent on the reverse Bias Characteristic of the Zener Diode starting from the
Knee and touching most of the points of the curve. The point where the tangent intersects the
X-axis is the Zener Breakdown Voltage.

RESULT:
The Characteristics of the Forward and Reverse biased Zener Diode and the Zener
Break Down Voltage from the Characteristics are Observed.
Zener Breakdown Voltage = Volts.
Forward Bias Resistance = Ohms
Reverse Bias Resistance = Ohms

PRECAUTIONS:
1. Check the wires for continuity before use.
2. Keep the power supply at Zero volts before Start
3. All the contacts must be intact

VIVA QUESTIONS:
1. Draw the circuit symbol of the Zener Diode
2. What is meant by Zener break down?
3. What are the different types of break downs?
4. What is the difference between Avalanche Zener break down?
5. In a lightly doped and heavily doped diode which type of break down occurs?
6. Why Zener break down and Avalanche BD voltage increase with temperature?
7. What are the applications of Zener diode?
8. Explain operation of Zener diode as Voltage Regulator?
9. What is the difference between normal PN Jn diode and Zener diode?
10 What is a Regulation?

***

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
MODEL GRAPHS:

ZENER DIODE CHARACTERISTICS:

LOAD REGULATION CHARACTERISTICS:

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 HALF-WAVE RECTIFIERS

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
CIRCUIT DIAGRAMS:

WITHOUT CAPACITOR FILTER AND WITH CAPACITOR FILTER:

WAVE SHAPES:

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 HALF-WAVE RECTIFIER
AIM: To Rectify the AC signal and then to find out Ripple factor and percentage of
Regulation in Half wave rectifier with and without Capacitor filter.

APPARATUS:

S.No Name Range / Value Quantity

1 Transformer 230V / 0 - 9V 1
2 Diode 1N4001 1
3 Capacitors 1000F/16V, 470f/25V 1
4 Decade Resistance Box - 1
5 Multimeter - 1
6 Bread Board and connecting wires - 1 Set
7 Dual Trace CRO 20MHz 1

PROCEDURE:

WITHOUT FILTER:

1. Connecting the circuit on bread board as per the circuit diagram

2. Connect the primary of the transformer to main supply i.e. 230V, 50Hz
3. Connect the decade resistance box and set the RL value to 100
4. Connect the Multimeter at output terminals and vary the load resistance (DRB)
from 100 to 1K and note down the Vac and Vdc as per given tabular form
5. Disconnect load resistance ( DRB) and note down no load voltage Vdc (V no load)
6. Connect load resistance at 1K and connect Channel II of CRO at output
terminals and CH I of CRO at Secondary Input terminals observe and note down
the Input and Output Wave form on Graph Sheet.
V
7. Calculate ripple factor ac
Vdc
V V
8. Calculate Percentage of Regulation, % no load full load 100%
Vno load

WITH CAPACITOR FILTER:

1. Connecting the circuit as per the circuit Diagram and repeat the above procedure
from steps 2 to 8.

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
TABULAR FORMS:

WITHOUT FILTER:
V no load Voltage (Vdc) = V
S.No Load Resistance O/P Voltage (Vo) Ripple factor % of Regulation
Vac VNL VFL
RL ()
V
100%
Vac (V) Vdc (V) Vdc NL
1 100
2 200
3 300
4 400
5 500
6 600
7 700
8 800
9 900
10 1K

WITH CAPACITOR FILTER:

V no load Voltage (Vdc) = V
S.No Load Resistance O/P Voltage (Vo) Ripple factor % of Regulation
Vac VNL VFL
100%
RL () Vac (V) Vdc (V) Vdc V NL
1 100
2 200
3 300
4 400
5 500
6 600
7 700
8 800
9 900
10 1K

MODEL GRAPHS:

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
RESULT: Observe Input and Output Wave forms and Calculate ripple factor and
percentage of regulation in Half wave rectifier with and without filter.

Without Filter:
Ripple Factor :
Regulation :

With Capacitor Filter:

Ripple Factor :
Regulation :

PRECAUTIONS:
1. Check the wires for continuity before use.
2. Keep the power supply at Zero volts before Start.
3. All the contacts must be intact.

VIVA QUESTIONS:
1. What is a rectifier?
2. How Diode acts as a rectifier?
3. What is the significance of PIV? What is the condition imposed on PIV?
4. Draw the o/p wave form without filter?
5. Draw the o/p wave form with filter?
6. What is meant by ripple factor? For a good filter whether ripple factor should be
high or low?
7. What is meant by regulation?
6. What is meant by time constant?
8. What happens to the o/p wave form if we increase the capacitor value?
9. What happens if we increase the capacitor value?

***

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 FULL-WAVE RECTIFIERS

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
CIRCUIT DIAGRAMS:
WITHOUT FILTER AND WITH FILTER:

WAVE SHAPES:

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 FULL-WAVE RECTIFIERS
AIM: To Rectify the AC signal and then to find out Ripple factor and percentage of
Regulation in Full-wave rectifier center tapped circuit with and without Capacitor
filter.

APPARATUS:

S.No Name Range / Value Quantity

1 Transformer 230V / 9-0-9V 1
2 Diode 1N4001 2
3 Capacitors 1000F/16V, 470f/25V 1
4 Decade Resistance Box - 1
5 Multimeter - 1
6 Bread Board and connecting wires - 1
7 Dual Trace CRO 20MHz 1

PROCEDURE:

WITHOUT FILTER:

1. Connecting the circuit on bread board as per the circuit diagram.

2. Connect the primary of the transformer to main supply i.e. 230V, 50Hz
3. Connect the decade resistance box and set the RL value to 100
4. Connect the Multimeter at output terminals and vary the load resistance (DRB)
from 100 to 1K and note down the Vac and Vdc as per given tabular form
5. Disconnect load resistance ( DRB) and note down no load voltage Vdc (V no load)
6. Connect load resistance at 1K and connect Channel II of CRO at output
terminals and CH I of CRO at Secondary Input terminals observe and note down
the Input and Output Wave form on Graph Sheet.
V
7. Calculate ripple factor ac
Vdc
V V
8. Calculate Percentage of Regulation, % no load full load 100%
Vno load

WITH CAPACITOR FILTER:

1. Connecting the circuit as per the circuit Diagram and repeat the above procedure
from steps 2 to 8.

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
TABULAR FORMS:

WITHOUT FILTER:
V no load Voltage (Vdc) = V
S.No Load Resistance O/P Voltage (Vo) Ripple factor % of Regulation
Vac VNL VFL
RL () 100%
Vac (V) Vdc (V) Vdc VNL
1 100
2 200
3 300
4 400
5 500
6 600
7 700
8 800
9 900
10 1K

WITH CAPACITOR FILTER:

V no load Voltage (Vdc) = V
S.No Load Resistance O/P Voltage (Vo) Ripple factor % of Regulation
Vac VNL VFL
100%
RL () Vac (V) Vdc (V) Vdc V NL
1 100
2 200
3 300
4 400
5 500
6 600
7 700
8 800
9 900
10 1K

MODEL GRAPHS:

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
RESULT: Observe Input and Output Wave forms and Calculate ripple factor and
percentage of regulation in Full-wave rectifier with and without filter.

Without Filter:
Ripple Factor :
Regulation :

With Capacitor Filter:

Ripple Factor :
Regulation :

PRECAUTIONS:

1. Check the wires for continuity before use.

2. Keep the power supply at Zero volts before Start.
3. All the contacts must be intact.

VIVA QUESTIONS:

1. What is a full wave rectifier?

2. How Diode acts as a rectifier?
3. What is the significance of PIV requirement of Diode in full-wave rectifier?
4. Compare capacitor filter with an inductor filter?
5. Draw the o/p wave form without filter? Draw the O/P? What is wave form with
filter?
6. What is meant by ripple factor? For a good filter whether ripple factor should be
high or low? What happens to the ripple factor if we insert the filter?
7. What is meant by regulation? Why regulation is poor in the case of inductor filter?
8. What is meant by time constant?
9. What happens to the o/p wave form if we increase the capacitor value? What
happens if we increase the capacitor value?
10. What is the theoretical maximum value of ripple factor for a full wave rectifier?

***

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 BRIDGE RECTIFIER

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
CIRCUIT DIAGRAMS:
WITH OUT FILTER & WITH FILTER:

WAVE SHAPES:

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 BRIDGE RECTIFIERS
AIM: To Rectify the AC signal and then to find out Ripple factor and percentage of
Regulation in Full-wave Bridge rectifier circuit with and without Capacitor filter.

APPARATUS:

S.No Name Range / Value Quantity

1 Transformer 230V / 0-9V 1
2 Diode 1N4001 4
3 Capacitors 1000F/16V, 470f/25V 1
4 Decade Resistance Box - 1
5 Multimeter - 1
6 Bread Board and connecting wires - 1
7 Dual Trace CRO 20MHz 1

PROCEDURE:

WITHOUT FILTER:

1. Connecting the circuit on bread board as per the circuit diagram.

2. Connect the primary of the transformer to main supply i.e. 230V, 50Hz
3. Connect the decade resistance box and set the RL value to 100
4. Connect the Multimeter at output terminals and vary the load resistance (DRB)
from 100 to 1K and note down the Vac and Vdc as per given tabular form
5. Disconnect load resistance ( DRB) and note down no load voltage Vdc (V no load)
6. Connect load resistance at 1K and connect Channel II of CRO at output
terminals and CH I of CRO at Secondary Input terminals observe and note down
the Input and Output Wave form on Graph Sheet.
V
7. Calculate ripple factor ac
Vdc
V V
8. Calculate Percentage of Regulation, % no load full load 100%
Vno load

WITH CAPACITOR FILTER:

1. Connecting the circuit as per the circuit Diagram and repeat the above procedure
from steps 2 to 8.

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
TABULAR FORMS:

WITHOUT FILTER:
V no load Voltage (Vdc) = V
S.No Load Resistance O/P Voltage (Vo) Ripple factor % of Regulation
Vac VNL VFL
RL () 100%
Vac (V) Vdc (V) Vdc VNL
1 100
2 200
3 300
4 400
5 500
6 600
7 700
8 800
9 900
10 1K

WITH CAPACITOR FILTER:

V no load Voltage (Vdc) = V
S.No Load Resistance O/P Voltage (Vo) Ripple factor % of Regulation
Vac VNL VFL
100%
RL () Vac (V) Vdc (V) Vdc V NL
1 100
2 200
3 300
4 400
5 500
6 600
7 700
8 800
9 900
10 1K

MODEL GRAPHS:

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
RESULT: Observe Input and Output Wave forms and Calculate ripple factor and
percentage of regulation in Full-wave Bridge rectifier with and without filter.

Without Filter:
Ripple Factor :
Regulation :

With Capacitor Filter:

Ripple Factor :
Regulation :

PRECAUTIONS:
1. Check the wires for continuity before use.
2. Keep the power supply at Zero volts before Start.
3. All the contacts must be intact.

VIVA QUESTIONS:
1. What are the advantages of Bridge Rectifier over the center tapped Rectifier?
2. What does Regulation indicate?
3. What is the Theoretical maximum value of Ripple factor of a Full-wave
Rectifier?
4. What is the PIV requirement of a Diode in a Bridge Rectifier?
5. Explain the operation of Bridge Rectifier?

***

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 CB TRANSISTOR CHARACTERISTICS

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
CIRCUIT DIAGRAMS:

MODEL GRAPHS;

1. Plot the Input characteristics by taking IE on yaxis and VEB on xaxis.

2. Plot the Output characteristics by taking IC on yaxis and VCB on xaxis.

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 COMMON BASE TRANSISTOR CHARACTERISTICS
AIM: To plot the Input and Output characteristics of a transistor connected in Common
Base Configuration and to find the h parameters from the characteristics.

APPARATUS:

S.No Name Range / Value Quantity

1 Dual Regulated D.C Power supply 030 Volts 1
2 Transistor BC107 1
3 Resistors 1K 1
4 DC Ammeters (0-200mA) 2
5 DC Voltmeters (0-2V), (0-20V) Each 1 No
6 Bread Board and connecting wires - 1 Set

PROCEDURE:

TO FIND THE INPUT CHARACTERISTICS:

1. Connect the circuit as in the circuit diagram.

2. Keep VEE and VCC in zero volts before giving the supply
3. Set VCB = 1 volt by varying VCC. and vary the VEE smoothly with fine control
such that emitter current IE varies in steps of 0.2mA from zero upto 20mA, and
note down the corresponding voltage VEB for each step in the tabular form.
4. Repeat the experiment for VCB =2 volts and 3 volts.
5. Draw a graph between VEB Vs IE against VCB = Constant.

TO FIND THE OUTPUT CHARACTERISTICS:

1 Start VEE and VCC from zero Volts.

2 Set the IE = 1mA by using VEE such that, VCB changes in steps of 1.0 volts from
zero upto 20 volts, note down the corresponding collector current IC for each step
in the tabular form.
3 Repeat the experiment for IE = 3mA and IE = 5mA, tabulate the readings.
4 Draw a graph between VCB Vs IC against IE = Constant.

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
TABULAR FORMS:

INPUT CHARACTERISTICS;

VCB = 0V VCB = 1V VCB = 2V

S.No
VEB (V) IE (mA) VEB (V) IE (mA) VEB (V) IE (mA)
1 0.0 0.0 0.0
2 0.2 0.2 0.2
3 0.4 0.4 0.4
4 0.6 0.6 0.6
5 0.8 0.8 0.8
6 1.0 1.0 1.0
7 4.0 4.0 4.0
8 8.0 8.0 8.0
9 10.0 10.0 10.0
10 14.0 14.0 14.0
11 18.0 18.0 18.0
12 20.0 20.0 20.0

OUTPUT CHARACTERISTICS;

IE = 1 mA IE = 3 mA IE = 5 mA
S.No
VCB (V) IC (mA) VCB (V) IC (mA) VCB (V) IC (mA)
1 0.0 0.0 0.0
2 0.2 0.2 0.2
3 0.4 0.4 0.4
4 0.6 0.6 0.6
5 0.8 0.8 0.8
6 1.0 1.0 1.0
7 3.0 3.0 3.0
8 5.0 5.0 5.0
9 7.0 7.0 7.0
10 10.0 10.0 10.0
11 12.0 12.0 12.0
12 15.0 15.0 15.0

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
To find the h parameters:

Calculation of hib:

Mark two points on the Input characteristics for constant VCB. Let the coordinates of
these two points be (VEB1, IE1) and (VEB2, IE2).

VEB2 - VEB1
hib = ---------------- ;
IE2 - IE1
Calculation of hrb:
Draw a horizontal line at some constant IE value on the input characteristics. Find
VCB2, VCB1, VEB2, VEB1
VEB2 - VEB1
hrb = -----------------;
VCB2 - VCB1

Calculation of hfb:
Draw a vertical line on the Output characteristics at some constant VCB value. Find
Ic2, Ic1 and IE2, IE1 .
IC2 - IC1
hfb = ------------ ;
IE2 - IE1

Calculation of hob:
On the Output characteristics for a constant value of IE mark two points with
coordinates (VCB2 , IC2) and (VCB1 , IC1) .

IC2 - IC1
hob = --------------- ;
VCB2 - VCB1

RESULTS:

The Input and Output characteristics are drawn on the graphs and the h parameters are
calculated .
hib= --------- ohms. hrb= -----------

hob= -------- mhos. hfb = -----------

***

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 CE TRANSISTOR CHARACTERISTICS

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
CIRCUIT DIAGRAMS:

MODEL GRAPHS:

1. Plot the Input characteristics by taking IB on y-axis and VBE on x-axis.

2. Plot the Output characteristics by taking IC on the y-axis and VCE on x-axis.

INPUT CHARACTERISTICS: OUTPUT CHARACTERISTICS:

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 COMMON EMITTER TRANSISTOR CHARACTERISTICS
AIM: To plot the Input and Output characteristics of a transistor connected in Common
Emitter Configuration and to find the h parameters from the characteristics.

APPARATUS:

S.No Name Range / Value Quantity

1 Dual Regulated D.C Power supply 030 Volts 1
2 Transistor BC107 1
3 Resistors 120K 1
4 DC Ammeters (0-500A), (0-200mA) Each 1 No
5 DC Voltmeters (0-2V), (0-20V) Each 1 No
6 Bread Board and connecting wires - 1 Set

PROCEDURE:

TO FIND THE INPUT CHARACTERISTICS:

1. Connect the circuit as in the circuit diagram.

2. Keep VBB and VCC in zero volts before giving the supply
3. Set VCE = 1 volt by varying VCC and vary the VBB smoothly with fine control such
that base current IB varies in steps of 5A from zero upto 200A, and note down
the corresponding voltage VBE for each step in the tabular form.
4. Repeat the experiment for VCE =2 volts and 3 volts.
5. Draw a graph between VBE Vs IB against VCE = Constant.

TO FIND THE OUTPUT CHARACTERISTICS:

1. Start VEE and VCC from zero Volts.

2. Set the IB = 20A by using VBB such that, VCE changes in steps of 0.2 volts from
zero upto 10 volts, note down the corresponding collector current IC for each step
in the tabular form.
3. Repeat the experiment for IE = 40A and IE = 60A, tabulate the readings.
4. Draw a graph between VCE Vs IC against IB = Constant.

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
TABULAR FORMS:

INPUT CHARACTERISTICS;

VCE = 0V VCE = 1V VCE = 2V

S.No
VBE (V) IB (A) VBE (V) IB (A) VBE (V) IB (A)
1 0 0 0
2 5 5 5
3 10 10 10
4 20 20 20
5 40 40 40
6 60 60 60
7 80 80 80
8 100 100 100
9 120 120 120
10 140 140 140
11 180 180 180
12 200 200 200

OUTPUT CHARACTERISTICS;

IB = 20 A IB = 40 A IB = 60 A
S.No
VCE (V) IC (mA) VCE (V) IC (mA) VCE (V) IC (mA)
1 0.0 0.0 0.0
2 0.2 0.2 0.2
3 0.4 0.4 0.4
4 0.6 0.6 0.6
5 0.8 0.8 0.8
6 1.0 1.0 1.0
7 3.0 3.0 3.0
8 5.0 5.0 5.0
9 7.0 7.0 7.0
10 10.0 10.0 10.0

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
To find the h parameters:

Calculation of hie:

Mark two points on the Input characteristics for constant VCE. Let the coordinates of
these two points be (VBE1, IB1) and (VBE2, IB2).

VBE2 - VBE1
hie = -------------- ;
IB2 - IB1
Calculation of hre:
Draw a horizontal line at some constant IB value on the Input characteristics. Find
VCE2, VCE1, VBE2, VBE1
VBE2 - VBE1
hrb = ---------------;
VCB2 - VCB1

Calculation of hfe:

Draw a vertical line on the out put characteristics at some constant VCE value. Find
Ic2, Ic1 and IB2, IB1 .
IC2 - IC1
hfe = ---------- ;
IB2 - IB1

Calculation of hoe:

On the Output characteristics for a constant value of IB mark two points with
coordinates (VCE2 , IC2) and (VCE1 , IC1) .

IC2 - IC1
hob = --------------- ;
VCE2 - VCE1

RESULTS:

The input and out put characteristics are drawn on the graphs and the h parameters are
calculated .
hie= --------- ohms. hre= -----------

hoe= -------- mhos. hfe = -----------

***

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 DESIGN SELF BIAS CIRCUIT

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
CIRCUIT DIAGRAMS:

DESIGN PROCEDURE:

Icq = 5mA, Vceq = 6.0 V, Vcc = 12.0 V, Rc = 1K, S = 25,Vbe=0.6 V.

Find hfe of the transistor
S= (1+) / (1+Re / (Re + Rb))
VB = VCCR2 / (R1 +R2)
RB = R1R2 / (R1+R2)
VB = IBRB+ VBE + (1+)IBRE
VCC = ICRC +VCE+(1+)IBRE
Using the above formula find Re, R1, R2.

TABULAR FORM:

Parameter Theoretical Values Practical ValuesName

IC
VCE
R1
R2
RE
RB

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 DESIGN SELF BIAS CIRCUIT
AIM: Design a Self Bias Circuit For the following Specifications
hfe = , Icq = 5mA, Vceq = 6.0 V, Vcc = 12.0 V, Rc = 1K, S = 25.

Find the quiescent point (Operating Point) values of ICq and VCEq from the
experiment and to find the maximum signal handling capability of the Amplifier.

APPARATUS:

S.No Name Range / Value Quantity

1 Dual Regulated D.C Power supply 030 Volts 1
2 Transistor BC107 1
3 Capacitors 50f 2
4 Capacitors 10f 1
5 Multimeter - 1
6 Signal Generator ( 0 1MHz) 1
7 Bread Board and connecting wires - 1 Set
8 Dual Trace CRO 20MHz 1

PROCEDURE:
1. Connect the circuit as per the circuit diagram. Apply Vcc of 12 Volts DC.
2. Find the resulting DC Values of Icq and Vceq.
3. Apply a 1KHz signal from the Signal Generator and observe the O/P on CRO.
4. Increase the I/P voltage slowly until the output waveform starts distortion
5. Note down the input voltage Vi at the point where the output starts distortion
6. This input value is known as maximum signal handling capability.
7. Calculate the gain of the amplifier.

RESULT:
The maximum signal Handling capability of the amplifier = Volts
Gain of the amplifier =

PRECAUTIONS:
1. Check the wires for continuity before use.
2. Keep the power supply at Zero volts before Start
3. All the contacts must be intact
VIVA QUESTIONS:
1.What is meant by Self Bias & fixed Bias circuits, Which one is preferred and why?
2. What is the significance of Emitter Resistance?
4. What is stability factor?
5. what is DC Load line and A.C. Load line?
6. what is quiescent point? What are the various parameters of the transistor that
cause drift in q-point?
7. what are different techniques of stabilization?
8. Relate stability factor with the circuit parameters
9. What is the relation between and .
10. If bypass capacitor is removed ,what happens to the gain?
***

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 CE TRANSISTOR AMPLIFIER

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
CIRCUIT DIAGRAMS:

MODEL GRAPH:

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 CE TRANSISTOR AMPLIFIER
AIM: To Find the frequency response of a Common Emitter Transistor Amplifier and to
find the Bandwidth from the Response, Voltage gain, Input Resistance, output
resistance.

APPARATUS:

S.No Name Range / Value Quantity

1 Regulated D.C Power supply 030 Volts 1
2 Transistor BC107 1
3 Resistors 1K 2
4 Resistors 100k,10K, 4.7K. Each 1
5 Capacitors 10f 3
6 Potentio Meter -- 1
7 Signal Generator ( 0 1MHz) 1
8 Dual Trace CRO 20MHz 1
9 Bread Board and connecting wires -- 1 Set

PROCEDURE:

1. Connect the circuit as per the Fig.1.,Apply Vcc of 12 Volts DC.

2. Apply I/P Voltage of 20mV at 1KHz from the Signal Generator and observe the
O/P on CRO.
3. Vary the frequency from 50 Hz to 1MHz in appropriate steps and note down the
corresponding O/P Voltage Vo in a tabular form .
4. Calculate the Voltage Gain Av = Vo/Vs and note down in the tabular form.
5. Plot the frequency (f) Vs Gain (Av) on a Semi-log Graph sheet
6. Draw a horizontal line at 0.707 times Av and note down the cut off points and
the Bandwidth is given by B.W = f2 f1.

INPUT RESISTANCE RI:

1. Apply I/P Voltage of 20mV at 1KHz from the Signal Generator and observe
voltage Vi across R2 on CRO.
2. Without Disturbing the setup note Vi.
3. find Ii = (Vs Vi) / Rs and Ri= Vi / Ii Ohms.

OUTPUT RESISTANCE (RO):

1. Apply I/P Voltage of 50mV at 1KHz from the Signal Generator and observe
the o/p on CRO
2. Connect a Potentio meter across the O/P terminals and without disturbing Vs
adjust the potentiometer such that o/p falls to V0/2
3. The Resistance of the potentiometer is equal to Ro.

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
TABULAR FORMS:

I/P Voltage, Vs = 20mV

Voltage Gain Av in dB
S.No Frequency (Hz) O/P Voltage, Vo (V)
Av =Vo/Vi = 20 log (Av)

1 100
2 200
3 300
4 500
5 700
6 1K
7 3K
8 5K
9 7K
10 10K
11 30K
12 50K
13 70K
14 100K
15 300K
16 500K
17 700K
18 1M

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
RESULT:

BandWidth B.W = f 2 f1 = Hz
Voltage Gain Av =
Input Resistance Ri = ohms
Output Resistance Ro = ohms

PRECAUTIONS:

1. Check the wires for continuity before use.

2. Keep the power supply at Zero volts before Start
3. All the contacts must be intact

VIVA QUESTIONS:

1. What is an Amplifier?
2. How many types of an Amplifiers?
3. What is meant Band width, Lower cut-off and Upper cut-off frequency?
4. How much phase shift for CE Amplifier?
5. What are the applications?
6. Draw the Equivalent circuit for low frequencies?

***

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 JFET DRAIN & TRANSFER

CHARACTERISTICS (COMMON SOURCE)

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
CIRCUIT DIAGRAM:

MODEL GRAPH:

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 JFET DRAIN & TRANSFER CHARACTERISTICS (CS)

AIM:
To conduct an experiment on a given JFET and obtain
1) Drain characteristics
2) Transfer Characteristics.
3) To find rd, gm, and from the characteristics.

APPARATUS:

S.No Name Range / Value Quantity

1 Dual Regulated D.C Power supply (030 Volts) 1
2 JFET BFW 10 or 11 1
3 D.C Ammeter (0 20mA) 1
4 D.C Voltmeters (0 2V), (0 20V) Each 1
5 Bread Board and connecting wires -- 1 Set

PROCEDURE:

DRAIN CHARACTERISTICS:

1. Connect the circuit as per the Fig. 1 and start with VGG and VDD keeping at zero volts.
2. Keep VGG such that VGS = 0 volts, Now vary VDD such that VDS Varies in steps of 1
volt up to 10 volts. And Note down the corresponding Drain current ID
3. Repeat the above experiment with VGS = -1V and -2V and tabulate the readings.
4. Draw a graph VDS Vs ID against VGS as parameter on graph.
5. From the above graph calculate rd and note down the corresponding diode current
against the voltage in the tabular form.
6. Draw the graph between voltage across the Diode Vs Current through the diode in the
first quadrant as shown in fig.

TRANSFER CHARACTERISTICS:

1. Set VGG and VDD at zero volts .keep VDS = 1Volt.

2. Vary VGG such that VGS varies in steps of 0.5 volts. Note down the corresponding
Drain current ID, until ID = 0mA and Tabulate the readings.
3. Repeat the above experiment for VDS = 3.0 Volts and 5.0 Volts and tabulate the
readings.
4. Draw graph between VGS Vs ID with VDS as parameter.
5. From the graph find gm.
6. Now = gm x rd.

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 TABULAR FORM:

DRAIN CHARACTERISTICS:

VGS = 0 volts VGS = -1V VGS = -2V

S.No
VDS (V) ID (mA) ID (mA) ID (mA)
1 0.0
2 0.5
3 1.0
4 1.5
5 2.0
6 2.5
7 3.0
8 3.5
9 4.0
10 4.5
11 5.0
12 5.5
13 6.0

TRANSFER CHARACTERISTICS:

VDS = 1.0V VDS = 3.0V VDS = 5.0V

S.No
VGS (V) ID (mA) ID (mA) ID (mA)
1 0.0
2 0.5
3 1.0
4 1.5
5 2.0

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 CALCULATIONS:

CALCULATION OF rd :

Construct a Triangle on one of the output characteristic for a particular VGS in the
active region and find VDS and ID
Now rd = VDS/ ID (VGS = constant)

CALCULATION OF gm :

Construct a Triangle on one of the Transfer characteristics for a particular VDS find
VGS and ID.
Now gm = ID/ VGS (VDS = constant).

CALCULATION OF :
= gm x rd.

RESULT:

PRECAUTIONS:

1. check the wires for continuity before use.

2. keep the power supply at zero volts before starting the experiment.
3. All the contacts must be intact.
4. For a good JFET ID will be 11.0 mA at VGS = 0.0 volts if not change the JFET.

VIVA QUESTIONS:

7. What are the advantages of JFET over BJT?

8. Why input resistance in FET amplifier is more than the BJT amplifier?
9. What is a uni-polar device?
10. What is pinch off voltage?
11. What are various FETs?
12. What is Enhancement mode and Depletion mode?
13. Draw the Equivalent circuit of JFET for low frequencies?
14. Write the mathematical equation for gm in terms of gmo?
15. Write equation of FET ID in terms of VGS and Vp?

***

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 JFET AMPLIFIER (COMMON SOURCE)

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
CIRCUIT DIAGRAMS:

MODEL GRAPH:

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 COMMON SOURCE JFET AMPLIFIER
AIM: To study the frequency response of a Common Source Field Effect Transistor and to
find the Bandwidth from the Response.

APPARATUS:

S.No Name Range / Value Quantity

1 Regulated D.C Power supply 030 Volts 1
2 JFET BFW10 or 11 1
3 Signal Generator (0 1MHz) 1
4 Resistors 1K, 2.2M, 4.7K, 470 Each 1
5 Capacitors 47f 2
6 Capacitors 0.001f 1
7 Bread Board and connecting wires - 1 Set
8 Dual Trace CRO 20MHz 1 No

PROCEDURE:

1. Connect the circuit as per the Fig.

2. Keep I/P Voltage at 100mV.
3. Vary the frequency from 50 Hz to 1MHz in appropriate steps and note down the
corresponding source voltage Vs and o/p Voltage Vo in a tabular Form .
4. Plot the frequency (f) Vs Gain (Av) on a semi-log graph sheet and determine the
Bandwidth. From the graph.

RESULT:

BandWidth , B.W = f2 f1 = Hz

PRECAUTIONS:

1. Check the wires for continuity before use.

2. Keep the power supply at Zero volts before Start
3. All the contacts must be intact
4. For a good JFET ID will be 11.0 mA at VGS = 0.0 Volts if not change the JFET.

VIVA QUESTIONS:

1. What are the advantages of JFET over BJT?

2. Why input resistance in FET amplifier is more than BJT amplifier
3. What is a Uni-polar Device?
4. What is Pinch off Voltage?
5. What are the various FETs?
6. What is Enhancement mode and depletion mode?
7. Draw the equivalent circuit of JFET for Low frequencies
8. Write the mathematical equation for gm in terms of gmo.
9. Write equation of FET ID in terms of VGS and VP.

***
Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
TABULAR FORMS:

I/P Voltage, Vs = 100mV

Voltage Gain Av in dB
S.No Frequency (Hz) O/P Voltage, Vo (V)
Av =Vo/Vi = 20 log (Av)

1 50
2 100
3 200
4 300
5 500
6 700
7 1K
8 3K
9 5K
10 7K
11 10K
12 30K
13 50K
14 70K
15 100K
16 300K
17 500K
18 700K
19 1M

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 TRANSISTOR AS A SWITCH

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
CIRCUIT DIAGRAM:

RESULT:

TABULAR FORM:

Input voltage Mode

VCE (V) VCB (V) VBE (V) Mode of LED
(V) ON/OFF

0V

5V

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 TRANSISTOR AS A SWITCH

AIM: 1. To observe the action of a Transistor as an electronic switch.

2. To measure the voltage across the transistor when it is ON and when it is OFF.

APPARATUS:

S.No Name Range / Value Quantity

1 Regulated D.C Power supply 030 Volts 1

2 Transistor BC 107 1
3 Resistors 4.7K , 2.2K Each 1
4 LED CQY24 1
5 Bread Board and connecting wires - 1 Set

PROCEDURE:

1. Construct the circuit as shown in figure.

2. Connect 0 volts to the input terminals.
3. Measure the voltage across collector to emitter(VCE), collector to base(VCB) and base
to emitter(VBE).
4. Connect 5 volts to the input terminals. Measure the voltage across collector to
emitter(VCE), collector to base(VCB) and base to emitter(VBE).
5. Observe that the LED glows when the input terminals are supplied with 0 volts. and
the LED will not glow when the input is 5 volts.

PRECAUTIONS:

1. Check the wires for continuity before use.

2. Keep the power supply at zero volts before staring the experiment.
3. All the connections must be intact.

VIVA QUESTIONS:

1. In which region of the characteristics transistor acts as a switch?

2. What is the typical value of the collector current on ON state?
3. How the junctions of Transistor are biased in ON state and OFF state?

***

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 CHARACTERISTICS OF UJT

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
CIRCUIT DIAGRAMS:

MODEL GRAPHS:

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 UJT CHARACTERISTICS.
AIM: To obtain the V-I characteristics of UJT and plot its input negative resistance
Characteristics also to find its Intrinsic Standoff Ratio

APPARATUS:
S.No Name Range / Value Quantity
1 Power supply (0 30V) 1
2 Transistor UJT 2N2646 1
3 Resistors 3.3K, 330 Each 1
4 Ammeter (0 -100mA) 1
5 Voltmeter (0 10V) 1
6 Bread Board and connecting wires - 1 Set

PROCEDURE:

1. Connect the circuit as shown in above figure.

2. Keep VBB = 5V, Vary VEE smoothly with fine control such that VE Varies in steps of
0.5 volts from zero and note down the resulting emitter current IE for each step in the
tabular form.
3. Repeat the experiment for VBB = 7V and for VBB = 10V.
4. Draw the graph between VE Vs IE by keeping VBB constant.

TABULAR FORM:

VBB = 5V VBB = 7V VBB = 10V

Vs IE Vs IE Vs IE
(volts) (mA) (volts) (mA) (volts) (mA)

RESULT:

VIVA QUESTIONS:

1. What are the applications of UJT?

2. Why UJT is called as a Relaxation Oscillator?
3. Which type of switch is used in UJT?
4. What is Intrinsic stand off ratio?
5. Why UJT is called a negative resistance device?
6. Draw the circuit schematic for UJT?
7. What are the applications of UJT in triggering circuits?
8. Write the equation for Intrinsic stand off ratio?
9. Define valley voltage in UJT?
10. How UJT can be used for firing the silicon controlled rectifiers?
11. What are applications of UJT in Bi stable circuits?
12. What is the main application of UJT?

***

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 CC TRANSISTOR AMPLIFIER

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
CIRCUIT DIAGRAMS:

MODEL GRAPH:

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 CC TRANSISTOR AMPLIFIER
AIM: To Find the frequency response of a Common Collector Transistor Amplifier and to
find the Bandwidth from the Response, Voltage gain, Input Resistance,
output resistance

APPARATUS:

S.No Name Range / Value Quantity

1 Dual Regulated D.C Power supply 030 Volts 1
2 Transistor BC-107 1
3 Capacitors 10f 2
4 Resistors 100k, 10K Each 1
5 Resistors 1K 2
6 Potentio Meter - 1
7 Bread Board and connecting wires - 1 Set
8 Signal Generator ( 0 1MHz) 1
9 Dual Trace CRO 20MHz 1

PROCEDURE:

1. Connect the circuit as per the Fig., Apply Vcc of 12 Volts DC.
2. Apply I/P Voltage of 50mV at 1KHz from the Signal Generator and observe the
O/P on CRO.
3. Vary the frequency from 50 Hz to 1MHz in appropriate steps and note down the
corresponding O/P Voltage Vo in a tabular form .
4. Calculate the Voltage Gain Av = Vo/Vs and note down in the tabular form.
5. Plot the frequency (f) Vs Gain (Av) on a semi-log Graph sheet
6. Draw a horizontal line at 0.707 times Av and note down the cut off points and the
Bandwidth is given by B.W = f2 f1.

INPUT RESISTANCE RI:

1. Apply I/p Voltage of 50mV at 1KHz from the Signal Generator and observe
Voltage Vi across R2 on CRO
2. Without Disturbing the setup note Vi
find Ii = (Vs Vi) / Rs and Ri= Vi / Ii Ohms.

OUTPUT RESISTANCE RO:

1. Apply I/p Voltage of 50mV at 1KHz from the Signal Generator and observe the
O/P on CRO
2. Connect a Potentio meter across the o/p terminals and without disturbing Vs adjust
the potentiometer such that o/p falls to V0/2
3. The Resistance of the potentiometer is equal to Ro.

TABULAR FORMS:

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 I/P Voltage, Vs = 20mV
Voltage Gain Av in dB
S.No Frequency (Hz) O/P Voltage, Vo (V)
Av =Vo/Vi = 20 log (Av)
1 100
2 200
3 300
4 500
5 700
6 1K
7 3K
8 5K
9 7K
10 10K
11 30K
12 50K
13 70K
14 100K
15 300K
16 500K
17 700K
18 1M

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
RESULT:

Band Width B.W = f2 f1 = Hz

Voltage Gain Av =
Input Resistance Ri = ohms
Output Resistance Ro = ohms

PRECAUTIONS:
1. Check the wires for continuity before use.
2. Keep the power supply at Zero volts before Start
3. All the contacts must be intact

VIVA QUESTIONS:

1. What is the other name for CC Amplifier?

2. What are the uses of CC Amplifier?
3. Why this amplifier has got the name Emitter Follower?
4. What is the maximum Voltage gain of an Emitter Follower?
5. Why it is used as a Buffer amplifier?

***

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 COMMON DRAIN JFET AMPLIFIER

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
CIRCUIT DIAGRAMS:

MODEL GRAPH:

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
 COMMON DRAIN JFET AMPLIFIER
AIM: To obtain the frequency response of a Common Drain Field Effect Transistor
Amplifier and also to find its voltage gain ,Output Resistance and Bandwidth.

APPARATUS:

S.No Name Range / Value Quantity

1 Dual Regulated D.C Power supply 030 Volts 1
2 JFET BFW10 or 11 1
3 Resistors 2.2M, 4.7K Each 2
4 Resistors 1K 1
5 Capacitors 47f ,0.001f Each 1
6 Signal Generator ( 0 1MHz) 1
7 Bread Board and connecting wires - 1 Set
8 Dual Trace CRO 20MHz 1 No

PROCEDURE:

FREQUENCY RESPONSE:

1. Connect the circuit as per the Fig.1. Apply VDD of 15 V

2. Give a signal Vs of 100 mV(P-P) at 1KHz on the I/P side and observe the O/P on
CRO.
3. Vary the frequency from 50 Hz to 1MHz with proper intervals on the input side and
observe the output Vo on CRO
4. Draw a graph between frequency Vs Gain on Semi-log Graph Sheet and find its
Mid frequency Gain Amid
5. Draw a horizontal line across the graph at 0.707 Amid and find the Bandwidth

TO FIND R0:

1. Keep Vs = 100mV (P-P) 1KHz Signal and find Corresponding output Vo.
2. Now with out disturbing Vs Connect potentiometer across output and observe the
output on CRO.
3. Adjust the value of Potentiometer Such that the output falls to the Vo/2 value.
4. Note the value of the potentiometer resistance is the Ro of the JFET CD Amplifier.

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual
TABULAR FORMS:

Voltage Gain Av in dB
S.No Frequency (Hz) O/P Voltage, Vo (V)
Av =Vo/Vi = 20 log (Av)
1 100
2 200
3 300
4 500
5 700
6 1K
7 3K
8 5K
9 7K
10 10K
11 30K
12 50K
13 70K
14 100K
15 300K
16 500K
17 700K
18 1M

RESULT:

BandWidth B.W = f2 f1 = Hz
Mid band Gain AMid =
Output Resistance Ro = ohms

PRECAUTIONS:

1. Check the wires for continuity before use.

2. Keep the power supply at Zero volts before Start
3. All the contacts must be intact
4. For a good JFET we will get a gain of 0.9 to 1.0 at 1KHz. If not change the
JFET.

VIVA QUESTIONS:

1. What are the advantages of JFET over BJT?

2. Why input resistance in FET amplifier is more than BJT amplifier
3. What is a Uni-polar Device?
4. What is Pinch off Voltage?
5. What are the various FETs?
6. What is Enhancement mode and depletion mode?
7. Draw the equivalent circuit of JFET for Low frequencies
8. Write the mathematical equation for gm in terms of gmo.
9. Write equation of FET ID in terms of VGS and VP.

***

Dept. of ECE, Sir C.R. Reddy College of Engg. Eluru - 7 II/IV (B.E) ECE, I-SEM :: EDC Lab Manual