14fc7 Dell Inspiron Mini 10 1012 - Compal La-5732p Nim10 Uma - Rev 0.2

A B C D E
MODEL NAME : NIM10

PCB NO : LA-5732P (DA60000EI00)
1
BOM P/N : 43178431L01 1
Compal Confidential
2
SAMOS Schematics Document 2
Intel Pineview-M Processor with TigerPoint
2009-8-21
REV: 0.2
3 3
@ : Nopop Component
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2009/03/25 Deciphered Date 2009/06/22 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, MB A5732
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom A
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401784
Date: Wednesday, September 16, 2009 Sheet 1 of 33
A B C D E
A B C D E
Compal Confidential
Thermal Sensor
Model Name : NIM10 W83L771AWG
Project Code: page 5
Project Name : LA-5732P

1 1
Clock Generator
CK505 page 08
LCD Conn. LVDS
page 09 Pineview-M Memory BUS(DDRII)
Processor DDRII-DIMM X1
P 07
1.8V/667MHz
Daughter board CRT Conn RGB 22x22mm
LS-5731P page 21
page 4,5,6
USB Port X1 Port 1 DMI SIM card

X2 mode
page 21
USB Port X1 Port 2 USB

2
USB 2
page 21 Port 4 WWAN
Tiger Pointer page 14
Card Reader Chipset SATA
Port 7
RTS5159
SD/MMC/MS PCI-Express 17x17mm
page 21 HDA Port 0 USB Port X1
page 10,11,12,13
2.5" HDD (R) page 21
page 17
Through BT cable
Port 5
LPC BUS Audio Codec BlueTooth
AMP & Speaker page 14
ALC272-VB-GR
page 15
page 16
MINI Card MINI Card MINI Card 10/100 Ethernet Through LVDS cable
3 WLAN WWAN Broadcom MCP RTL8103EL HeadPhone & 3
page 14 page 14 page 14 page 18 MIC Jack Port 3

PCIE-Port 2 PCIE-Port 3 PCIE-Port 4 PCIE-Port 1 page 16 CMOS CAM
page 09
USB Port 6 USB Port 4 ENE KBC SPI
RJ45
page 18
KB926page 19
Power ON/OFF DC/DC Interface

page 24 page 22
Through power buttom cable Through LED cable

DC IN 3VALW/5VALW Int.KBD Touch Pad SPI ROM
page 24 page 26
page 19 page 20 page 20
PWR buttom board LED/B
BATT CONN/OTP 1.5VS/0.9VS/ LS-5732P LS-5733P
page 30
0.89VS
page 28
4
CHARGER 4
page 25
1.8V/VCCP
page 27

CPU CORE Issued Date 2009/03/25 Deciphered Date 2009/06/22 Title
page 29 SCHEMATIC, MB A5732
Custom A
401784
A B C D E
A B C D E
ZZZ
PCB
DA60000EI00
1 1
Voltage Rails
External PCI Devices
Power Plane Description S1 S3 S5
VIN Adapter power supply (19V) N/A N/A N/A
DEVICE IDSEL # REQ/GNT # PIRQ
B+ AC or battery power rail for power circuit. N/A N/A N/A
No PCI Device
+CPU_CORE Core voltage for CPU ON OFF OFF
+0.9VS 0.9V switched power rail for DDR terminator ON OFF OFF
+VCCP VCCP switched power rail ON OFF OFF
+1.5VS 1.5V switched power rail ON OFF OFF
+1.8V 1.8V power rail for DDR ON ON OFF
+0.89VS CORE VOLTAGE FOR CPU VGA ON OFF OFF
+3VALW 3.3V always on power rail ON ON ON*
+3VS 3.3V switched power rail ON OFF OFF
+5VALW 5V always on power rail ON ON ON*
+5VS 5V switched power rail ON OFF OFF
2 2
+VS VS always on power rail ON ON ON*
+RTCBATT RTC power ON ON ON
EC SM Bus1 address EC SM Bus2 address
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Device Address Device Address
Smart Battery 0001 011X b W83L771AWG 1001_100X b
EEPROM(24C16/02) 1010 000X b EMC1402 100_1100X b
SIGNAL
STATE SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Full ON HIGH HIGH HIGH ON ON ON ON
S1(Power On Suspend) HIGH HIGH HIGH ON ON ON LOW
S3 (Suspend to RAM) LOW HIGH HIGH ON ON OFF OFF
S4 (Suspend to Disk) LOW LOW HIGH ON OFF OFF OFF
S5 (Soft OFF) LOW LOW LOW ON OFF OFF OFF
3 BOARD ID Table(Page 19) Tiger Point SM Bus address

3
VCC 3.3V +/-5%

Device Address
ID BRD ID Ra Rb Vab (Min) Vab (Type) Vab (Max)
Clock Generator 1101 001Xb
0 R01 (SSI) NC 0 0V 0V 0.155V (SLG8SP556VTR)
1 R02 (ST) 100K +/- 5% 8.2K +/- 5% 0.168V 0.250V 0.362V DDR DIMMA 1010 000Xb
* 2 R10 (X build) 100K +/- 5% 18K +/- 5% 0.375V 0.503V 0.621V
3 Reserved 100K +/- 5% 33K +/- 5% 0.634V 0.819V 0.945V
4 Reserved 100K +/- 5% 56K +/- 5% 0.958V 1.185V 1.359V
5 Reserved 100K +/- 5% 100K +/- 5% 1.372V 1.650V 1.838V
6 Reserved 100K +/- 5% 200K +/- 5% 1.851V 2.200V 2.420V
7 MP 100K +/- 5% NC 2.433V 3.300V 3.300V
4 4

SCHEMATIC, MB A5732
Custom A
401784
A B C D E
5 4 3 2 1
<7> DDR_A_DQS#[0..7]
PINEVIEW_M
PINEVIEW_M <7> DDR_A_D[0..63]
U31A U31B
REV = 1.1
<7> DDR_A_DM[0..7]
REV = 1.1 DDR_A_MA0 DDR_A_DQS0
AH19 DDR_A_MA_0 DDR_A_DQS_0 AD3
DMI_RX0_R <7> DDR_A_DQS[0..7] DDR_A_MA1 DDR_A_DQS#0
F3 DMI_RXP_0 DMI_TXP_0 G2 DMI_TX0 <12> AJ18 DDR_A_MA_1 DDR_A_DQS#_0 AD2
DMI_RX#0_R F2 G1 DMI_TX#0 <12> DDR_A_MA2 AK18 AD4 DDR_A_DM0
DMI_RXN_0 DMI_TXN_0 <7> DDR_A_MA[0..14] DDR_A_MA_2 DDR_A_DM_0
DMI_RX1_R H4 H3 DMI_TX1 <12> DDR_A_MA3 AK16
DMI_RX#1_R DMI_RXP_1 DMI_TXP_1 DDR_A_MA4 DDR_A_MA_3 DDR_A_D0
G3 DMI_RXN_1 DMI_TXN_1 J2 DMI_TX#1 <12> AJ14 DDR_A_MA_4 DDR_A_DQ_0 AC4
DDR_A_MA5 AH14 AC1 DDR_A_D1
DMI
DDR_A_MA6 DDR_A_MA_5 DDR_A_DQ_1 DDR_A_D2
AK14 DDR_A_MA_6 DDR_A_DQ_2 AF4
DDR_A_MA7 AJ12 AG2 DDR_A_D3
DDR_A_MA8 DDR_A_MA_7 DDR_A_DQ_3 DDR_A_D4
AH13 DDR_A_MA_8 DDR_A_DQ_4 AB2
D DDR_A_MA9 DDR_A_D5 D
AK12 DDR_A_MA_9 DDR_A_DQ_5 AB3
<8> CLK_CPU_EXP# N7 L10 DDR_A_MA10 AK20 AE2 DDR_A_D6
EXP_CLKINN EXP_RCOMPO R1172 DDR_A_MA11 DDR_A_MA_10 DDR_A_DQ_6 DDR_A_D7
<8> CLK_CPU_EXP N6 EXP_CLKINP EXP_ICOMPI L9 AH12 DDR_A_MA_11 DDR_A_DQ_7 AE3
L8 R1171 49.9_0402_1% DDR_A_MA12 AJ11
EXP_RBIAS 750_0402_1% DDR_A_MA13 DDR_A_MA_12 DDR_A_DQS1
R10 EXP_TCLKINN AJ24 DDR_A_MA_13 DDR_A_DQS_1 AB8
R9 N11 DDR_A_MA14 AJ10 AD7 DDR_A_DQS#1
EXP_TCLKINP RSVD_TP T1 DDR_A_MA_14 DDR_A_DQS#_1
N10 P11 AA9 DDR_A_DM1
RSVD RSVD_TP T2 DDR_A_DM_1
N9 RSVD DDR_A_WE# AK22 AB6 DDR_A_D8
<7> DDR_A_WE# DDR_A_WE# DDR_A_DQ_8
DDR_A_CAS# AJ22 AB7 DDR_A_D9
<7> DDR_A_CAS# DDR_A_CAS# DDR_A_DQ_9
DDR_A_RAS# AK21 AE5 DDR_A_D10
<7> DDR_A_RAS# DDR_A_RAS# DDR_A_DQ_10
K2 K3 AG5 DDR_A_D11
RSVD RSVD DDR_A_BS0 DDR_A_DQ_11 DDR_A_D12
J1 RSVD RSVD L2 <7> DDR_A_BS0 AJ20 DDR_A_BS_0 DDR_A_DQ_12 AA5
M4 M2 DDR_A_BS1 AH20 AB5 DDR_A_D13
RSVD RSVD <7> DDR_A_BS1 DDR_A_BS_1 DDR_A_DQ_13
L3 N2 DDR_A_BS2 AK11 AB9 DDR_A_D14
RSVD RSVD <7> DDR_A_BS2 DDR_A_BS_2 DDR_A_DQ_14
AD6 DDR_A_D15
DDR_A_DQ_15
1 OF 6 DDR_A_DQS2
PINEVIEW-M_FCBGA8559 DDR_A_DQS_2 AD8
DDR_CS#0 AH22 AD10 DDR_A_DQS#2
<7> DDR_CS#0 DDR_A_CS#_0 DDR_A_DQS#_2
DDR_CS#1 AK25 AE8 DDR_A_DM2
<7> DDR_CS#1 DDR_A_CS#_1 DDR_A_DM_2
AJ21 DDR_A_CS#_2
AJ25 AG8 DDR_A_D16
DDR_A_CS#_3 DDR_A_DQ_16 DDR_A_D17
DDR_A_DQ_17 AG7
DDR_CKE0 AH10 AF10 DDR_A_D18
<7> DDR_CKE0 DDR_A_CKE_0 DDR_A_DQ_18
DDR_CKE1 AH9 AG11 DDR_A_D19
<7> DDR_CKE1 DDR_A_CKE_1 DDR_A_DQ_19
JP80 AK10 AF7 DDR_A_D20
XDP_PREQ# DDR_A_CKE_2 DDR_A_DQ_20 DDR_A_D21
<5> XDP_PREQ# 1 1 AJ8 DDR_A_CKE_3 DDR_A_DQ_21 AF8
C906 DMI_RX0_R XDP_PRDY# DDR_A_D22
<12> DMI_RX0 1 2 <5> XDP_PRDY# 2 2 DDR_A_DQ_22 AD11
0.1U_0402_10V7K 3 M_ODT0 AK24 AE10 DDR_A_D23
3 <7> M_ODT0 DDR_A_ODT_0 DDR_A_DQ_23
<5> XDP_BPM#3 XDP_BPM#3 4 M_ODT1 AH26
C907 4 <7> M_ODT1 DDR_A_ODT_1
1 2 DMI_RX#0_R <5> XDP_BPM#2 XDP_BPM#2 5 AH24 AK5 DDR_A_DQS3
<12> DMI_RX#0 5 DDR_A_ODT_2 DDR_A_DQS_3
0.1U_0402_10V7K 6 AK27 AK3 DDR_A_DQS#3
C XDP_BPM#1 6 DDR_A_ODT_3 DDR_A_DQS#_3 DDR_A_DM3 C
<5> XDP_BPM#1 7 7 DDR_A_DM_3 AJ3
C908 DMI_RX1_R XDP_BPM#0
<12> DMI_RX1 1 2 <5> XDP_BPM#0 8 8
0.1U_0402_10V7K 9 AH1 DDR_A_D24
R1173 1 9 M_CLK_DDR0 DDR_A_DQ_24 DDR_A_D25
C909 <5,12> H_PWRGD 2 1K_0402_1% 10 10 <7> M_CLK_DDR0 AG15 DDR_A_CK_0 DDR_A_DQ_25 AJ2
<12> DMI_RX#1 1 2 DMI_RX#1_R @ R1174 1 2 1K_0402_1% 11 M_CLK_DDR#0 AF15 AK6 DDR_A_D26
<12> SLPIOVR# 11 <7> M_CLK_DDR#0 DDR_A_CK_0# DDR_A_DQ_26
0.1U_0402_10V7K <8> CPU_ITP CPU_ITP 12 M_CLK_DDR1 AD13 AJ7 DDR_A_D27
12 <7> M_CLK_DDR1 DDR_A_CK_1 DDR_A_DQ_27
<8> CPU_ITP# CPU_ITP# 13 M_CLK_DDR#1 AC13 AF3 DDR_A_D28
13 <7> M_CLK_DDR#1 DDR_A_CK_1# DDR_A_DQ_28
+VCCP 14 AH2 DDR_A_D29
14 DDR_A_DQ_29
Close to CPU <5,12,14,18,19> PLTRST#
PLTRST# 1 R1175 2 1K_0402_1%
T44
15
16
15
AC15
DDR_A_DQ_30 AL5
AJ6
DDR_A_D30
DDR_A_D31
16 DDR_A_CK_3 DDR_A_DQ_31
17 17 AD15 DDR_A_CK_3#
<5> XDP_TDO XDP_TDO 18 AF13 AG22 DDR_A_DQS4
XDP_TRST# 18 DDR_A_CK_4 DDR_A_DQS_4 DDR_A_DQS#4
<5> XDP_TRST# 19 19 AG13 DDR_A_CK_4# DDR_A_DQS#_4 AG21
<5> XDP_TDI XDP_TDI 20 AD19 DDR_A_DM4
XDP_TMS 20 DDR_A_DM_4
<5> XDP_TMS 21 21
22 AE19 DDR_A_D32
22 DDR_A_DQ_32 DDR_A_D33
23 23 +1.8V AD17 RSVD DDR_A_DQ_33 AG19
<5> XDP_TCK XDP_TCK 24 AC17 AF22 DDR_A_D34
24 RSVD DDR_A_DQ_34 DDR_A_D35
25 G1 AB15 RSVD DDR_A_DQ_35 AD22
26 AB17 AG17 DDR_A_D36
G2 RSVD DDR_A_DQ_36 DDR_A_D37
R1176 DDR_A_DQ_37 AF19
ACES_87151-24051 AE21 DDR_A_D38
10K_0402_5% DDR_A_DQ_38 DDR_A_D39
DDR_A_DQ_39 AD21
+1.8V +1.8V AE26 DDR_A_DQS5

DDR_A_DQS_5 DDR_A_DQS#5
AB4 RSVD DDR_A_DQS#_5 AG27
AK8 AJ27 DDR_A_DM5
RSVD DDR_A_DM_5
1
R1178
AE24 DDR_A_D40
R1177 10K_0402_5% DDR_A_DQ_40 DDR_A_D41
DDR_A_DQ_41 AG25
@ T6 AB11 AD25 DDR_A_D42
1K_0402_1% RSVD_TP DDR_A_DQ_42 DDR_A_D43
T7 AB13 RSVD_TP DDR_A_DQ_43 AD24
B DDR_A_D44 B
2
DDR_A_DQ_44 AC22
AL28 AG24 DDR_A_D45
R1179 DDR_VREF DDR_A_DQ_45 DDR_A_D46
AK28 AD27
1
Differential Clock Signal Table XDP Reserve R1182 51_0402_5%~D
+VCCP
R1180
R1181 80.6_0402_1%
80.6_0402_1%
AJ26
DDR_RPD
DDR_RPU
DDR_A_DQ_46
DDR_A_DQ_47 AE27 DDR_A_D47
Signal Name Description Direction Type XDP_TDI 1 2 AK29 AE30 DDR_A_DQS6

R1183 51_0402_5%~D 1K_0402_1% RSVD DDR_A_DQS_6 DDR_A_DQS#6
DDR_A_DQS#_6 AF29
BCLKP[0] Differential Core Clock In XDP_TMS DDR_A_DM6
2
1 2 DDR_A_DM_6 AF30
I Diff Clk CMOS R1184 51_0402_5%~D
BCLKN[0] XDP_TDO DDR_A_D48
1 2 DDR_A
DDR_A_DQ_48 AG31
HPL_CLKINP Differential Host Clock In R1185 51_0402_5%~D AG30 DDR_A_D49
XDP_PREQ# DDR_A_DQ_49 DDR_A_D50
HPL_CLKINN I Diff Clk CMOS 1 2 DDR_A_DQ_50 AD30
AD29 DDR_A_D51
DDR_A_DQ_51 DDR_A_D52
EXP_CLKINP Differential DMI Clock In DDR_A_DQ_52 AJ30
I Diff Clk CMOS AJ29 DDR_A_D53
EXP_CLKINN R1186 51_0402_5%~D DDR_A_DQ_53 DDR_A_D54
DDR_A_DQ_54 AE29
REFCLKINP Differential PLL Clock In XDP_TRST# 1 2 AD28 DDR_A_D55
R1187 51_0402_5%~D DDR_A_DQ_55
REFCLKINN I Diff Clk CMOS
XDP_TCK 1 2 AB27 DDR_A_DQS7
DDR_A_DQS_7 DDR_A_DQS#7
REFSSCLKINP Differential Spread Spectrum Clock In DDR_A_DQS#_7 AA27
I Diff Clk CMOS AB26 DDR_A_DM7
REFSSCLKINN DDR_A_DM_7
AA24 DDR_A_D56
XDP_TDI DDR_A_DQ_56 DDR_A_D57
DDR_A_DQ_57 AB25
XDP_TMS W24 DDR_A_D58
DDR_A_DQ_58 DDR_A_D59
DDR_A_DQ_59 W22
3
XDP_TDO AB24 DDR_A_D60

XDP_PREQ# @ DDR_A_DQ_60 DDR_A_D61
DDR_A_DQ_61 AB23
D7 AA23 DDR_A_D62
DDR_A_DQ_62
3
PSOT24C_SOT23-3
W27 DDR_A_D63
@ DDR_A_DQ_63
D5
1
PSOT24C_SOT23-3
A A
2 OF 6
XDP_TRST# PINEVIEW-M_FCBGA8559
XDP_TCK
1
3
@
D8
PSOT24C_SOT23-3

1
SCHEMATIC, MB A5732
2009-4-27-MODIFY Size Document Number Rev
Custom A
401784
5 4 3 2 1
5 4 3 2 1
PINEVIEW_M
U31C
T18 D12 XDP_RSVD_00 REV = 1.1

T8 A7 XDP_RSVD_01 CRT_HSYNC M30 GMCH_CRT_HSYNC <21>
T9 D6 XDP_RSVD_02 CRT_VSYNC M29 GMCH_CRT_VSYNC <21> U31D PINEVIEW_M
T10 C5 XDP_RSVD_03
T19 C7 XDP_RSVD_04
C6 N31 GMCH_CRT_R REV = 1.1
T20 XDP_RSVD_05 CRT_RED GMCH_CRT_R <21> U25 E7 H_SMI#
T11 D8 P30 GMCH_CRT_G <9> LVDSAC- LA_CLKN SMI# H_SMI# <11>
XDP_RSVD_06 CRT_GREEN GMCH_CRT_G <21> U26 H7 H_A20M#
T21 B7 P29 GMCH_CRT_B <9> LVDSAC+ LA_CLKP A20M# H_A20M# <11>
XDP_RSVD_07 CRT_BLUE GMCH_CRT_B <21> <9> LVDSA0- R23 H6 H_FERR#
D T12 A9 N30 LA_DATAN_0 FERR# H_FERR# <11> D
XDP_RSVD_08 CRT_IRTN <9> LVDSA0+ R24 F10 H_INTR
H_INTR <11>
VGA
D9 LA_DATAP_0 LINT0 H_NMI
XDP_RSVD_09 <9> LVDSA1- N26 F11 H_NMI <11>
T22 C8 LA_DATAN_1 LINT1 H_IGNNE#
XDP_RSVD_10 <9> LVDSA1+ N27 E5 H_IGNNE# <11>
T16 B8 LA_DATAP_1 IGNNE# H_STPCLK#
XDP_RSVD_11 <9> LVDSA2- R26 F8 H_STPCLK# <11>
T13 C10 L31 GMCH_CRT_DATA <21> LA_DATAN_2 STPCLK#
XDP_RSVD_12 CRT_DDC_DATA
ICH
<9> LVDSA2+ R27 LA_DATAP_2
T23 D10 XDP_RSVD_13 CRT_DDC_CLK L30 GMCH_CRT_CLK <21>
T17 B11 XDP_RSVD_14 H_DPRSTP#
R1189 665_0402_1% DPRSTP# G6 H_DPRSTP# <12>
T14 B10 XDP_RSVD_15 DAC_IREF P28 R1190 H_DPSLP#
R22 LIBG DPSLP# G10 H_DPSLP# <12>
T15 B12 XDP_RSVD_16 2.37K_0402_1% H_INIT#
CPU_DREFCLK J28 LVBG INIT# G8 H_INIT# <11>
T24 C11 XDP_RSVD_17 REFCLKINP Y30 CPU_DREFCLK <8> R1254 0_0402_5%
CPU_DREFCLK# N22 LVREFH PRDY# E11 1 2 XDP_PRDY# <4>
REFCLKINN Y29 CPU_DREFCLK# <8>
R1198 CPU_SSCDREFCLK N23 LVREFL PREQ# F15 1 2 XDP_PREQ# <4>
REFSSCLKINP AA30 CPU_SSCDREFCLK <8> GMCH_ENBKL
1K_0402_1% CPU_SSCDREFCLK# <19> GMCH_ENBKL L27 LBKLT_EN R1255 0_0402_5%
AA31
LVDS
REFSSCLKINN CPU_SSCDREFCLK# <8> L26 LBKLT_CTL H_THERMTRIP#
L23 LCTLA_CLK THERMTRIP# E13 H_THERMTRIP# <11>
T25 L11 RSVD K25 LCTLB_DATA
<9> EDID_CLK_LCD K23 LDDC_CLK
0_0402_5% <9> EDID_DAT_LCD K24
R1252 LDDC_DATA
PM_EXTTS#1 <9> GMCH_LVDDEN H26 LVDD_EN
PM_EXTTS#_1/DPRSLPVR K29 PM_DPRSLPVR <12> H_PROCHOT#
PM_EXTTS#0 PROCHOT# C18
PM_EXTTS#_0 J30 PM_EXTTS#0 <7> H_PWRGD
H_PWROK CPUPWRGOOD W1 H_PWRGD <4,12>
PWROK L5
AA3 PLTRST# R1192
RSTIN# PLTRST# <4,12,14,18,19>
100K_0402_5%
A13 H_GTLREF
W8 CLK_CPU_HPLCLK# GTLREF
HPL_CLKINN CLK_CPU_HPLCLK# <8> H27
W9 CLK_CPU_HPLCLK VSS
HPL_CLKINP CLK_CPU_HPLCLK <8>
0_0402_5%
AA7 0_0402_5%
MISC
T26 RSVD_TP
T27 AA6 @ R1193 0_0402_5%
RSVD_TP H_PWROK 1 2 L6
C
T28 R5 VGATE <8,12,19,29> 0_0402_5% RSVD C
RSVD_TP 0_0402_5% E17
T29 R6 RSVD
RSVD_TP R1194 <4> XDP_BPM#0 1 2 G11 BPM_1_0# CLK_CPU_BCLK#
1 2 PCH_POK <12,19> <4> XDP_BPM#1 1 2 E15 BPM_1_1# BCLKN H10 CLK_CPU_BCLK# <8>
T30 AA21 RSVD_TP CLK_CPU_BCLK
0_0402_5% <4> XDP_BPM#2 1 2 G13 BPM_1_2# BCLKP J10 CLK_CPU_BCLK <8>
T31 W21 RSVD_TP <4> XDP_BPM#3 1 2 F13 BPM_1_3#
T32 T21 RSVD_TP CPU_BSEL0
R1209 BSEL_0 K5 CPU_BSEL0 <8>
T33 V21 RSVD_TP CPU_BSEL1
R1211 T34 B18 BPM_2_0#/RSVD BSEL_1 H5 CPU_BSEL1 <8>
T35 B20 K6 CPU_BSEL2
R1214 BPM_2_1#/RSVD BSEL_2 CPU_BSEL2 <8>
CPU
R1253 T36 C20 BPM_2_2#/RSVD
T37 B21 H30 CPU_VID0
BPM_2_3#/RSVD VID_0 CPU_VID0 <29>
H29 CPU_VID1
VID_1 CPU_VID1 <29>
H28 CPU_VID2
VID_2 CPU_VID2 <29>
G30 CPU_VID3
VID_3 CPU_VID3 <29>
T38 G5 G29 CPU_VID4
RSVD VID_4 CPU_VID4 <29>
XDP_TDI D14 F29 CPU_VID5
<4> XDP_TDI TDI VID_5 CPU_VID5 <29>
XDP_TDO D13 E29 CPU_VID6
<4> XDP_TDO TDO VID_6 CPU_VID6 <29>
XDP_TCK B14
<4> XDP_TCK TCK
XDP_TMS C14 L7
<4> XDP_TMS TMS RSVD
XDP_TRST# C16 D20
<4> XDP_TRST# TRST# RSVD
RSVD H13
RSVD D18
H_THERMDA D30
H_THERMDC THRMDA_1
E30 THRMDC_1 RSVD_TP K9 T39
RSVD_TP D19 T40
K7 H_EXTBGREF
EXTBGREF
+VCCP
+3VS
B 3 OF 6 B
1
PINEVIEW-M_FCBGA8559 R1196
R1195 68_0402_5% C30 THRMDA_2/RSVD
D31 THRMDC_2/RSVD
10K_0402_5%
H_PROCHOT# 4 OF 6
2
PM_EXTTS#0 PINEVIEW-M_FCBGA8559
Close to Processor Close to Processor +VCCP +VCCP
H_THERMDA, H_THERMDC routing together. pin pin

Trace width / Spacing = 10 / 10 mil
R1197 R1199
1K_0402_1% 976_0402_1%
+3VS Place closed to chipset H_EXTBGREF

CPU THERMAL SENSOR H_GTLREF
1U_0603_10V4Z
R1203
GMCH_CRT_R
1U_0603_10V4Z
1 2 1
C940
150_0402_1% 1 R1202
@ C939
GMCH_CRT_G 1 R1200 2 R1201
0.1U_0402_16V4Z~D
1 3.3K_0402_1%
150_0402_1% 2K_0402_1%
C914 2009-5-05 GMCH_CRT_B 2
1 R1204 2 @
U33 150_0402_1% 2
2 GMCH_ENBKL R1205
100K_0402_5%
1 8 EC_SMB_CK2 EC_SMB_CK2 <19>
VDD SCL
H_THERMDA 2 7 EC_SMB_DA2
placed within 0.5" placed within 0.5"
A D+ SDA EC_SMB_DA2 <19> A
C915
H_THERMDC R1206 1
of processor pin. of processor pin.
1 2 3 D- ALERT# 6 2 +3VS
2200P_0402_50V7K 10K_0402_5%
4 T_CRIT_A# GND 5

W83L771AWG_TSSOP8 2009/03/25 2009/06/22 Title
Issued Date Deciphered Date
Address:1001_100
SCHEMATIC, MB A5732
Custom A
401784
5 4 3 2 1
5 4 3 2 1
U31F PINEVIEW_M
GFX supply current: 1.38A U31E REV = 1.1

A11 VSS VSS F24
Sustained GFX supply current: 1.05A 22U_0805_6.3V6M +CPU_CORE A16 F28
PINEVIEW_M 1U_0402_6.3V6K VSS VSS
1U_0402_6.3V6K
VCC A23 A19 VSS VSS F4
+0.89VS REV = 1.1 VCC A25 Add 22U x3 A29 RSVD_NCTF VSS G15
A27 1 1 1 1 1 @ 1 1 1 A3 G17
VCC C919 C920 C922 C269 C271 C272 RSVD_NCTF VSS
B23 C916 C917 A30 G22
D VCC RSVD_NCTF VSS D
T13 VCCGFX VCC B24 A4 RSVD_NCTF VSS G27
T14 VCCGFX VCC B25 AA13 VSS VSS G31
2 2 2 2 2 2 2 2
T16 VCCGFX VCC B26 AA14 VSS VSS H11
T18 B27 1U_0402_6.3V6K AA16 H15
VCCGFX VCC 1U_0402_6.3V6K VSS VSS
T19 VCCGFX VCC C24 1U_0402_6.3V6K AA18 VSS VSS H2
V13 C26 PLACE IN CAVITY 22U_0805_6.3V6M 22U_0805_6.3V6M AA2 H21
VCCGFX VCC VSS VSS
V19 VCCGFX VCC D23 AA22 VSS VSS H25
W14 VCCGFX VCC D24 AA25 VSS VSS H8
W16 VCCGFX VCC D26 AA26 VSS VSS J11
W18 VCCGFX VCC D28 AA29 VSS VSS J13
GFX/MCH
W19 E22 +VCCP AA8 J15
VCCGFX VCC VSS VSS
VCC E24 AB19 VSS VSS J4
E27 AB21 K11
CPU
VCC +CPU_CORE VSS VSS
VCC F21 07/17 AB28 VSS VSS K13
F22 2 x 330uF(9mohm/2) 4.7U_0603_6.3V6K~D AB29 K19
VCC VSS VSS
VCC F25 1 AB30 VSS VSS K26
G19 1 1 1 C924 1 1 AC10 K27
VCC @ VSS VSS
VCC G21 AC11 VSS VSS K28
G24 + + C918 + C925 C926 AC19 K30
VCC C921 C923 2 VSS VSS
H17 AC2 K4
GND
VCC 330U 2.5V Y 330U 2.5V Y 330U 2.5V Y 2 2 VSS VSS
VCC H19 AC21 VSS VSS K8
DDR supply current: 2.27A 2 2 2 22U_0805_6.3V6M 1U_0603_10V4Z
VCC H22 AC28 VSS VSS L1
+1.8V H24 AC30 L13
VCC Close to U31.U10 VSS VSS
2.2U_0603_10V6K2.2U_0603_10V6K VCC J17 AD26 VSS VSS L18
AK13 VCCSM VCC J19 AD5 VSS VSS L22
AK19 VCCSM VCC J21 Close to U71.E2 AE1 VSS VSS L24
2 2 2 2 AK9 VCCSM VCC J22 Close to U71.D4 AE11 VSS VSS L25
AL11 K15 R1207 AE13 L29
C928 C929 C930 C931 VCCSM VCC VSS VSS
AL16 VCCSM VCC K17 +RING_EAST AE15 VSS VSS M28
1 2
AL21 VCCSM VCC K21 AE17 VSS VSS M3
1 1 1 1 1
2.2U_0603_10V6K 2.2U_0603_10V6K AL25 VCCSM VCC L14 AE22 VSS VSS N1
+1.8V L16 0_0603_5% AE31 N13
C VCC C932 VSS VSS C
VCC L19 1U_0603_10V4Z AF11 VSS VSS N18
VCC L21 2 AF17 VSS VSS N24
22U_0805_6.3V6M
VCC N14 R1208 AF21 VSS VSS N25

07/17 VCC N16 AF24 VSS VSS N28
AK7 N19 1 2 +RING_WEST AF28 N4
VCCCK_DDR VCC VSS VSS
1 +VCCP AL7 VCCCK_DDR VCC N21 0_0603_5% 1 1 AG10 VSS VSS N5
C933
AG3 VSS VSS N8

DDR analog supply current: 1.32A C934 C935 AH18 P13
1U_0603_10V4Z 1U_0603_10V4Z VSS VSS
U10 VCCA_DDR AH23 VSS VSS P14
2 2 2
DDR

POWER

U9 VCCA_DDR AJ1 RSVD_NCTF VSS P3
V2 VCCA_DDR AJ16 VSS VSS P4
V3 VCCA_DDR AJ31 RSVD_NCTF VSS R25
V4 VCCA_DDR AK1 RSVD_NCTF VSS R7
W10 VCCA_DDR AK2 RSVD_NCTF VSS R8
W11 VCCA_DDR AK23 VSS VSS T11
C29 VCCSENSE R1210 AK30 U22
VCCSENSE VCCSENSE <29> 1 2 +VCC_DMI RSVD_NCTF VSS
AA10 B29 VSSSENSE AK31 U23
VCCACK_DDR VSSSENSE VSSSENSE <29> 0_0805_5% 1 1 RSVD_NCTF VSS
AA11 VCCACK_DDR VCCA Y2 +1.5VS 1U_0603_10V4Z AL13 VSS VSS U24
Processor Core analog supply current: 0.08A C937 C938 AL19 VSS VSS U27
1U_0603_10V4Z AL2 RSVD_NCTF VSS V14
1 2 2 AL23 VSS VSS V16
D4 +VCCP AL29 V18
Display PLL SFR and CRT DAC supply VCCP RSVD_NCTF VSS
C391 Close to Pin T1 AL3 RSVD_NCTF VSS V28
current: 0.154A B4 AL30 V29
VCCP 2 0.01U_0402_16V7K RSVD_NCTF VSS
VCCP B3 AL9 VSS VSS W13
+1.8VS B13 W2
VSS VSS
AA19 VCCD_AB_DPL B16 VSS VSS W23
B19 VSS VSS W25
2
B B
B22 VSS VSS W26
R1212 B30 W28
RSVD_NCTF VSS
0_0603_5% V11 VCCD_HMPLL B31 RSVD_NCTF VSS W30
B5 VSS VSS W4
1U_0603_10V4Z
1U_0603_10V4Z
B9 W5
1
VSS VSS
AC31 VCCSFR_AB_DPL C1 RSVD_NCTF VSS W6
1 1 V30 +VCC_ALVD C12 W7
VCCALVDS +VCC_DLVD VSS VSS
VCCDLVDS W31 C21 VSS VSS Y28
C941
C942
LVDS supply current: 0.06A C22 VSS VSS Y3

+1.8VS C25 Y4
LVDS
2 2 +VCC_CRT_DAC T30 VSS VSS

C31
EXP\CRT\PLL
VCCACRTDAC RSVD_NCTF
D22
+3VS 1 R1213 2 +VCC_CRT_DAC VSS
E1 RSVD_NCTF
MBK2012601_YZF 1 E10
GIO supply current:0.006A +VCC_DMI VSS
T31 VCC_GIO VCCA_DMI T1 C943 E19 VSS
+RING_EAST J31 T2 E21
VCCRING_EAST VCCA_DMI DMI analog supply current: 0.48A 1U_0603_10V4Z VSS
+RING_WEST C3 T3 2 E25 T29
DMI
VCCRING_WEST VCCA_DMI VSS VSS

+VCCP B2 VCCRING_WEST E8 VSS
C2 P2 T41 +DMI_HMPLL F17
VCCRING_WEST RSVD +DMI_HMPLL 1 R1215 2 VSS
A21 VCC_LGI VCCSFR_DMIHMPLL AA1 0_0603_5% F19 VSS
SFR & DMIHMPLL supply current: 0.104A 1
VCCP E2 +VCCP C944 6 OF 6

DAC, GIO, LVDS, & LGIO, DPLL, HMPLL
1U_0603_10V4Z PINEVIEW-M_FCBGA8559
supply current: 0.33A 2
R1216
5 OF 6 1 2 +VCC_ALVD
PINEVIEW-M_FCBGA8559 +CPU_CORE 1
+0.89VS 0.1UH_MLF1608DR10KT_10%~D
C56
R1218
VCCSENSE 1 2 22U_0805_6.3V6M 07/17
2.2U_0603_10V6K
2
0.1U_0402_10V6K
C946
2 100_0402_1%
10U_0805_10V6K~D
A R1219 1 R1217 2 +VCC_DLVD A

1U_0402_6.3V6K
330U 2.5V Y
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 VSSSENSE 1 2 0_0805_5% 1
1 1 100_0402_1%
C947
C949
C950
C951
C952
C954
C948
1 1 1 1 1 1 1
C927
+
C995
C1000
1 C953
1U_0603_10V4Z
2
2 2 2
2 2 2 2 2 2 2

Close Chipset pin Issued Date 2009/03/25 Deciphered Date 2009/06/22 Title
SCHEMATIC, MB A5732
Custom A
401784
5 4 3 2 1
5 4 3 2 1
+1.8V +1.8V
20mils JDIM1
<4> DDR_A_DQS#[0..7] +DIMM_VREF 1 VREF VSS 2
+1.8V 3 4 DDR_A_D4
DDR_A_D0 VSS DQ4 DDR_A_D5
<4> DDR_A_D[0..63] 1 1 5 DQ0 DQ5 6
Share +DIMM_VREF for Layout Note: C1016 C1018 DDR_A_D1 7 8
DQ1 VSS
1
<4> DDR_A_DM[0..7] 2.2U_0603_6.3V6K~D 9 10 DDR_A_DM0
1.DDRII VREF R1343 Place near JDIM1 0.1U_0402_16V4Z~D DDR_A_DQS#0 11
VSS DM0
12
2 2 DDR_A_DQS0 DQS0# VSS DDR_A_D6
<4> DDR_A_DQS[0..7] 2.GMCH SM_VREF_0 13 DQS0 DQ6 14
1K_0402_1% 15 16 DDR_A_D7
SM_VREF_1 DDR_A_D2 17
VSS DQ7
18
<4> DDR_A_MA[0..14]
2
DDR_A_D3 DQ2 VSS DDR_A_D12
+DIMM_VREF 19 DQ3 DQ12 20
21 22 DDR_A_D13
VSS DQ13
1
DDR_A_D8 23 24
R1345 DDR_A_D9 DQ8 VSS DDR_A_DM1
D
2009-5-27 modify 25
27
DQ9 DM1 26
28 D
1K_0402_1% DDR_A_DQS#1 VSS VSS M_CLK_DDR0
29 DQS1# CK0 30 M_CLK_DDR0 <4>
Layout Note: DDR_A_DQS1 31 32 M_CLK_DDR#0 M_CLK_DDR#0 <4>
2
DQS1 CK0#
33 34
Place near JDIM1 DDR_A_D10 35
VSS VSS
36 DDR_A_D14
DDR_A_D11 DQ10 DQ14 DDR_A_D15
37 DQ11 DQ15 38
39 VSS VSS 40
41 VSS VSS 42
DDR_A_D16 43 44 DDR_A_D20
45 DQ17 DQ21 46
+1.8V 47 48
DDR_A_DQS#2 VSS VSS R1344 1
49 DQS2# NC 50 2 PM_EXTTS#0 <5>
DDR_A_DQS2 51 52 DDR_A_DM2 0_0402_5%
DQS2 DM2
53 VSS VSS 54
DDR_A_D18 DDR_A_D22
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
55 DQ18 DQ22 56
1 1 1 1 1 DDR_A_D19 57 58 DDR_A_D23
DQ19 DQ23
59 VSS VSS 60
C1020
C1021
C1022
C1023
C1024 DDR_A_D24 61 62 DDR_A_D28

63 DQ25 DQ29 64
2 2 2 2 2 65 66
DDR_A_DM3 VSS VSS DDR_A_DQS#3
67 DM3 DQS3# 68
69 70 DDR_A_DQS3
NC DQS3
71 VSS VSS 72
DDR_A_D26 73 74 DDR_A_D30
75 DQ27 DQ31 76
77 VSS VSS 78
220U_B2_2.5VM_R35
DDR_CKE0 DDR_CKE1
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1 <4> DDR_CKE0 79 CKE0 NC/CKE1 80 DDR_CKE1 <4>

1 1 1 1 81 VDD VDD 82
+ 83 84
NC NC/A15
C1030
C1031
C1032
C1033
C1034
@ <4> DDR_A_BS2 DDR_A_BS2 85 86 DDR_A_MA14

BA2 NC/A14
87 VDD VDD 88
2 2 2 2 2 DDR_A_MA12 DDR_A_MA11
89 A12 A11 90
DDR_A_MA9 91 92 DDR_A_MA7
C
DDR_A_MA8 A9 A7 DDR_A_MA6 C
93 A8 A6 94
95 VDD VDD 96
DDR_A_MA3 A5 A4 DDR_A_MA2
99 A3 A2 100
A1 A0
103 VDD VDD 104
DDR_A_MA10 105 106 DDR_A_BS1 DDR_A_BS1 <4>
DDR_A_BS0 A10/AP BA1 DDR_A_RAS#
<4> DDR_A_BS0 107 BA0 RAS# 108 DDR_A_RAS# <4>
<4> DDR_A_WE# DDR_A_WE# 109 110 DDR_CS#0 DDR_CS#0 <4>
WE# S0#
111 VDD VDD 112
Layout Note: Schematic Note: <4> DDR_A_CAS# DDR_A_CAS# 113 114 M_ODT0 M_ODT0 <4>
DDR_CS#1 CAS# ODT0 DDR_A_MA13
Follow Intel check list recommand, we add <4> DDR_CS#1 115 116
Place one cap close to every 2 pull-up 117
NC/S1# NC/A13
118
8 CAP. M_ODT1 VDD VDD
resistors terminated to +0.9VS. <4> M_ODT1 119 NC/ODT1 NC 120
121 122
(check list page 18) DDR_A_D32 123
VSS VSS
124 DDR_A_D36
125 DQ33 DQ37 126
127 VSS VSS 128
DDR_A_DQS#4 129 130 DDR_A_DM4
DDR_A_DQS4 DQS4# DM4
131 DQS4 VSS 132
133 134 DDR_A_D38
DDR_A_D34 VSS DQ38 DDR_A_D39
135 DQ34 DQ39 136
DDR_A_D35 137 138
DQ35 VSS DDR_A_D44
139 VSS DQ44 140
+0.9VS DDR_A_D40 141 142 DDR_A_D45
DDR_A_D41 DQ40 DQ45
143 DQ41 VSS 144
145 146 DDR_A_DQS#5
DDR_A_DM5 VSS DQS5# DDR_A_DQS5
147 DM5 DQS5 148
149 VSS VSS 150
DDR_A_D42 151 152 DDR_A_D46
153 DQ43 DQ47 154
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
155 VSS VSS 156
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 DDR_A_D48 157 158 DDR_A_D52
159 DQ49 DQ53 160
C1040
C1041
C1042
C1043
C1044
C1045
C1046
C1047
C1048
C1049
C1050
C1051
C1052
C1053
C1054
C1055
C1056
C1057
C1058
C1059
C1060
B 161 VSS VSS 162 B

163 164 M_CLK_DDR1 M_CLK_DDR1 <4>
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 NC,TEST CK1 M_CLK_DDR#1
165 VSS CK1# 166 M_CLK_DDR#1 <4>
DDR_A_DQS#6 167 168
DDR_A_DQS6 DQS6# VSS DDR_A_DM6
169 DQS6 DM6 170
171 VSS VSS 172
DDR_A_D50 173 174 DDR_A_D54
175 DQ51 DQ55 176
177 VSS VSS 178
DDR_A_D56 179 180 DDR_A_D60
181 DQ57 DQ61 182
183 VSS VSS 184
DDR_A_DM7 185 186 DDR_A_DQS#7
DM7 DQS7# DDR_A_DQS7
187 VSS DQS7 188
DDR_A_D58 189 190
+3VS DDR_A_D59 DQ58 VSS DDR_A_D62
191 DQ59 DQ62 192
193 194 DDR_A_D63
+0.9VS CLK_SMBDATA VSS DQ63
RP1 RP2
2009-5-27 modify <8> CLK_SMBDATA
CLK_SMBCLK
195
197
SDA VSS 196
198 R1347 1 2 10K_0402_5%
<8> CLK_SMBCLK SCL SA0
DDR_A_RAS# DDR_A_BS1 R1349 1 2 10K_0402_5%
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1 8 8 1 199 VDDSPD SA1 200

DDR_CS#0 2 7 7 2 DDR_A_MA0 1 1
DDR_A_MA13 3 6 6 3 DDR_A_MA2 C1062 C1061
M_ODT0 4 5 5 4 DDR_A_MA4
201 G1 G2 202
47_0804_8P4R_5% 47_0804_8P4R_5% 2 2
RP3 RP4
DDR_A_BS0 1 8 8 1 DDR_A_MA6
DDR_A_MA10 2 7 7 2 DDR_A_MA7 TYCO_292525-4
DDR_A_MA1 3 6 6 3 DDR_A_MA11
DDR_A_MA3 4 5 5 4 DDR_A_MA14
47_0804_8P4R_5% 47_0804_8P4R_5%
DIMM_A(REV)
RP5 RP6 Layout Note:
M_ODT1 1 8 8 1 DDR_A_MA5 Place these resistor
DDR_CS#1 2 7 7 2 DDR_A_MA9
A closely DIMMA,all A
DDR_A_CAS# 3 6 6 3 DDR_A_MA8
DDR_A_WE# 4 5 5 4 DDR_A_MA12
trace length Max=1.0"
47_0804_8P4R_5% 47_0804_8P4R_5%
DDR_CKE1 1 R168 2
47_0402_5%
DDR_A_BS2 1 R64 2
47_0402_5%
DDR_CKE0 1 R59 2
47_0402_5% 2009/03/25 2009/06/22 Title
SCHEMATIC, MB A5732
Custom A
401784
5 4 3 2 1
5 4 3 2 1
+3VM_CK505 2009-8-10 modify +1.5VM_CK505

FSC FSB FSA CPU SRC PCI REF DOT_96 USB R94 0_0805_5% @ R102 0_0805_5%
+3VS
CLKSEL2 CLKSEL1 CLKSEL0 MHz MHz MHz MHz MHz MHz +3VS 1
R78
2
0_0805_5%
1 2 1 2 +1.5VS
1 1 1 1 1 1 1 1 1 1
10U_0805_10V6K~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
47P_0402_50V8J
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
10U_0805_10V6K~D
C151 C181 C175 C197 @ C936 C199 C155 C154 @ C182 @ C156 R112 R108
0 0 0 266 100 33.3 14.318 96.0 48.0
2.2K_0402_5% 2.2K_0402_5%
2 2 2 2 2 2 2 2 2 2 2N7002DW-T/R7_SOT363-6
0 0 1 133 100 33.3 14.318 96.0 48.0 Q10A
<12> ICH_SMBDATA 6 1 CLK_SMBDATA

0 1 0 200 100 33.3 14.318 96.0 48.0
2
+1.05VM_CK505
0 1 1 166 100 33.3 14.318 96.0 48.0 +3VS
D D
5
+VCCP 1 2
1 0 0 333 100 33.3 14.318 96.0 48.0 R131 0_0805_5% 1 1 1 1 1 1 1 1
C163 C198 C152 C153 C167 C189 C200 @ <12> ICH_SMBCLK 3 4 CLK_SMBCLK
C945
1 0 1 100 100 33.3 14.318 96.0 48.0 10U_0805_10V6K~D 0.1U_0402_16V4Z~D 0.1U_0402_16V4Z~D 0.1U_0402_16V4Z~D 0.1U_0402_16V4Z~D 0.1U_0402_16V4Z~D 0.1U_0402_16V4Z~D 47P_0402_50V8J
2 2 2 2 2 2 2 2 Q10B
2N7002DW-T/R7_SOT363-6
1 1 0 400 100 33.3 14.318 96.0 48.0
1 1 1 Reserved +3VS
SA000020K00 (Silego : SLG8SP556VTR ) Co-Layout circuit
SA000020H10 (ICS : ICS9LPRS387AKLFT) Silego,ICS +3VS De-pop R102,pop R94
2
R435 2009-8-10 modify Realtek +3VS,+1.5VS De-pop R94,pop R102
2009-08-04 modify 10K_0402_5% +1.5VM_CK505 +3VM_CK505
CLK_EN U11
1 1
9 CLK_SMBDATA
Q32 55 VDD_SRC
SDA
10 CLK_SMBCLK
CLK_SMBDATA <7> SRC PORT LIST
+VCCP SCL CLK_SMBCLK <7>
6 VDD_REF
2 CLK_CPU_BCLK
PORT DEVICE
2009-5-27 modify <29> CLK_ENABLE# 12 VDD_PCI CPU_0 71 CLK_CPU_BCLK <5>
2
R140
470_0402_5%~D DTC124EK_SC59 72 VDD_CPU CPU_0# 70 CLK_CPU_BCLK#

CLK_CPU_BCLK# <5> SRC0 CPU_VGA
R138 CLK_CPU_HPLCLK
2009-08-04 modify SRC2 DMI
3
19 VDD_48 CPU_1 68 CLK_CPU_HPLCLK <5>
2.2K_0402_5%
1
FSA 2 CLK_CPU_HPLCLK#
1 27 VDD_PLL3 CPU_1# 67 CLK_CPU_HPLCLK# <5> SRC3
C <5> CPU_BSEL0 1
R147
2 +1.05VM_CK505
66 24 CPU_DREFCLK SRC4 PCIE_SATA C
VDD_CPU_IO SRC_0/DOT_96 CPU_DREFCLK <5>
0_0402_5%
SRC6 PCIE_WLAN
1
31 25 CPU_DREFCLK#
VDD_PLL3_IO SRC_0#/DOT_96# CPU_DREFCLK# <5>
@ R141
62
SRC7 PCIE_MCP
1K_0402_1% VDD_SRC_IO CPU_SSCDREFCLK
52
LCDCLK/27M 28 CPU_SSCDREFCLK <5> SRC8 CPU_XDP
2
VDD_SRC_IO CPU_SSCDREFCLK#
23
LCDCLK#/27M_SS 29 CPU_SSCDREFCLK# <5> SRC9 PCIE_LAN
VDD_IO
+VCCP
2009-08-04 modify 38 32 CLK_CPU_EXP
CLK_CPU_EXP <4>
SRC10 PCIE_TigerPoint
VDD_SRC_IO SRC_2
<12> CLK_ICH_48M 1 R137 2 SRC11 PCIE_WWAN
33_0402_5% CLK_CPU_EXP#
2009-5-27 modify SRC_2# 33 CLK_CPU_EXP# <4>
2
2 1
R81 5P_0402_50V8C @ C832 FSA 20 USB_0/FS_A
R86 470_0402_5%~D FSB 2
SRC_3 35 2009-08-17 modify
FS_B/TEST_MODE
1K_0402_1% 1 R101 2 36
1
FSB 2 <12> CLK_ICH_14M 33_0402_5% FSC SRC_3#

1 1 2 7 REF_0/FS_C/TEST_
C392 10P_0402_50V8J~D
1 2 @ 8 39 CLK_PCIE_SATA
<5> CPU_BSEL1 REF_1 SRC_4 CLK_PCIE_SATA <11>
R91 CLK_EN
0_0402_5% 40 CLK_PCIE_SATA# +3VS
SRC_4# CLK_PCIE_SATA# <11>
1
1 2 1 CKPWRGD/PD#
@ R82 <5,12,19,29> VGATE 0_0402_5% @ R1327 R139
2009-08-04 modify 11 57 CLK_PCIE_WLAN WWAN_REQ#11 2 1 10K_0402_5%
NC SRC_6 CLK_PCIE_WLAN <14>
0_0402_5% R84
56 CLK_PCIE_WLAN# WLAN_CLKREQ# 2 1 10K_0402_5%
CLK_PCIE_WLAN# <14>
2
SRC_6# R111
H_STP_CPU# 53 CLKREQ_LAN# 2 1 10K_0402_5%
<12> H_STP_CPU# CPU_STOP# CLK_PCIE_MCP R113
SRC_7 61 CLK_PCIE_MCP <14>
H_STP_PCI# 54 MCP_CLKREQ# 2 1 10K_0402_5%
<12> H_STP_PCI# PCI_STOP# CLK_PCIE_MCP# R121
SRC_7# 60 CLK_PCIE_MCP# <14>
+VCCP H_STP_CPU# 2 1 10K_0402_5%
B CLK_XTAL_IN 5 R124 B
XTAL_IN CPU_ITP H_STP_PCI#
2009-5-27 modify SRC_8/CPU_ITP 64 CPU_ITP <4> 2 1 10K_0402_5%
2
CLK_XTAL_OUT 4
@ R97 XTAL_OUT CPU_ITP#
SRC_8#/CPU_ITP# 63 CPU_ITP# <4>
Schematic Note: 07/17
R100 470_0402_5%~D
10K_0402_5%
33 ohm series-resistor need add for singal end clock. CLK_PCIE_LAN
13 44 CLK_PCIE_LAN <18>
1
FSC PCI_1 SRC_9

2 1
PCI2_TME 14 45 CLK_PCIE_LAN#
PCI_2 SRC_9# CLK_PCIE_LAN# <18>
<5> CPU_BSEL2 1 2
R95 15
0_0402_5% R1334 33_0402_5% PCI_3 CLK_PCIE_ICH
SRC_10 50 CLK_PCIE_ICH <12> REQ PORT LIST
1
1 2 PCI4_SEL 16
<19> CLK_PCI_LPC PCI_4/SEL_LCDCL
@ R98 51 CLK_PCIE_ICH#
R1335 SRC_10# CLK_PCIE_ICH# <12>
10P_0402_50V8J~D
10P_0402_50V8J~D
<10> CLK_PCI_ICH 1 2 33_0402_5% ITP_EN 17 PCIF_5/ITP_EN

0_0402_5%
2009-5-27 modify C1012
1 1
C1013 48 CLK_PCIE_WWAN PORT DEVICE
CLK_PCIE_WWAN <14>
2
SRC_11
@ @
For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP# 2 2
18 VSS_PCI SRC_11# 47 CLK_PCIE_WWAN#
CLK_PCIE_WWAN# <14> REQ_3#
For PCI4_SEL, 0 = Pin24/25 : DOT96 / DOT96# 3 VSS_REF REQ_4#
Pin28/29 : LCDCLK / LCDCLK#
1 = Pin24/25 : SRC_0 / SRC_0#
22 VSS_48 CLKREQ_3# 37 REQ_6# PCIE_WLAN
Pin28/29 : 27M/27M_SS 26 VSS_IO CLKREQ_4# 41 REQ_7# PCIE_MCP
WLAN_CLKREQ#
For PCI2_TME:0=Overclocking of CPU and SRC allowed
69 VSS_CPU CLKREQ_6# 58 WLAN_CLKREQ# <14> REQ_9# PCIE_LAN
MCP_CLKREQ#
(ICS only) 1=Overclocking of CPU and SRC NOT allowed 30 VSS_PLL3 CLKREQ_7# 65 MCP_CLKREQ# <14> REQ_10#
CLKREQ_LAN#
34 VSS_SRC CLKREQ_9# 43 CLKREQ_LAN# <18> REQ_11# PCIE_WWAN
+3VS +3VS +3VS 59 VSS_SRC SLKREQ_10# 49 REQ_A#
42 46 WWAN_REQ#11
VSS_SRC CLKREQ_11# WWAN_REQ#11 <14>
2
A A
CLK_XTAL_IN R129 @ R119 R109 73 21
C169 22P_0402_50V8J VSS USB_1/CLKREQ_A#
1
10K_0402_5% 10K_0402_5% 10K_0402_5%

Y6 SLG8SP556VTR_QFN72_10X10
1
14.31818MHZ_16PF_DSX840GA
ITP_EN PCI4_SEL PCI2_TME
2
CLK_XTAL_OUT
C162 22P_0402_50V8J
2
@ R132 R117 @ R110

Routing the trace at least 10mil Issued Date 2007/10/15 Deciphered Date 2009/06/22 Title
10K_0402_5% 10K_0402_5% 10K_0402_5%

SCHEMATIC, MB A5732
1
A
401784
5 4 3 2 1
5 4 3 2 1
+LCDVDD +5VALW LCD POWER CIRCUIT
2
R70 R63
470_0805_5% 1M_0402_5%
D D
+3VS +5VALW +CAM_VDD
6 2
1
+LCDVDD +LCDVDD_R +3VS +3VS_LCD +3VS +VMIC
L21 L22 L37
W=60mils R35 W=20mils
Q29A Q3 1 2 1 2 1 2 1 2
3
S
R73 G 1
2 1 2 2 AO3413_SOT23 FBMA-L11-201209-221LMA30T_0805 1 0_0603_5% FBMA-L11-201209-221LMA30T_0805 1 FBMA-L11-201209-221LMA30T_0805 1
2N7002DW-T/R7_SOT363-6 100K_0402_5% +LCDVDD C398 C45
C397 0.1U_0402_16V4Z~D C399 C647
D
W=60mils
1
1
4.7U_0805_10V4Z~D 0.1U_0402_16V4Z~D 2 0.1U_0402_16V4Z~D 0.1U_0402_16V4Z~D
3
2 2 2
2 1
Q29B C395 @ C396
<5> GMCH_LVDDEN 5 C394
4.7U_0805_10V4Z~D 0.1U_0402_16V4Z~D
2
1 2
4
R72 1000P_0402_50V7K
100K_0402_5% 2N7002DW-T/R7_SOT363-6
+3VS
LCD/PANEL BD. Conn.

1
@ R1168 +3VS (TouchScreen)

2 1 2009-4-15
1
08/04 +CAM_VDD +LCDVDD_R INVPWR_B+ +3VS_LCD +VMIC
1
0_0402_5% R69 R65
(TouchScreen) R60
JP24
@ WCM2012F2S-900T04_0805 4.7K_0402_5% 2.2K_0402_5% 2.2K_0402_5%
<12> USB20_P6_TS 3 3 4 4 42 41
2
GND GMD
40 39
2
40 39
38 38 37 37
2 USB20_TS_P
C
<12> USB20_N6_TS 2 1 1 USB20_TS_N
36 36 35 35 EDID_CLK_LCD <5> C
34 34 33 33 EDID_DAT_LCD <5>
L65 32 31 R44
<5> LVDSA0+ 32 31
@ R1169 30 29 1 2
<5> LVDSA0- 30 29 LVDSA1+ <5>
2 1 28 28 27 27 LVDSA1- <5>
26 25 0_0402_5%
<5> LVDSA2+ 26 25
0_0402_5% LVDC+ R1027 2 0_0402_5%
<5> LVDSA2- 24
22
24 23 23
21 LVDC- R1026
1
2 1 0_0402_5%
LVDSAC+ <5> @ 2009-08-13 modify
22 21 LVDSAC- <5> WCM2012F2S-900T04_0805
<15> MIC_DATA 20 20 19 19
<15> MIC_CLK L25 1 2 18 17 USBP3 4 3 USB20_P3 <12>
FBMA-L10-160808 301LMT_0603 18 17 4 3
16 16 15 15
14 14 13 13
12 11 USBN3 1 2 USB20_N3 <12>
12 11 1 2
10 10 9 9
BKOFF# 8 7 L64
<19> BKOFF# 8 7 INVT_PWM <19>
6 6 5 5
@ 1 1 @ 4 3 LCD_TST LCD_TST <19>
4 3 R46
2 2 1 1 1
C229 C230 1 2
1 C231
100P_0402_50V8J 2 2 100P_0402_50V8J ACES_87242-4001-09 C600 0_0402_5%
100P_0402_50V8J 2 100P_0402_50V8J
Change to SP02000MD00
2
07/17 BITS
B B
B+ L18 INVPWR_B+
FBMA-L11-201209-221LMA30T_0805
2 1
2009-08-17 modify
1 1
C85 C393 LVDSAC+
68P_0402_50V8J~D 0.1U_0603_25V7K LVDSAC-

2 2
@ C232
100P_0402_50V8J
@ C233
100P_0402_50V8J
@ Q80
SI3457BDV-T1-E3_TSOP6~D 1 1
D
6
40mil
S
4 5
2 2
2
1 40mil
G
1
1
1 @ C830
3
@C829
@ C829 @ R1158
0.1U_0603_50V4Z~D
1000P_0402_50V7K~D 100K_0402_5% 2
2
2
PWR_SRC_ON
@ Q81
A RHU002N06_SOT323-3~D A
D
1 2 1 3
@R1159
@ R1159 100K_0402_5%
G
2
BKOFF#
SCHEMATIC, MB A5732
A
401784
5 4 3 2 1
5 4 3 2 1
D D
+3VS U34A TGP
A5 PAR AD0 B22

8.2K_0402_5% R1220 PCI_DEVSEL# B15 D18
CLK_PCI_ICH DEVSEL# AD1
<8> CLK_PCI_ICH J12 PCICLK AD2 C17
R1322
<19> PCI_RST# 1 2 A23 PCIRST# AD3 C18
2
0_0402_5% PCI_IRDY# B7 B17

R1154 8.2K_0402_5%
8.2K_0402_5% R1221 IRDY# AD4
C22 PME# AD5 C19
PCI_SERR# B11 B18
100K_0402_5% R1222 PCI_STOP# SERR# AD6
F14 STOP# AD7 B19
8.2K_0402_5% R1224 PCI_PLOCK# A8 D16
1
8.2K_0402_5% R1223 PCI_TRDY# PLOCK# AD8

A10 TRDY# AD9 D15
8.2K_0402_5% R1225 PCI_PERR# D10 A13
8.2K_0402_5% R1226 PCI_FRAME# PERR# AD10
A16 FRAME# AD11 E14
8.2K_0402_5% R1227 H14
C
AD12 C
AD13 L14
AD14 J14
A18 GNT1# AD15 E10
E16 GNT2# AD16 C11
AD17 E12
PCI_REQ1# G16 B9
8.2K_0402_5% R1228 PCI_REQ2# A20
REQ1# PCI AD18
B13
8.2K_0402_5% R1229 REQ2# AD19
AD20 L12
AD21 B8
G14 GPIO48/STRAP1# AD22 A3
A2 GPIO17/STRAP2# AD23 B5
C15 GPIO22 AD24 A6
10K_0402_5% R1230 C9 G12
10K_0402_5% R1231 GPIO1 AD25
CLK_PCI_ICH H12
AD26
1
R1233 R1234 C8
R1232 AD27
10K_0402_5% 10K_0402_5% D9
@ 33_0402_5% PCI_PIRQA# AD28
@ @ B2 C7
8.2K_0402_5% R1235 PCI_PIRQB# PIRQA# AD29
D7 PIRQB# AD30 C1
1 8.2K_0402_5% R1236 PCI_PIRQC# B3 B1
2
8.2K_0402_5% R1237 PCI_PIRQD# PIRQC# AD31

H10 PIRQD#
C955 8.2K_0402_5% R1238 PCI_PIRQE# E8
@ 22P_0402_50V8J 8.2K_0402_5% R1239 PCI_PIRQF# PIRQE#/GPIO2
D6 PIRQF#/GPIO3
2 8.2K_0402_5% R1240 PCI_PIRQG# H8 PIRQG#/GPIO4 C/BE0# H16
For EMI, close to TigerPoint 8.2K_0402_5% R1241 PCI_PIRQH# F8 M15
8.2K_0402_5% R1242 PIRQH#/GPIO5 C/BE1#
C/BE2# C13
D11 STRAP0# C/BE3# L16
K9 RSVD01
R1243 8.2K_0402_5% R1244 M13
10K_0402_5% 8.2K_0402_5% R1245 RSVD02
B 1 B
@
TIGERPOINT_ES1_BGA360
A A

SCHEMATIC, MB A5732
A
401784
5 4 3 2 1
5 4 3 2 1
D D
U34C TGP
R12 RSVD03 SATA0RXN AE6 SATA_IRX_DTX_N0 <17>

AE20 RSVD04 SATA0RXP AD6 SATA_IRX_DTX_P0 <17>
AD17 AC7 SATA_ITX_C_DRX_N0_R 0.01U_0402_16V7K C956
RSVD05 SATA0TXN SATA_ITX_C_DRX_P0_R SATA_ITX_C_DRX_N0 <17>
AC15 AD7 0.01U_0402_16V7K C957
RSVD06 SATA0TXP SATA_ITX_C_DRX_P0 <17>
AD18 RSVD07 SATA1RXN AE8
Y12 RSVD08 SATA1RXP AD8
AA10 RSVD09 SATA1TXN AD9
AA12 RSVD10 SATA1TXP AC9
Y10 RSVD11
AD15 RSVD12
SATA
W10 RSVD13
V12 RSVD14
C C
AE21 RSVD15
AE18 RSVD16
AD19 RSVD17
U12 RSVD18
SATA_CLKN AD4 CLK_PCIE_SATA# <8>
AC17 RSVD19 SATA_CLKP AC4 CLK_PCIE_SATA <8> +3VS
AB13 RSVD20
AC13 RSVD21 SATARBIAS# AD11 R1247
AB15 AC11 SATARBIAS R1246 24.9_0402_1%
RSVD22 SATARBIAS SATA_LED# SATA_LED#
Y14 RSVD23 SATALED# AD25 SATA_LED# <21>
10K_0402_5%
AB16 RSVD24
AE24 Close to TigerPoint R1248
RSVD25 pin U16 GATEA20
AE23 RSVD26 10K_0402_5%
R1249
AA14 U16 GATEA20 GATEA20 <19> SERIRQ
RSVD27 A20GATE H_A20M#
V14 RSVD28 A20M# Y20 H_A20M# <5> 10K_0402_5%
CPUSLP# Y21
Y18 H_IGNNE#
IGNNE# H_IGNNE# <5> +VCCP
AD16 RSVD29 INIT3_3V# AD21
AB11 AC25 H_INIT#
RSVD30 INIT# H_INIT# <5>
+3VS AB10 AB24 H_INTR
RSVD31 INTR H_INTR <5> 56 ohm5% pull-up resistor has
HOST
1
Y22 H_FERR#
FERR# H_FERR# <5>
R1250 8.2K_0402_5% AD23 GPIO36 NMI T17 H_NMI
H_NMI <5>
R1251 to be within 1" from the Tiger
AC21 KB_RST#
RCIN#
AA16 SERIRQ
KB_RST# <19>
56_0402_5% Point chipset.
SERIRQ SERIRQ <19>
AA21 H_SMI#
H_SMI# <5>
2
SMI# H_STPCLK#
STPCLK# V18 H_STPCLK# <5>
THRMTRIP# AA20 H_THERMTRIP# <5>
B B
ESD request
H_A20M# C450 @
1 2 100P_0402_50V8J
H_IGNNE# C451 @
1 2 100P_0402_50V8J
+VCCP
H_INIT# C452 @
1 2 100P_0402_50V8J
H_INTR C453 @
1 2 100P_0402_50V8J
R198
56_0402_5% H_FERR# C454 @
1 2 100P_0402_50V8J
H_NMI C455 @
1 2 100P_0402_50V8J
H_FERR#
H_SMI# C456 @
1 2 100P_0402_50V8J
Close to TigerPoint H_STPCLK# C457 @
1 2 100P_0402_50V8J
pin Y22
A A

SCHEMATIC, MB A5732
Custom A
401784
5 4 3 2 1
5 4 3 2 1
USB Port List

0 USB1(Right)
PCIE Port List 2009-08-13 modify 1 USB2(Left)
2009-08-24 modify
1 LAN 2 USB3(Left)
2 3 Camera
WLAN WWAN
4
2009-08-24 modify 3 WWAN
D 5 BT D
4 Broadcom 6 WLAN
U34D TGP 2009-08-13 modify 7 CardReader
AA5 T15 GPIO0
LDRQ1#/GPIO23 BMBUSY#/GPIO0 GPIO6
<19> LPC_AD0 V6 LAD0/FWH0 GPIO6 W16
LPC
SLPIOVR# U34B TGP
<19> LPC_AD1 AA6 LAD1/FWH1 GPIO7 W14 SLPIOVR# <4>
Y5 K18 EC_SMI#
<19> LPC_AD2 LAD2/FWH2 GPIO8 EC_SMI# <19>
W8 H19 EC_SCI# R23 H7 USB20_N0
<19> LPC_AD3 LAD3/FWH3 GPIO9 EC_SCI# <19> <4> DMI_TX#0 DMI0RXN USBP0N USB20_N0 <21>
C416 Y8 M17 ACIN_C R24 H6 USB20_P0
LDRQ0# GPIO10 <4> DMI_TX0 DMI0RXP USBP0P USB20_P0 <21>
10P_0402_50V8J~D Y4 A24 GPIO12 P21 H3 USB20_N1
<19> LPC_FRAME# LFRAME#/FWH4 GPIO12 <4> DMI_RX#0 DMI0TXN USBP1N USB20_N1 <21>
2 1 @ GPIO13 C23 EC_LID_OUT#
EC_LID_OUT# <19> <4> DMI_RX0 P20 DMI0TXP USBP1P H2 USB20_P1
USB20_P1 <21>
33_0402_5% 1 R1259 2 P6 P5 GPIO14 T21 J2 USB20_N2
<15> HDA_BITCLK_AUDIO R1261 2 HDA_BIT_CLK GPIO14 <4> DMI_TX#1 DMI1RXN USBP2N USB20_N2 <21>
33_0402_5% 1 U2 E24 GPIO15 T20 J3 USB20_P2
<15> HDA_RST_AUDIO# HDA_RST# GPIO15 <4> DMI_TX1 DMI1RXP USBP2P USB20_P2 <21>
1 0_0402_5%
AUDIO
33_0402_5% 1 R1262 2 W2 AB20 2 R1263 T24 K6 USB20_N3
<15> HDA_SDIN0 HDA_SDIN0 DPRSLPVR PM_DPRSLPVR <5> <4> DMI_RX#1 DMI1TXN USBP3N USB20_N3 <9>
V2 Y16 T25 K5 USB20_P3
HDA_SDIN1 STP_PCI# H_STP_PCI# <8> <4> DMI_RX1 DMI1TXP USBP3P USB20_P3 <9>
DMI
P8 AB19 T19 K1 USB20_N4
33_0402_5% R1260 2 HDA_SDIN2 STP_CPU# H_STP_CPU# <8> DMI2RXN USBP4N USB20_N4 <14>
1 AA1 R3 T18 K2 USB20_P4
<15> HDA_SDOUT_AUDIO HDA_SDOUT GPIO24 DMI2RXP USBP4P USB20_P4 <14>
33_0402_5% 1 R1264 2 Y1 C24 1 R1265 2 U23 L2 USB20_N5
<15> HDA_SYNC_AUDIO HDA_SYNC GPIO25 DMI2TXN USBP5N USB20_N5 <14>
AA3 D19 1K_0402_1% U24 L3 USB20_P5
<8> CLK_ICH_14M
1
CLK14 GPIO26 DMI2TXP USBP5P USB20_N6 USB20_P5 <14>

GPIO27 D20 V21 DMI3RXN USBP6N M6 USB20_N6 <14>
R1266 U3 F22 V20 M5 USB20_P6
@ 33_0402_5% EE_CS GPIO28 PM_CLKRUN# DMI3RXP USBP6P USB20_N7 USB20_P6 <14>
AE2 EE_DIN CLKRUN# AC19 V24 DMI3TXN USBP7N N1 USB20_N7 <21>
T6 U14 V23 N2 USB20_P7
1 V3
EE_DOUT EPROM GPIO33
AC1
DMI3TXP USBP7P USB20_P7 <21>
2
EE_SHCLK GPIO34 GPIO38

GPIO38 AC23
@ C959 T4 AC24 GPIO39 D4 USB_OC#0
22P_0402_50V8J LAN_CLK GPIO39 OC0# USB_OC#0 <21>
USB_OC#1
USB
2 P7 LANR_RSTSYNC <18> PCIE_PTX_IRX_N1 K21 PERN1 OC1# C5 USB_OC#1 <21>
B23 AB22 H_PWRGD K22 D3 USB_OC#2
For EMI, Close to TigerPoint LAN_RST# CPUPWRGD/GPIO49 H_PWRGD <4,5> <18> PCIE_PTX_IRX_P1 PERP1 OC2# USB_OC#2 <21>
AA2 C996 0.1U_0402_10V7K PCIE_ITX_C_PRX_N1_R J23 D2 USB_OC#3
LAN
MISC
C LAN_RXD0 EC_THERM# <18> PCIE_ITX_C_PRX_N1 C997 0.1U_0402_10V7K PCIE_ITX_C_PRX_P1_R PETN1 OC3# USB_OC#4 C
AD1 LAN_RXD1 THRM# AB17 EC_THERM# <19> <18> PCIE_ITX_C_PRX_P1 J24 PETP1 OC4# E5
AC2 V16 VGATE M18 E6 USB_OC#5
LAN_RXD2 VRMPWRGD <14> PCIE_PTX_IRX_N2 PERN2 OC5#/GPIO29
W3 AC18 MCH_SYNC# M19 C2 USB_OC#6
LAN_TXD0 MCH_SYNC# <14> PCIE_PTX_IRX_P2 PERP2 OC6#/GPIO30
T7 E21 PBTN_OUT# C960 0.1U_0402_10V7K PCIE_ITX_C_PRX_N2_R K24 C3 USB_OC#7
LAN_TXD1 PWRBTN# PBTN_OUT# <19> <14> PCIE_ITX_C_PRX_N2 PETN2 OC7#/GPIO31
U4 H23 ICH_RI# C961 0.1U_0402_10V7K PCIE_ITX_C_PRX_P2_R K25
LAN_TXD2 RI# T42 <14> PCIE_ITX_C_PRX_P2 PETP2
SUS_STAT#/LPCPD# G22 2009-5-27 <14> PCIE_PTX_IRX_N3 L23 PERN3 2009-08-13 modify
PCI-E
RTCX1 W4 D22 T43 L24
RTC
RTCX1 SUSCLK <14> PCIE_PTX_IRX_P3 PERP3

RTCX2 V5 G18 SYS_RST# C962 0.1U_0402_10V7K PCIE_ITX_C_PRX_N3_R L22 G2
RTCRST# RTCX2 SYS_RESET# PLTRST# <14> PCIE_ITX_C_PRX_N3 C963 0.1U_0402_10V7K PCIE_ITX_C_PRX_P3_R PETN3 USBRBIAS USBRBIAS R1267
T5 RTCRST# PLTRST# G23 PLTRST# <4,5,14,18,19> <14> PCIE_ITX_C_PRX_P3 M21 PETP3 USBRBIAS# G3
C25 ICH_PCIE_WAKE# P17 22.6_0402_1%
WAKE# ICH_PCIE_WAKE# <14> <14> PCIE_PTX_IRX_N4 PERN4
SMBALERT# E20 T8 INTRUDER# P18
SMBALERT#/GPIO11 INTRUDER# <14> PCIE_PTX_IRX_P4 PERP4
<8> ICH_SMBCLK ICH_SMBCLK H18 U10 T_PWROK <14> PCIE_ITX_C_PRX_N4 C998 0.1U_0402_10V7K PCIE_ITX_C_PRX_N4_R N25
SMBCLK PWROK PETN4
SMB
<8> ICH_SMBDATA ICH_SMBDATA E23 AC3 EC_RSMRST#R <14> PCIE_ITX_C_PRX_P4 C999 0.1U_0402_10V7K PCIE_ITX_C_PRX_P4_R N24
LINKALERT# SMBDATA RSMRST# INTVRMEN PETP4 CLK_ICH_48M
H21 LINKALERT# INTVRMEN AD3 CLK48 F4 CLK_ICH_48M <8>
1
SMLINK0 F25 J16 SB_SPKR 0612 update netname
SMLINK0 SPKR SB_SPKR <15> R1268
SMLINK1 F24 SMLINK1 33_0402_5%
SLP_S3# H20 PM_SLP_S3# <19>
R2 E25 @
SPI_MISO SLP_S4# PM_SLP_S4# <19>
T1 F21 PM_SLP_S5# <19> 1
2
SPI_MOSI SLP_S5#
SPI
M8 SPI_CS#
P9 B25 PM_BATT_LOW# +1.5VS C964
SPI_CLK BATLOW# H_DPRSTP# R1269 24.9_0402_1% @ 22P_0402_50V8J
R4 SPI_ARB DPRSTP# AB23 H_DPRSTP# <5>
H_DPSLP# 2
DPSLP# AA18 H_DPSLP# <5> 1 2 H24 DMI_ZCOMP
F20 J22 For EMI, Close to TigerPoint
RSVD31 DMI_IRCOMP
<8> CLK_PCIE_ICH# W23 DMI_CLKN

<8> CLK_PCIE_ICH W24 DMI_CLKP
TIGERPOINT_ES1_BGA360 2
+3VALW
B
2.2K_0402_5% 1 R1273 2 ICH_SMBCLK B
2.2K_0402_5% 1 R1274 2 ICH_SMBDATA
2009-08-13 modify
10K_0402_5% 2 R1275 1 LINKALERT# +3VALW
0_0402_5%
10K_0402_5% 2 R1276 1 SMLINK0 USB_OC#3
R1277 T_PWROK 1 R1278 2 VGATE
10K_0402_5% 2 R1280 1 SMLINK1 10K_0402_5% 2 1 T_PWROK @
VGATE <5,8,19,29> USB_OC#4
10K_0402_5% 2 R1282 USB_OC#5
8.2K_0402_5% R1281 PM_BATT_LOW# 1 EC_RSMRST#R USB_OC#6
R1283
1 2 PCH_POK <5,19> USB_OC#7 R247 2
1K_0402_1% 1 R1284 2ICH_PCIE_WAKE# 1
0_0402_5% 10K_0402_5%
10K_0402_5% 2 R1285 1 SYS_RST#
8.2K_0402_5% USB_OC#0 1 R249 2
R1286 ICH_RI# +3VS D53 RB751V_SOD323
10K_0402_5%
10K_0402_5% 2 ACIN_C 2 1 ACIN
R1287 1 SMBALERT# ACIN <19,24> USB_OC#1
8.2K_0402_5% R1288 GPIO12
10K_0402_5% 2 R1289
1 MCH_SYNC#
+3VALW 2 1 2 1
RSMRST circuit USB_OC#2 1 R248 2
10K_0402_5%
8.2K_0402_5% R1292 SLPIOVR# R1291 @
8.2K_0402_5% R1293 GPIO14 R1290 R1298
8.2K_0402_5% R1295 GPIO38 10K_0402_5% 0_0402_5% 0_0402_5%
8.2K_0402_5% R1294 GPIO15
8.2K_0402_5% R1296 GPIO39 1 2
8.2K_0402_5% R1299 EC_LID_OUT# 08/10
8.2K_0402_5% R1300 GPIO0 Q82
EC_RSMRST#R (TouchScreen)
C
<19> EC_RSMRST# 3 1
+RTCBATT 8.2K_0402_5% R1301 GPIO6
E
1M_0402_5% 8.2K_0402_5% BAV99DW-7_SOT363 @ MMBT3906_SOT23-3
R1303 PM_CLKRUN#
R1302
2 INTRUDER# @ R88
B
1 1 2 +3VALW
1 2
R1304 @ 4.7K_0402_5% USB20_N6 1 2 USB20_N6_TS USB20_N6_TS <9>
2
1 R1305 2 INTVRMEN 0_0402_5%
332K_0402_1% R1306 D54B
@ 2.2K_0402_5% @ @ R93
@ D54A USB20_P6 1 2 USB20_P6_TS USB20_P6_TS <9>
+RTCBATT 1 R1307 2 RTCRST# BAV99DW-7_SOT363 0_0402_5%
1
20K_0402_5% R1308
C965
6
A 1 2 A
J9 Routing the trace at least 10mil
15P_0402_50V8J
1 2 @ 2.2K_0402_5%
2 1 RTCX1
3MM
@
10M_0402_5%
Y5
1
32.768K_1TJS125BJ4A421P
C966
R1309
1U_0603_10V4Z 2 NC IN 1
1 2
3 4
NC OUT Issued Date 2009/03/25 Deciphered Date 2009/06/22 Title
2
C967
15P_0402_50V8J THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, MB A5732
2 1 RTCX2 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom A
401784
5 4 3 2 1
5 4 3 2 1
TGP
D U34E U34F TGP D
+5VS +3VS
F12 +V5REF_RUN A1
VCC5REF VSS01
VSS02 A25
1
VSS03 B6
R1310 D55 VSS04 B10
F5 +V5REF_SUS B16
VCC5REF_SUS VSS05
100_0402_5% RB751V-40TE17_SOD323-2 VSS06 B20
Y6 +SATAPLL B24
VCCSATAPLL VSS07
2
VSS08 E18
0.01U_0402_16V7K
+V5REF_RUN VCCRTC AE3 +RTCBATT VSS09 F16
0.1U_0402_10V6K
VSS10 G4
1 Y25 +DMIPLL G8
C968 VCCDMIPLL 1 1 VSS11
C970
VSS12 H1
10mA +VCCP
C43
1U_0603_10V4Z VCCUSBPLL F6 VSS13 H4
2 VSS14 H5
2 2
VSS15 K4
14mA K8
1 VSS16
W18 0.1U_0402_10V6K K11
V_CPU_IO C971 VSS17
VSS18 K19
VSS19 K20
2 2009-6-24
+5VALW +3VALW 1.3A VSS20 L4
0.1U_0402_25V4Z~D
VCC1_5_1 AA8 +1.5VS VSS21 M7
1U_0603_10V4Z
1U_0603_10V4Z
0.1U_0402_25V4Z~D
VCC1_5_2 M9 1 VSS22 M11
2009-6-24
1
M20 1 1 1 1 N3
C974
C975
D56 POWER VCC1_5_3 VSS23
C972
C973
N22 C976 N12
R1311 VCC1_5_4 10U_0805_10V6K~D VSS24
VSS25 N13
2
10_0402_5% RB751V-40TE17_SOD323-2 2 VSS26 N14
2 2 2
VSS27 N23
2
+V5REF_SUS VSS28 P11
0.1U_0402_10V6K
C C
1U_0603_10V4Z
0.98A VSS29 P13
10U_0805_10V6K~D
1U_0603_10V4Z
VCC1_05_1 J10 +VCCP VSS30 P19
1 K17 R14
C977 VCC1_05_2 VSS31
P15 1 1 1 1 R22
C978
C979
C980
VCC1_05_3 VSS32
C981
0.1U_0402_10V6K VCC1_05_4 V10 VSS33 T2
2 VSS34 T22
VSS35 V1
2 2 2 2
VSS36 V7
0.29A VSS37 V8
H25 +3VS V19
0.1U_0402_10V6K
1U_0603_10V4Z
1U_0603_10V4Z
1U_0603_10V4Z
0.1U_0402_10V6K
VCC3_3_1 VSS38
VCC3_3_2 AD13 VSS39 V22
VCC3_3_3 F10 VSS40 V25
C982
C983
G10 1 1 1 1 1 W12
C984
C985
C986
VCC3_3_4 VSS41
VCC3_3_5 R10 VSS42 W22
VCC3_3_6 T9 VSS43 Y2
VSS44 Y24
2 2 2 2 2
VSS45 AB4
F18
0.13A AB6
VCCSUS3_3_1 VSS46
VCCSUS3_3_2 N4 +3VALW VSS47 AB7
1U_0603_25V6-K~D
1U_0603_25V6-K~D
VCCSUS3_3_3 K7 VSS48 AB8
VCCSUS3_3_4 F1 VSS49 AC8
1 1 1 VSS50 AD2
C988
C989
C987 AD10
VSS51
VSS52 AD20
0.1U_0402_10V6K AD24
2 2 2 VSS53
VSS54 AE1
VSS55 AE10
5 VSS56 AE25
B B
VSS57 G24
VSS58 AE13
Place closely pin Y25 within 100mlis. VSS59 F2
+1.5VS
R1312 AE16
RSVD32
0.01U_0402_16V7K
+DMIPLL
10U_0805_10V6K~D
1 2
4.7U_0603_6.3V6K~D
0_0805_5% 1 1
1
C990
C992
C991
2 2
2
Place closely pin Y6 within 100mlis.

+1.5VS
R1313
10U_0805_10V6K~D
2009-6-24
+SATAPLL
0.1U_0402_25V4Z~D
1 2
0_0805_5% 1 1
C993
C994
A A
2 2

SCHEMATIC, MB A5732
Custom A
401784
5 4 3 2 1
A B C D E
+3VS_WLAN
+1.5VS
BlueTooth Interface
0.01U_0402_25V7K~D
4.7U_0805_10V4Z~D
0.1U_0402_16V4Z~D
4.7U_0805_10V4Z~D
0.1U_0402_16V4Z~D
47P_0402_50V8J
47P_0402_50V8J
1 1
C195
C903
C98
1 1 1
C121
C118
C113
+3VS
C904
2 2
2 2 2 JP22 (MAX=200mA)
<19> BT_DET BT_DET 1 2 BT_ACTIVE#
1
Mini-Express Card for WLAN <19> BT_OFF#
WLAN_ACTIVE
BT_OFF#
BT_RADIO_OFF#
3
5
1
3
5
2
4
6
4
6 USB20_P5
USB20_N5
USB20_P5 <12>
1
<19> BT_RADIO_OFF# 7 7 8 8 USB20_N5 <12>

9 9 10 10
11 11 12 12 1
JP54 13 14
ICH_PCIE_WAKE# +3VS_WLAN R62 13 14
<12> ICH_PCIE_WAKE# 1 1 2 2 1 2 0_0805_5% +3VS C185 C186
WLAN_ACTIVE R118 1 2 0_0402_5% 3 4 15 16 4.7U_0805_10V4Z~D 0.1U_0402_16V4Z~D
BT_ACTIVE# R116 1 0_0402_5% 3 4 GNDGND 2
2 5 5 6 6 +1.5VS
<8> WLAN_CLKREQ# WLAN_CLKREQ# 7 8
7 8 ACES_91016-01441
9 9 10 10
<8> CLK_PCIE_WLAN# 11 11 12 12
<8> CLK_PCIE_WLAN 13 13 14 14
15 15 16 16
17 17 18 18
19 20 WL_OFF# WL_OFF# <19>
19 20 PLTRST#
21 21 22 22 PLTRST# <4,5,12,18,19>
<12> PCIE_PTX_IRX_N2 23 24 1 2
25
23 24
26 R83 0_0402_5% +3VS
<12> PCIE_PTX_IRX_P2 25 26
27 28 1 2
29
27 28
30 @ R348 0_0402_5% +3VALW
29 30
<12> PCIE_ITX_C_PRX_N2 31 31 32 32
33 34
<12> PCIE_ITX_C_PRX_P2
35
37
33
35
37
34
36
38
36
38
USB20_WLAN_N
USB20_WLAN_P
R1166
R1167
1
1
2 0_0402_5%
2 0_0402_5%
USB20_N6 <12>
USB20_P6 <12>
SIM Interface
+3VS_WLAN 39 39 40 40
1 2 41 42 +UICC_PWR
41 42 JP73
43 43 44 44
0.1U_0402_16V4Z~D C222 45 46 1
45 46 1
47 47 48 48 2 2
EC_TX R85 1 2 0_0402_5% 49 50 +3VS 3
<19> EC_TX 49 50 3
EC_RX R87 1 2 0_0402_5% 51 52 4
2 <19> EC_RX 51 52 4 2
5 5
53 54 UICC_CLK 6
GND1 GND2 6
7 7
UICC_DATA 8
ACES_88910-5204 UICC_VPP 8
9 9
UICC_RESET 10 10
11 GND
+3VS_WWAN 12 GND
ACES_87036-1001-CP
4.7U_0805_10V4Z~D
0.1U_0402_16V4Z~D
47P_0402_50V8J
C196
C106
C905
1 1
2 2
Mini-Express Card for Broadcom MCP

+3VS +1.5VS
1 1 1
Mini-Express Card for WWAN C401
4.7U_0805_10V4Z~D
C411
0.1U_0402_16V4Z~D
C409 C412
4.7U_0805_10V4Z~D 0.1U_0402_16V4Z~D 0.01U_0402_25V7K

C135
2 2 2
3 +3VS_WWAN 3
+UICC_PWR
W=120mils J5
JP56
0_0402_5%1
<19> EC_SWI# @R135
@ R135 1 2 2 +3VS_WWAN 1 2 +3VS JP57 R1350
1 2 1 2
3 3 4 4 1 1 2 2 1 2 +3VS
5 6 JUMP_43X39 3 4 0_1206_5%
WWAN_REQ#11 5 6 3 4
<8> WWAN_REQ#11 7 7 8 8 5 5 6 6 +1.5VS
9 10 UICC_DATA <8> MCP_CLKREQ# MCP_CLKREQ# 7 8
CLK_PCIE_WWAN# 9 10 UICC_CLK 7 8
<8> CLK_PCIE_WWAN# 11 11 12 12 9 9 10 10
CLK_PCIE_WWAN 13 14 UICC_RESET 11 12
<8> CLK_PCIE_WWAN 13 14 <8> CLK_PCIE_MCP# 11 12
15 16 UICC_VPP 13 14
15 16 <8> CLK_PCIE_MCP 13 14
2009-08-24 modify 17
19
17 18 18
20
15
17
15 16 16
18
19 20 3G_OFF# <19> 17 18
R406 0_0402_5% 21 22 R14 1 2 PLTRST# 19 20
PCIE_PTX_IRX_N3 PCIE_C_RXN3 21 22 0_0402_5% 19 20 PLTRST#
<12> PCIE_PTX_IRX_N3 1 2 23 23 24 24 21 21 22 22 PLTRST# <4,5,12,18,19>
<12> PCIE_PTX_IRX_P3 PCIE_PTX_IRX_P3 1 2 PCIE_C_RXP3 25 26 <12> PCIE_PTX_IRX_N4 23 24
R407 0_0402_5% 25 26 23 24
27 27 28 28 <12> PCIE_PTX_IRX_P4 25 25 26 26
29 29 30 30 27 27 28 28
PCIE_ITX_C_PRX_N3 31 32 29 30
<12> PCIE_ITX_C_PRX_N3 31 32 29 30
PCIE_ITX_C_PRX_P3 33 34 31 32
<12> PCIE_ITX_C_PRX_P3 33 34 <12> PCIE_ITX_C_PRX_N4 31 32
35 35 36 36 USB20_N4 <12> <12> PCIE_ITX_C_PRX_P4 33 33 34 34
37 37 38 38 USB20_P4 <12> 35 35 36 36
+3VS_WWAN 39 39 40 40 37 37 38 38
1 2 41 41 42 42 +3VS 39 39 40 40
0.1U_0402_16V4Z~D C224 43 44 41 42
43 44 41 42
45 45 46 46 1 2 C413 43 43 44 44
47 48 0.1U_0402_16V4Z~D 45 46
EC_TX R114 1 0_0402_5% 47 48 45 46
2 49 49 50 50 47 47 48 48
EC_RX R115 1 2 0_0402_5% 51 52 49 50
51 52 49 50
51 51 52 52
53 GND1 GND2 54
4 4
53 GND1 GND2 54
ACES_88910-5204
ACES_88910-5204

SCHEMATIC, MB A5732
A
401784
A B C D E
A B C D E
+VDDA +VDDA
+3VS
1
R149
1
CH751H-40PT_SOD323-2
10K_0402_5%
@ R1160
C216
1
10K_0402_5%
2
1
2 1
@ D1
R293
(output = 150 mA)
2
1
@R1170
@ R1170 1U_0603_10V4Z C213 680P_0402_50V7K~D LINE_OUTL 0_0603_5%
10K_0402_5% 2 1
2
R152 C833 680P_0402_50V7K~D LINE_OUTR +5VS +5VAMP +VDDA
1
10K_0402_5%
C220
@ R1161
L15
2
1 1
1 2MONO_IN1 2 1 MONO_IN 10K_0402_5% @ U20 4.75V for LDO pop
R153 20K_0402_5% 1 2 60mil 1 IN
40mil
1U_0603_10V4Z 5
2
OUT
1
R155 FBMA-L11-201209-221LMA30T_0805 2
C218 GND
1U_0603_10V4Z
560_0402_5% C Q13 1 1
20K_0402_5%
1U_0603_10V4Z
<19> BEEP# 2 1 1 2 2 3 SHDN BYP 4 1
R151
C406
1 B 2SC2411KT146_SOT23-3 C405
C408
1U_0603_10V4Z E 10U_0805_10V6K~D APL5151-475BC-TRL_SOT23-5 1
2
@ C226
@C226 2 2 @C407
@C407
0.1U_0402_16V4Z~D 2
2 R156 0.01U_0402_25V7K~D
C219 2
560_0402_5%
<12> SB_SPKR 2 1 1 2
1
1U_0603_10V4Z
D13
@R154
@ R154 CH751H-40PT_SOD323-2
10K_0402_5% <BOM Structure>
2
2
Need to create symbol and footprint for Codec VA2
HD Audio Codec
FBMA-L11-160808-800LMT_0603
+AVDD_AC97 +VDDC
L23
1 2
40mil 20mil 0.1U_0402_16V4Z~D 1 2
+VDDA +3VS
10U_0805_10V6K~D C258
2 L24 2
1 1 1
C402
C170
1 1 1 FBMA-L11-160808-800LMT_0603
C210 C403
C404
2 2 2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
10U_0805_10V6K~D
2 2 2
0.1U_0402_16V4Z~D
25
38
9
U23 1 2
<BOM Structure> @ C174 1000P_0402_50V7K~D
DVDD
AVDD1
AVDD2
DVDD_IO
1 2
@ C385 1000P_0402_50V7K~D
14 35 C_LINE_OUTL 1 2 LINE_OUTL LINE_OUTL <16>

+MIC1_VREFO LINE2_L LOUT1_L C187 1U_0603_10V4Z
15 36 C_LINE_OUTR 1 2 LINE_OUTR LINE_OUTR <16>
LINE2_R LOUT_R C173 1U_0603_10V4Z
16 MIC2_L LOUT2_L 39
17 MIC2_R LOUT2_R 41
23 LINE1_L SPDIFO2 45
1
24 LINE1_R DMIC_CLK1/2 46 MIC_CLK <9>

R535 R533
4.7K_0402_5% 4.7K_0402_5% 18 43
LINE1_VREFO NC
X5R for audio
performance considering 20 44
2
LINE2_VREFO DMIC_CLK3/4
HDA_BITCLK_AUDIO <12>
19 MIC2_VREFO
BITCLK 6 1 2 1 2
3 R290 1 3
<16> MIC1_L 2 1K_0402_1% 2 1 C373 21 MIC1_L
@ R405 10_0402_5% @C400
@ C400 10P_0402_50V8J~D
2.2U_0603_6.3V6K~D
R331 1 2 1K_0402_1% 2 1 C387 22 8 1 2 HDA_SDIN0 <12>
<16> MIC1_R MIC1_R SDATA_IN
2.2U_0603_6.3V6K~D R133 39_0402_5%
MONO_IN 12 37
PCBEEP_IN MONO_OUT C376
29 2 1 C374 +MIC1_VREFO
CBP 2.2U_0603_6.3V6K~D
<12> HDA_RST_AUDIO# 11 RESET#
31 2.2U_0603_6.3V6K~D 2 1
CPVEE
<12> HDA_SYNC_AUDIO 10 SYNC 10mil
5
MIC1_VREFO 28 10mil +MIC1_VREFO 1
<12> HDA_SDOUT_AUDIO SDATA_OUT
32 1 2 HP_R HP_R <16> C183
HPOUT_R 0.1U_0402_16V4Z~D
<9> MIC_DATA 2 GPIO0/DMIC_DATA1/2 R15 2
3 GPIO1/DMIC_DATA3/4 CBN 30
R215 1 2 20K_0402_1% 13 75_0402_1%
<16> JACK_PLUG_MIC SENSE A
R310 1 2 5.1K_0402_1%~D 34 27 ACZ_VREF
<16> JACK_PLUG_HP SENSE B VREF
EAPD R96 1 2 0_0402_5% 47 40 ACZ_JDREF
<19> EAPD EAPD JDREF
48 33 1 2 HP_L HP_L <16>
SPDIFO1 HPOUT_L ACZ_VREF
4 26 R25 1 1
DVSS1 AVSS1 75_0402_1% ACZ_JDREF
7 DVSS2 AVSS2 42
C188 @ C192
1
1 2 ALC272-GR_LQFP48 10U_0805_10V6K~D 0.1U_0402_16V4Z~D
R79 0_0603_5% 2 2
DGND AGND R92
20K_0402_1% Close to codec
1 2
2
R281 0_0603_5%
4 4
1 2
R313 0_0603_5%
DGND AGND Security Classification Compal Secret Data Compal Electronics, Inc.
SCHEMATIC, MB A5732
Custom A
401784
A B C D E
A B C D E
APA2031A SPK Amplifier

GAIN0 GAIN1
0 0 6dB
0 1 10dB +5VAMP
1 0 15.6dB
1 1 21.6dB
1 1
+5VAMP +5VAMP
W=40mil
0.1U_0402_16V4Z~D
4.7U_0805_10V4Z~D
1 1 Close to Speaker CONN for ESD.
C375 C383
2
2
+3VALW
2
@ R713 R714 2 2
100K_0402_1% 100K_0402_1% D17 D18
1
PJDLC05_SOT23-3 PJDLC05_SOT23-3
2 1
2 1
GAIN0 GAIN1 R292
47K_0402_5%
R715 R716 U19
2
100K_0402_1% 100K_0402_1% 16 12
@ VDD NC EC_MUTE#
6 19 EC_MUTE# <19>
1
PVDD SHUTDOWN#
15
1
PVDD SPKL-
LOUT- 8
GAIN0 2 GAIN0 SPKR-
ROUT- 14
GAIN1 3 GAIN1 SPKL+
LOUT+ 4
R306 1 2 0_0402_5% INL_A 5 18 SPKR+

<15> LINE_OUTL LIN- ROUT+
R308 1 2 0_0402_5% INR_A 17 1 JP55
<15> LINE_OUTR RIN- GND
11 SPKL+ R225 1 2 0_0402_5% SPK_L1+ 1
GND SPKL- R219 0_0402_5% SPK_L1- 1
9 LIN+ GND 13 1 2 2 2
20 SPKR+ R205 1 2 0_0402_5% SPK_R1+ 3
GND SPKR- R195 0_0402_5% SPK_R1- 3
7 RIN+ GND 21 1 2 4 4
BYPASS 10
20mil FCI_10094351-004711LF
1 1 APA2031RI-TRL_TSSOP20 1 Speaker Conn.
1
2 R711 R712 2
@ C306 22P_0402_50V8J
@ C290 22P_0402_50V8J
@ C270 22P_0402_50V8J
@ C268 22P_0402_50V8J
C814 C813 C34
10K_0402_5%
10K_0402_5%
0.1U_0603_25V7K 0.1U_0603_25V7K 0.47U_0603_16VY5V 1 1 1 1

@ @ 2 2 2
2
2 2 2 2
1
R197
HeadPhone JACK JP60
0_0402_5%
@
<15> JACK_PLUG_HP 5 8
2
9
4 10
1 2 HPR 3
<15> HP_R
L50 BLM15AG121SN1D_0402
6
1 2 HPL 2
<15> HP_L
L51 BLM15AG121SN1D_0402 1
7
2
SINGA_2SJ1012-000111
1 1
@ C768 @C769
@ C769 JACK-AGND
1
10P_0402_50V8J~D 10P_0402_50V8J~D @ J7 @J8
@ J8
1
2 2
JUMP_43X39 JUMP_43X39
3 D45 3
2
1
PJDLC05_SOT23-3
2
Ext.MIC JACK
JP61
<15> JACK_PLUG_MIC 5 8
9
4 10
1 2 MIC1_R_1 3
<15> MIC1_R
L52 BLM15AG121SN1D_0402
6
1 2 MIC1_L_1 2
<15> MIC1_L
L53 BLM15AG121SN1D_0402 1
7
3
SINGA_2SJ1012-000111
1 1
@ C770 @C771
@ C771 JACK-AGND
2 2 D46
220P_0402_50V8J 220P_0402_50V8J PJDLC05_SOT23-3
1
4 4

SCHEMATIC, MB A5732
Custom A
401784
A B C D E
A B C D E F G H
For SATA HDD

JP48
1 GND
SATA_ITX_C_DRX_P0 2
<11> SATA_ITX_C_DRX_P0 A+
SATA_ITX_C_DRX_N0 3
1 <11> SATA_ITX_C_DRX_N0 A- 1
4 GND
SATA_IRX_DTX_N0 C414 2 1 0.01U_0402_16V7K SATA_IRX_C_DTX_N0 5
<11> SATA_IRX_DTX_N0 B-
SATA_IRX_DTX_P0 C415 2 1 0.01U_0402_16V7K SATA_IRX_C_DTX_P0 6
<11> SATA_IRX_DTX_P0 B+
7 GND
8 V33
9 V33
+3VS 10 V33
+5VS 11 GND
12 GND
13 GND
14 V5
15 V5
16 V5
1000P_0402_50V7K~D
0.1U_0402_16V4Z~D
10U_0805_10V6K~D
17 GND
1U_0603_10V4Z
18 Reserved
1 1 1 1 19 GND GND 23
C22
C19
20 V12 GND 24
C419
C410
21 V12
22 V12
2 2 2 2
OCTEK_SAT-22KH0B
Pleace near HDD CONN
2 2
POWER LED BATT CHARGE LED
+5VALW +5VALW
2
1 2 DC1 DC1 <21> 1 2 DC2 DC2 <21>
R314 820_0402_5%~D R886 R315 300_0402_5%
2
R883
1
R1104 100K_0402_5%
1
1
R1103 100K_0402_5%
3
3
1
100K_0402_5%
100K_0402_5% Q31B Q75B
2
5 5 2N7002DW-T/R7_SOT363-6
2
2N7002DW-T/R7_SOT363-6
6
6
4
4
3 3
Q31A Q75A
2 2N7002DW-T/R7_SOT363-6 2 2N7002DW-T/R7_SOT363-6
<19> PWR_LED# <19> CHARGE_LED#
1
1
2 1 2 1
@ R90 0_0402_5% @ R104 0_0402_5%
4 4

SCHEMATIC, MB A5732
Custom A
401784
A B C D E F G H
A B C D E
2009-08-24 modify U22
C132 2 1 0.1U_0402_16V7K PCIE_PTX_C_IRX_P1 20 33

<12> PCIE_PTX_IRX_P1 HSOP LED3/EEDO
34 LAN_10M#_EEDI 1 2 +3V_LAN
C138 2 LED2/EEDI/AUX
<12> PCIE_PTX_IRX_N1 1 0.1U_0402_16V7K PCIE_PTX_C_IRX_N1 21 HSON LED1/EESK 35 LAN_100M#_EESK R285 3.6K_0402_5%
4 EECS 4
EECS 32 1 2
PCIE_ITX_C_PRX_P1 15 R173 1K_0402_1%
<12> PCIE_ITX_C_PRX_P1 HSIP
38 LAN_ACTIVITY#
PCIE_ITX_C_PRX_N1 LED0
<12> PCIE_ITX_C_PRX_N1 16 HSIN
RTL8103EL-GR 2 LAN_MDI0+
MDIP0 LAN_MDI0-
<8> CLK_PCIE_LAN 17 REFCLK_P MDIN0 3
18 5 LAN_MDI1+
<8> CLK_PCIE_LAN# REFCLK_M MDIP1
6 LAN_MDI1-
+3VS MDIN1
<8> CLKREQ_LAN# 25 CLKREQB NC 8
NC 9
<4,5,12,14,19> PLTRST# 27 PERSTB NC 11
1
NC 12
R42
1K_0402_1% R193 1 2 2.49K_0402_1% 46 4 1 2
RSET NC C140 0.1U_0402_16V4Z~D
LAN_WAKE# 26 48 VCTRL12 1 2 +EVDD12
<19> LAN_WAKE#
2
ISOLATEB LANWAKEB VCTRL12A C131 10U_0805_10V6K~D

@
28 ISOLATEB
1 2 VDDTX 19
1
C139 30P_0402_50V8J LAN_X1 41 30 +LAN_VDD12
LAN_X2 CKXTAL1 DVDD12
42 CKXTAL2 DVDD12 36 1 1
R170 Y1 13 Close to Pin10,13,30,36 C136 C141
15K_0402_5% DVDD12
1 2 10 2 1
2
C127 30P_0402_50V8J DVDD12 C149 2
25MHz_20pF_6X25000017 1 0.1U_0402_16V4Z~D 1U_0402_6.3V4Z~D 1U_0402_6.3V4Z~D
C134 2 2 2
NC 39 1 0.1U_0402_16V4Z~D
C180 2 1 0.1U_0402_16V4Z~D
23 44 C190 0.1U_0402_16V4Z~D
NC NC @ C191 1
24 NC VCTRL12D 45 2 10U_0805_10V6K~D
C133 1 2 0.1U_0402_16V4Z~D
7 GND VDD33 29 Close to Pin45
14 GND VDD33 37
31 GND 1 2
47 1 R199 0_0402_5%
3 GND AVDD33 3
NC 40 1 2
22 43 R200 0_0402_5% +3V_LAN
GNDTX NC
1 2
R201 0_0402_5%
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
RTL8103EL-GR_LQFP48_7X7
2009-08-18 modify 2 2 2
C128
C137
C168
1 1 1
+3V_LAN RJ45 symbol need update

R148
1 2
1
C732 0_0603_5% JP71
470P_0402_50V7K~D
2
13 Unused
12 Yellow LED+
LAN_ACTIVITY# 2 1 14
R283 300_0402_5% Yellow LED-
1
C193
2 U21 2
2009-08-18 modify 68P_0402_50V8J~D
8 PR4-
LAN_MDI0+ R161 1 2
2 0_0402_5% LAN_MDI0+_R 1 RD+ RX+ 16 RJ45_MIDI0+ 7 PR4+
LAN_MDI0- R231 1 2 0_0402_5% LAN_MDI0-_R 2 15 RJ45_MIDI0-
C143 1 RD- RX-
2 0.01U_0402_25V7K LAN_CT0 3 CT CT 14 RJ45_CT0 1 2 RJ45_MIDI1- 6 PR2-
4 13 R229 75_0402_1%
NC NC
5 NC NC 12 5 PR3-
C129 1 2 0.01U_0402_25V7K LAN_CT1 6 11 RJ45_CT1 1 2
LAN_MDI1+ CT CT
R253 1 2 0_0402_5% LAN_MDI1+_R 7 TD+ TX+ 10 RJ45_MIDI1+ R162 75_0402_1% 1 4 PR3+
LAN_MDI1- R145 1 2 0_0402_5% LAN_MDI1-_R 8 9 RJ45_MIDI1-
TD- TX- C184 RJ45_MIDI1+ 3 PR2+
1000P_1206_2KV7~D
LEF8423A-R 2 RJ45_MIDI0- 2 PR1-
GND 15
RJ45_MIDI0+ 1 PR1+
GND 16
LAN_100M#_EESK 2 1 11
R144 300_0402_5% Orange LED-
1
C125 +3V_LAN 10 Green LED+
68P_0402_50V8J~D 9
2 Green LED-
2009-08-18 modify
SANTA_130451-A
LAN_10M#_EEDI 2 1
1 R157 300_0402_5%
C130
68P_0402_50V8J~D
2
1 1

SCHEMATIC, MB A5732
Custom A
401784
A B C D E
+3VALW +EC_AVCC FBMA-L11-160808-601LMT_2P +3VALW
L26
2 1
KEYBOARD
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
4.7U_0603_6.3V6K~D
1 1 1 1 1 1
C176 C166
<BOM Structure>
C147
C148
C150
C145
2 2 2 2 2
0.1U_0402_16V4Z~D
2
4.7U_0603_6.3V6K~D
CONN.
ECAGND R330 2 1
0_0402_5% JP13
KSI1 1
KSI7 1
2 2
111
125
KSI6
22
33
96
67
U27 3 3
9
KSO9 4
KSI4 4
5
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
KSI5 5
6 6
KSO0 7
R67 7
+3VS 1 2 10K_0402_5% KSI2 8 8
1 21 +3VALW KSI3 9
<11> GATEA20 GA20/GPIO00 INVT_PWM/PWM1/GPIO0F 9
1 2 2 23 BEEP# BEEP# <15> KSO5 10
<11> KB_RST# KBRST#/GPIO01 BEEP#/PWM2/GPIO10 10
R66 0_0402_5% 3 26 Ra KSO1 11
<11> SERIRQ SERIRQ# FANPWM1/GPIO12 11
2
For ESD. 4 27 ACOFF ACOFF <25> KSI0 12
<12> LPC_FRAME# LFRAME# ACOFF/FANPWM2/GPIO13 12
LPC_AD3 5 R122 KSO2 13
<12> LPC_AD3 LAD3 13
LPC_AD2 7 PWM Output 100K_0402_5% KSO4 14
<12> LPC_AD2 LAD2 14
LPC_AD1 8 63 BATT_TEMP <30> KSO7 15
<12> LPC_AD1 LAD1 BATT_TEMP/AD0/GPIO38 +5VS 15
@ R291 LPC_AD0 KSO8
<12> LPC_AD0 10 LAD0 LPC & MISC 64 BATT_OVP <25> 16
1
BATT_OVP/AD1/GPIO39 16
2 1 2 1 10_0402_5% ADP_I/AD2/GPIO3A 65 ADP_I <25>
KSO6 17 17
@C107
@ C107 22P_0402_50V8J 12 AD Input 66 BRD_ID KSO3 18
<8> CLK_PCI_LPC PCICLK AD3/GPIO3B 18
13 75 KSO12 19
<10> PCI_RST# PCIRST#/GPIO05 AD4/GPIO42 19
1
+3VALW 1 2 EC_RST# 37 76 KSO13 20
EC_SCI# ECRST# SELIO2#/AD5/GPIO43 R127 KSO14 20
<12> EC_SCI# 20 SCI#/GPIO0E 21 21
R321 38 8.2K_0402_5% KSO11 22
+5VALW 47K_0402_5% CLKRUN#/GPIO1D KSO10 22
1 DAC_BRIG/DA0/GPIO3C 68 23 23
1
C159 70 Rb KSO15 24
2
EN_DFAN1/DA1/GPIO3D R146 R143 24
DA Output IREF/DA2/GPIO3E 71 IREF <25>
1 2 EC_SMB_CK1 0.1U_0402_16V4Z~D KSI0 55 72 CHGVADJ <25> 4.7K_0402_5% 4.7K_0402_5%
R322 4.7K_0402_5% 2 KSI1 KSI0/GPIO30 DA3/GPIO3F
56 KSI1/GPIO31
1 2 EC_SMB_DA1 KSI2 57 25
2
R324 4.7K_0402_5% KSI3 KSI2/GPIO32 GND1
58 KSI3/GPIO33 PSCLK1/GPIO4A 83 EC_MUTE# <16> 26 GND2
KSI4 59 84 USB_EN# <21>
+3VS KSI5 KSI4/GPIO34 PSDAT1/GPIO4B ACES_85208-24071
60 KSI5/GPIO35 PSCLK2/GPIO4C 85
KSI6 61 PS2 Interface 86
KSI7 KSI6/GPIO36 PSDAT2/GPIO4D TP_CLK
62 KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E 87 TP_CLK <20>
R323 1 2 EC_SMB_CK2 KSO0 39 88 TP_DATA TP_DATA <20>
2.2K_0402_5% KSO1 KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F
40 KSO1/GPIO21
R320 1 2 EC_SMB_DA2 KSO2 41
2.2K_0402_5% KSO3 KSO2/GPIO22
42 KSO3/GPIO23 SDICS#/GPXOA00 97
KSO4 43 98 EN_WOL# EN_WOL# <22>
KSO5 KSO4/GPIO24 SDICLK/GPXOA01
KSO6
44 KSO5/GPIO25 Int. K/B SDIDO/GPXOA02 99
LID_SW#
45 KSO6/GPIO26 Matrix SDIDI/GPXID0 109 LID_SW# <21>
+3VALW KSO7 46 SPI Device Interface
KSO8 KSO7/GPIO27
47 KSO8/GPIO28
KSO9 FRD#SPI_SO
R71 47K_0402_1%~D KSO1 KSO10
48
49
KSO9/GPIO29 SPIDI/RD# 119
120 FWR#SPI_SI
FRD#SPI_SO <20> For EMI
KSO10/GPIO2A SPIDO/WR# FWR#SPI_SI <20>
KSO11 50 SPI Flash ROM 126 SPI_CLK
KSO11/GPIO2B SPICLK/GPIO58 SPI_CLK <20>
R80 47K_0402_1%~D KSO2 KSO12 51 128 FSEL#SPICS#
KSO12/GPIO2C SPICS# FSEL#SPICS# <20> 100P_1206_8P4C_50V8
KSO13
2009-5-27 modify KSO14
52
53
KSO13/GPIO2D KSO14 4 5
KSO15 KSO14/GPIO2E SUSP_DL KSO11
54 KSO15/GPIO2F CIR_RX/GPIO40 73 SUSP_DL <22> 3 6
VGATE R301 1 2 0_0402_5% 81 74 KSO10 2 7
<5,8,12,29> VGATE KSO16/GPIO48 CIR_RLC_TX/GPIO41
PM_1.8V_PWRGD R300 1 @ 2 0_0402_5% 82 89 KSO15 1 8
<27> PM_1.8V_PWRGD KSO17/GPIO49 FSTCHG/SELIO#/GPIO50 FSTCHG <25>
BT_DET 07/17
for KB926C/D chip BATT_CHGI_LED#/GPIO52 90
91
BT_DET <14> CP1
EC_SMB_CK1 CAPS_LED#/GPIO53 CHARGE_LED# 100P_1206_8P4C_50V8
<30> EC_SMB_CK1 77 SCL1/GPIO44 GPIO BATT_LOW_LED#/GPIO54 92 CHARGE_LED# <17>
EC_SMB_DA1 KSO6
<30> EC_SMB_DA1
EC_SMB_CK2
78
79
SDA1/GPIO45
SM Bus
SUSP_LED#/GPIO55 93
95 SYSON
2009-5-27 modify KSO3
4
3
5
6
<5> EC_SMB_CK2 SCL2/GPIO46 SYSON/GPIO56 SYSON <22,27>
EC_SMB_DA2 80 121 EC_RSMRST# <12> KSO12 2 7
<5> EC_SMB_DA2 SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 VR_ON <29>
127 KSO13 1 8
AC_IN/GPIO59 ACIN <12,24>
1
C831
2
100P_0402_50V8J @R76
@ R76 @ D24
2009-5-27 modify CP4
<12> PM_SLP_S3#
R120 1 2 0_0402_5% 6 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 100 R123 1 2 0_0402_5% 2 1 2 1 VGATE
07/17 R89 1 2 0_0402_5% 14 101 10K_0402_5% 100P_1206_8P4C_50V8
<12> PM_SLP_S5# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 EC_LID_OUT# <12>
EC_SMI# 15 102 EC_ON KSO8 4 5
<12> EC_SMI# EC_SMI#/GPIO08 EC_ON/GPXO05 EC_ON <20> RB751V-40_SOD323-2
LCD_TST 16 103 EC_SWI# @D14
@ D14 RB751V-40_SOD323-2 KSO7 3 6
<9> LCD_TST LID_SW#/GPIO0A EC_SWI#/GPXO06 EC_SWI# <14>
2 1 17 104 1 2 PCH_POK KSO4 2 7
SUSP#/GPIO0B ICH_PWROK/GPXO06 PCH_POK <5,12>
R1155 100K_0402_5% 18 GPO 105 KSO2 1 8
PBTN_OUT#/GPIO0C BKOFF#/GPXO08 BKOFF# <9>
BT_RADIO_OFF# 19 GPIO 106 WL_OFF# 1 2 1 2 +3VS
<14> BT_RADIO_OFF# EC_PME#/GPIO0D WL_OFF#/GPXO09 WL_OFF# <14> CP2
INVT_PWM 25 107 R106 0_0402_5% @@R107
R107 10K_0402_5%
<9> INVT_PWM EC_THERM#/GPIO11 GPXO10 3G_OFF# <14> 100P_1206_8P4C_50V8
28 FAN_SPEED1/FANFB1/GPIO14 GPXO11 108 BT_OFF# <14>
29 +3VALW KSI0 4 5
EC_TX FANFB2/GPIO15 KSO1
<14> EC_TX 30 EC_TX/GPIO16 3 6
EC_RX 31 110 KSO5 2 7
<14> EC_RX EC_RX/GPIO17 PM_SLP_S4#/GPXID1 PM_SLP_S4# <12>
2
32 112 KSI3 1 8
<20> ON/OFF# ON_OFF/GPIO18 ENBKL/GPXID2 GMCH_ENBKL <5>
34 114 R1153
<17> PWR_LED# PWR_LED#/GPIO19 GPXID3 EAPD <15> CP3
PLTRST# 1 2 EC_PLTRST# 36 GPI 115
<4,5,12,14,18> PLTRST# NUMLED#/GPIO1A GPXID4 EC_THERM# <12>
@R319
@ R319 0_0402_5% 116 SUSP# 100K_0402_5%
GPXID5 SUSP# <22,25,27,28> 100P_1206_8P4C_50V8
117 PBTN_OUT#
PBTN_OUT# <12>
1
GPXID6 KSI2
GPXID7 118 LAN_WAKE# <18> 4 5
XCLKI 122 KSO0 3 6
XCLKO XCLK1 V18R KSI5
123 XCLK0 V18R 124 2 7
KSI4 1 8
AGND
R327
GND
GND
GND
GND
GND
CP5
0.1U_0402_16V4Z~D
4.7U_0603_6.3V6K~D
XCLKI 1 2 XCLKO @
1 1
100P_1206_8P4C_50V8
C146
C144
20M_0603_5% @ KB926QFD3_LQFP128_14X14
11
24
35
94
113
69
<BOM Structure> KSO9 4 5

X4
KSI6 3 6
2 2
ECAGND
1 2 KSI7 2 7
KSI1 1 8
32.768KHZ_12.5P_1TJE125DP1A000M
1 1 CP6
C160 C161
27P_0402_50V8J 27P_0402_50V8J
2 2

SCHEMATIC, MB A5732
Custom A
401784
Need to create symbol and footprint for MX SPI ROM
Touch/B Connector
System SPI Flash ROM (16Mb)
+5VS
JP20 U28 R1068

1 R1067 1 2 0_0402_5% 5 2 1 2
1 <19> FWR#SPI_SI D Q FRD#SPI_SO <19>
<19> TP_CLK 2 2
3 R1069 1 2 33_0402_5% 6 0_0402_5%
<19> TP_DATA 3 <19> SPI_CLK C
4 4
5 R1070 1 2 0_0402_5% 1
GND <19> FSEL#SPICS# S
3
100P_0402_50V8J
100P_0402_50V8J
1U_0402_6.3V4Z~D
1 1 2 6 GND
+3VALW 7 HOLD
C749
C750
C177
ACES_88514-0441
1 3 W
2 2 1 C179
8 VCC VSS 4
D48 0.1U_0402_16V4Z~D
PJDLC05_SOT23-3 2
S IC FL 16M MX25L1605DM2I-12G
1
1
R305
10_0402_5%
@
2
1 1
C122 C119
22P_0402_50V8J 4.7P_0402_50VNPO
@ @
2 2
MB_Power On/Off SW +3VALW
1
R125
PUT ON TOP SIDE
100K_0402_5%
TJG-533-V-T/R_6P
2
D22
1
SW2 3 ON/OFFBTN# 1
2 ON/OFF# <19>
3 51_ON# <24>
2 4
CHN202UPT SC-70
6
5
1
1000P_0402_50V7K
1
1
D C158 D19
2 Q18
<19> EC_ON
G
2
S 2 RLZ20A_LL34
2
JP42 R126
1 ON/OFFBTN# 2N7002LT1G_SOT23-3
1 10K_0402_5%
2 2
3 1
1
GND C900
GND 4
ACES_88459-0271 0.1U_0402_25V6 SB770020010

2
3
D15
2009-08-18 modify
1
PJSOT24C_SOT23-3

SCHEMATIC, MB A5732
Custom A
401784
A B C D E
On Board USB Connector
@
D20 +USB_RIGHT
R17 2
1
+5VALW
2A +USB_RIGHT
1 2 1 1
3
0_0402_5%
U14
@ PJDLC05_SOT23-3 JP16
1 GND OC1# 8
2 7 WCM2012F2S-900T04_0805 1
IN OUT1 USBN0 VCC
3 EN1# OUT2 6 <12> USB20_N0 2 2 1 1 2 USB_N
1 4 5 USBP0 3
EN2# OC2# USB_OC#0 <12> USB_P
4 GND
C111 TPS2062ADR_SO8~D 3 4 5
<12> USB20_P0 3 4 GND
0.1U_0402_16V4Z~D 6
2 GND
L62 7 GND
8 GND
R36 1 1 SUYIN_020133MR004S536ZR
1 2 C21
C363 +
USB_EN# 0_0402_5%
150U_B2_6.3V-M~D 2 470P_0402_50V7K~D
2
2 2
+5VALW
2A +USB_LEFT
2009-08-13 modify
U7
1 GND OC1# 8 USB_OC#1 <12>
2 IN OUT1 7
3 EN1# OUT2 6
1 4 EN2# OC2# 5 USB_OC#2 <12>
C95 TPS2062ADR_SO8~D
0.1U_0402_16V4Z~D
2
1
@C77
@ C77
1000P_0402_50V7K~D
2
USB_EN#
<19> USB_EN#
+5VALW +5VS
@ D26
R41 2
1 2 1
+3VALW +3VS
0_0402_5%
3 2009-08-13 modify
JP25
PJDLC05_SOT23-3 USB20_N7 GMCH_CRT_R
3
2009-08-13 modify @ L66
<12> USB20_N7
USB20_P7
2
4
2 1 1
3
GMCH_CRT_R <5> 3
<12> USB20_P7 4 3
3 4 6 5 GMCH_CRT_G
<12> USB20_N1 3 4 6 5 GMCH_CRT_G <5>
USBN1 8 7
USBP1 8 7 GMCH_CRT_B
10 10 9 9 GMCH_CRT_B <5>
<12> USB20_P1 2 2 1 1 12 12 11 11
USBN2 14 13 GMCH_CRT_VSYNC
14 13 GMCH_CRT_VSYNC <5>
WCM2012F2S-900T04_0805 USBP2 16 15 GMCH_CRT_HSYNC
16 15 GMCH_CRT_HSYNC <5>
18 17 GMCH_CRT_DATA
LID_SW# 18 17 GMCH_CRT_CLK GMCH_CRT_DATA <5>
<19> LID_SW# 20 20 19 19 GMCH_CRT_CLK <5>
R43 22 21 R1256
22 21 SATA_LED#_N
1 2 24 24 23 23 1 2 SATA_LED# <11>
+USB_LEFT 26 25 1K_0402_1%
0_0402_5% 26 25 DC1
28
30
28 27 27
29 DC2
DC1 <17> 2009-08-17modify
30 29 DC2 <17>
@ D27
R75 2 31
GND1
1 2 1 GND2 32
3
0_0402_5%
ACES_88242-3001
PJDLC05_SOT23-3
2009-08-13 modify @ L67
<12> USB20_N2 3 3 4 4 1
1
+
2 1 C238 C18
<12> USB20_P2 2 1
WCM2012F2S-900T04_0805 150U_B2_6.3V-M~D 2 2 470P_0402_50V7K
R99
1 2
4 4
0_0402_5%

SCHEMATIC, MB A5732
Custom A
401784
A B C D E
A B C D E
+5VALW TO +5VS +3VALW TO +3VS

+5VALW +5VS +3VALW +3VS
SI4800BDY-T1-E3_SO8 Q6 SI4800BDY-T1-E3_SO8 Q12

8 1 8 1
7 2 7 2
2
1 1
6 3 1 1 6 3 1 1
1 1 5 R50 1 1 5 C202 R179
C74 C76 470_0603_5% C201 470_0603_5%
10U_0805_10V6K~D 1U_0603_10V4Z @ @
4
C97 C96 2 2 C215 C214 2 2
1 1
2 2 10U_0805_10V6K~D 10U_0805_10V6K~D 2 2 10U_0805_10V6K~D 1U_0603_10V4Z
10U_0805_10V6K~D 10U_0805_10V6K~D D
1
D
2 SUSP
2 SUSP G
B+ 1 2 5VS_GATE G S Q16
3
R68 S Q9 B+ 1 2 2N7002_SOT23
3
20K_0402_5% 1 2N7002_SOT23 R185 10K_0402_5% @
1
D C108 @ 1
1
SUSP D C255
2
Q8 G 0.01U_0402_25V7K~D SUSP 2
2N7002_SOT23 S 2 Q17 G 0.1U_0402_25V7K~D
<BOM Structure>
3
2N7002_SOT23 S 2
3
+3VALW to +3V_LAN
+3VALW +3V_LAN
If the +1.8V discharge
J4 circuit is pop, R302,
1 1 2 2 Q28 need pop.
+1.8V to +1.8VS Transfer JUMP_43X39 +5VALW
2 @ Q19 2
SI3445ADV-T1-E3_TSOP6
2
D
+1.8V +1.8VS @ R302
S
6
B+ 4 5 100K_0402_5%
U41 2 1
1
8 1 10U_0805_10V6K~D @ R134 1 1 @ C164
1
D S
2
47K_0402_1%~D
47K_0402_5% @ C165
G
7 D S 2
R559
1 6 3 0.1U_0402_16V4Z~D
3
D S 1U_0402_6.3V4Z~D 2 SYSON#
5 D G 4 1 1
C727 C728 C697 2
2
SI4800DY_SO8 @ R128
1
2 10U_0805_10V6K~D 0.1U_0402_16V4Z~D 1 2
2 2
1
2.2K_0402_5%
@Q28
@ Q28
OUT
1
1.8VS_GATE D @ Q4 DTC124EKAT146_SC59-3
0.01U_0402_25V7K
1 2 2N7002_SOT23
<19> EN_WOL#
2
G SYSON 2
<19,27> SYSON IN
C696 R608 S
GND
3
1M_0402_5%
1
D 2
2 +RTCVREF
1
3
R665 G Q48 +5VALW
0_0402_5% @ S
3
SSM3K7002FU_SC70-3
SUSP 1 2
2
@ R298 R297
SUSP_DL# 1 R666 2 100K_0402_5% 100K_0402_5%
0_0402_5%
1
SUSP
3 <28> SUSP 3
1
Q27
OUT
DTC124EKAT146_SC59-3
<19,25,27,28> SUSP# 2 IN
GND
2009-6-25
+RTCVREF
+VCCP +0.9VS +1.8V +5VALW
3
+1.5VS
2
2
2
R280 R61 R279 @ R299 R303

R18 470_0603_5% 470_0603_5% 470_0603_5% 100K_0402_5% 100K_0402_5%
470_0603_5% @ @ @
@
1
1
SUSP_DL#
1
D D D
1
1
D
2 SUSP 2 SUSP 2 SYSON#
2 SUSP G G G Q30
OUT
G S Q24 S Q7 S Q23 DTC124EKAT146_SC59-3
3
S Q2 2N7002_SOT23 2N7002_SOT23 2N7002_SOT23

3
2N7002_SOT23 @ @ @ 2
<19> SUSP_DL IN
@
3GND
4 4

SCHEMATIC, MB A5732
Custom A
401784
A B C D E
H35 H39 H16 H15 H24 H29 H30 H31 H32
H H H H H H H H H
@ @ @ @ @ @ @ @ @
1
1
H41 H33 H34 H36 H4
AGND
H H H H H
@ @ @ @ @ H_2P8X4P8N
1
H7 H37 H38 H40

H H H H
@ @ @ @
1
FM3 FM4 FM2 FM1
@ @ @ @ FIDUCIAL_C40M80
1

SCHEMATIC, MB A5732
Custom A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401784
A B C D
Vin Detector
1 1
VIN
High 17.944 17.706 17.470
PL1
Low 16.242 16.027 15.808
JP53 SMB3025500YA_2P
4 APDIN 1 2
4
3 3
2 2
1 1
G1 5
G2 6
1
PC3
@ ACES_85204-04001 PC1 PC2 100P_0402_50V8J PC5 PR2
1000P_0402_50V7K 100P_0402_50V8J 1000P_0402_50V7K 1M_0402_1%
2
1 2
VIN
VS
VIN
0.01U_0402_25V7K
10K_0805_5%
84.5K_0402_1%
1
1
PC6
PR4
PR3
PR5
10K_0402_1%
2
1 2
ACIN <12,19>
2
PR6
8
22K_0402_1%
1 2 3
P
+
0.068U_0603_25V7M
1 PACIN
O PACIN <25>
22K_0402_1%
2 -
10K_0402_1%
0.1U_0402_16V7K
RLZ4.3B_LL34
2
VIN PU1A 2
1
PR7
LM393DG_SO8
4
PC7
PC8
PR8
PD1
2
2
2
2
PD2 PR9
2
LL4148_LL34-2 10K_0402_1%
2 1
PD3
+RTCVREF
3.3V
1
LL4148_LL34-2
BATT+ 2 1
1
PR10 PR11
PQ1 68_1206_5% 68_1206_5%
TP0610K-T1-E3_SOT23-3
PR12
2
200_0603_5% 2
CHGRTCP 1 2 N1 3 1
VS
0.22U_0603_25V7K
1
1
PC9
PR13 PC10
100K_0402_1% 0.1U_0603_25V7K PJ1 PJ2
+3VALWP 2 1 +3VALW +1.5VSP 2 1 +1.5VS
1
PR14 2 1 2 1
2
22K_0402_1% @ JUMP_43X118 @ JUMP_43X118

1 2
<20> 51_ON#
PJ3 PJ4
+5VALWP 2 2 1 1 +5VALW +0.9VSP 2 2 1 1 +0.9VS
3
+RTCVREF 3
1
@ JUMP_43X118 @ JUMP_43X79
APL5156-33DI-TRL_SOT89-3 PR15
200_0603_5%
PR16 PU2
0_0402_5% 3.3V
2
1 2 3 2 N2 PJ12 PJ6
VOUT VIN
+CHGRTC +0.89VSP 2 2 1 1 +0.89VS +1.8VP 2 2 1 1 +1.8V
1
GND PC12 @ JUMP_43X118 @ JUMP_43X118

PC11 1U_0805_25V6K
10U_0603_6.3V6M 1
2
PJ7
+VCCPP 2 2 1 1 +VCCP
@ JUMP_43X118
PD16
JP79
+CHGRTC 2 1
PR17
RB751V-40TE17_SOD323-2 PD4
1K_0402_1%
+RTCBATT 1 2 2 1 1 + - 2
RB751V-40TE17_SOD323-2
4
SUYIN_060003FA002G201NL~D 4

SCHEMATIC, MB A5732
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401784 A
A B C D
5 4 3 2 1
P3
B+
P2
PD17 PQ29 PL5

B340A_SMA2 FDS4435BZ_SO8 FBMA-L11-201209-121LMA50T_0805 CHG_B+
PR162 0.05_1206_1%
VIN 2 1 1
2
S D 8
S D 7 1 4 1 2
3 S D 6 PQ30
4 G D 5 2 3 2009-08-17 modify FDS4435BZ_SO8
2200P_0402_50V7K
D D
0.1U_0603_25V7K
4.7U_1206_25V6K
4.7U_1206_25V6K
PQ31 1 8
S D
47K_0402_5%
2 S D 7
1
2
200K_0402_1%
0.1U_0603_25V7K
DTA144EUA_SC70-3
PC161
3 S D 6
1
PR163
PC159
PC160
CSIN 4 5
G D
PC162
PR164
PC13
CSIP
1
PR165
47K_0402_1%
2
2
2 1 2
2
@ VIN
1
2
PD19 PR166 3 ACOFF
1
RB751V-40TE17_SOD323-2 10K_0402_1% 1
1 2 6251VDD 2
2.2U_0603_6.3V6K
2 PR167
1 1
PC163
PQ32 PR168 PD18 200K_0402_1%
1
10K_0402_1% RB715F_SOT323-3 1 2 VIN
DTC115EUA_SC70-3 2 1 PU16 PC165
<19> FSTCHG 0.1U_0603_25V7K
3
2
1 2 1 24 6251DCIN 2 1 PQ33
VDD DCIN
100K_0402_1%
PC164 DTC115EUA_SC70-3 2
PQ34 0.1U_0402_16V7K
1
D 2N7002KW_SOT323-3
150K_0402_1%
PR169
2 ACSET ACPRN 23
PR170
2 PR171
0.1U_0603_25V7K
G 20_0402_5%
3
5
1
6251_EN CSON D
S 3 22 1 2
3
EN CSON
1
PC167
PC166 2 PACIN
2
0.047U_0402_16V7K G
4 21 1 2 CSOP S
3
CELLS CSOP PR172 PQ36
C PC168 6800P_0402_25V7K 20_0402_5% PQ35 2N7002KW_SOT323-3 C
4
PR174 PQ37 1 2 5 20 2 1 SIS412DN-T1-GE3_PAK1212-8
ICOMP CSIN
1
2
3K_0402_1% D 2N7002KW_SOT323-3 PR173
PACIN 1 2 2 PC169 PR175 6.81K_0402_1% PC170 20_0402_5%
<24> PACIN
G 1 2 1 2 6 19 0.1U_0402_16V7K
1 2 PL15
3
2
1
VCOMP CSIP PR176 10UH_PCMB063T-100MS_4A_20%
S
3
0.01U_0402_25V7K 1 2 2.2_0402_5% PR178 0.05_1206_1% BATT+

PC171 1 2 7 18 LX_CHG 1 2 CHG
1 4
@ 100P_0402_50V8J PR177 ICM PHASE
SI7716ADN-T1-GE3_PAK1212-8
<19> ADP_I 100_0402_1% 2 3
4.7_1206_5%
6251_VREF 8 17 DH_CHG
VREF UGATE
1
PR179
PQ38 PR180 1 2 PR181 PC173
10U_1206_25V6M
10U_1206_25V6M
DTC115EUA_SC70-3 32.4K_0402_1% PC172 2.2_0402_5% 0.1U_0603_25V7K
PQ39
2 1 0.1U_0402_16V7K 9 16 BST_CHG 1 2 BST_CHGA 2 1
<19> IREF CHLIM BOOT
1
PR182 4
1
PC174
PC175
0.01U_0402_25V7K
ACOFF 2 60.4K_0402_1% PD20

<19> ACOFF
6251_VREF 1 2 10 15 6251VDDP RB751V-40TE17_SOD323-2 @
ACLIM VDDP
1
680P_0603_50V7K
2
1
PC177
PR183 1 26251VDD
3
2
1
1
PC178
100K_0402_1% 11 14 DL_CHG
3
2
VADJ LGATE
1
PR185 PR184
2
31.6K_0402_1% 4.7_0402_5%
2
12 13 PC179
2
GND PGND 4.7U_0805_6.3V6K
2
ISL6251AHAZ-T_QSOP24 @
PR186
Connect to EC A/D Pin. 15.4K_0402_1%
Iada=0~1.58A(30W) CP = 85%*Iada ; CP = 1.34A <19> CHGVADJ
1 2
B B
CP mode
1
Vaclim=2.39*(31.6K/(31.6K+60.4K))=0.8209V PR187 VMB

Iinput=(1/0.05)((0.05*Vaclm)/2.39+0.05) 33.2K_0402_1%
where Vaclm=0.8209V, I_input=1.34A

2
1
VS PR188
IREF Current @ 340K_0402_1%
Pre Cell CHGVADJ
2
0.01U_0402_25V7K
2.58V 1.9A 4V 0V LI-3S :13.5V----BATT-OVP=1.5012V
4.35V 3.3V
PC180
BATT-OVP=0.1112*VMB
1
PR189
2
@ 499K_0402_1% VS
PQ40 TP0610K-T1-E3_SOT23-3 @
2
8
PR190 PU17A
3 1 6251DCIN @ 10K_0402_1% @ LM358DT_SO8 3
P
P3 +
8
1 2 1 0 PU17B
<19> BATT_OVP
1
100K_0402_1%
2 @ LM358DT_SO8 5
P
- +
0.01U_0402_25V7K
7 0
1
PR191
4
-
G
PR192
@ 105K_0402_1%
2
4
PR193
2
2
PC181
2 1
2
A 100K_0402_1% A
@
1
PQ41
DTC115EUA_SC70-3 2 FSTCHG
2 1
FSTCHG <19>
3 SUSP# Security Classification Compal Secret Data Compal Electronics, Inc.
SUSP# <19,22,27,28> 2009/03/25 2009/06/22 Title
PD21 SCHEMATIC, MB A5732
3
RB715F_SOT323-3 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401784 A
5 4 3 2 1
5 4 3 2 1
ISL6237_B+
ISL6237_B+
B+
PL4
FBMA-L11-201209-121LMA50T_0805 PR49
0_0402_5%
1 2 1 2
10U_1206_25V6M
2200P_0402_50V7K
2200P_0402_50V7K
0.1U_0402_25V6
0.1U_0402_25V6
10U_1206_25V6M
PC141
VL
5
PC140
PC47
PC45
1
PC50
D D
PC48
2
1U_0603_10V6K
2
2
PC51 PQ12
4.7U_0805_6.3V6K
PQ11 0.1U_0603_25V7K SIS412DN-T1-GE3_PAK1212-8 4
1
PC52
4 SIS412DN-T1-GE3_PAK1212-8
PC53
1
+5VALWP
2
PL11
3
2
1
PL12 2.2UH_PCMC063T-2R2MN_8A_20%
1
2
3
2.2UH_PCMC063T-2R2MN_8A_20%
7
PC54 1 2
1 2 1U_0603_10V6K
VIN
VCC
LDO
+3VALWP 33 19 1 2
TP PVCC
1
1
5
DH3 26 15 DH5
PR50 UGATE2 UGATE1 PR51
0_0402_5%
4.7_1206_5% 2 1 BST3A 24 BOOT2 BOOT1 17 BST5A2 1 4.7_1206_5%

2
1 PR52 PR53
2
2
@ 61.9K_0402_1%
PR54
2.2_0603_5% 2.2_0603_5% 4
2
PC24 + 4 PC56
150U_B2_6.3VM_R35M
150U_B2_6.3VM_R35M 0.1U_0603_25V7K
1
1
PR55
LX3 25 16 LX5 1
1
2 PC57 PHASE2 PHASE1 PC58 PC64
3
2
1
+
PC67
680P_0603_50V7K 0.1U_0603_25V7K 680P_0603_50V7K
2
1
2
3
2
DL3 23 18 DL5 PQ26
1
PQ24 LGATE2 LGATE1 SI7716ADN-T1-GE3_PAK1212-8
2
10K_0402_1%
2
PGND 22
2
PR56
FB3 30 OUT2
0_0402_5%
PR57
OUT1 10
C C
VL 32
1
@ REFIN2
1
11 FB5
2VREF_TPS51427 FB1
1 2 2VREF_TPS51427 1 REF
+3VALWP PC70
Imax=3.77A 0.22U_0603_25V7K
BYP 9
8 LDOREFIN
Ipeak=5.03A PD7 PR58 @ 0_0402_5%
RB751V-40TE17_SOD323-2 29 2 1
Iocp(minimum)=6.539A SKIP VL
1 2 +5VALWP
Imax=3.15A
20 NC POK2 28
PD8 PR61 PR60 @ 0_0402_5% Ipeak=4.201A
VS RLZ5.1B_LL34 100K_0402_1% 1 2
1 2 1 2 4 EN_LDO POK1 13 Iocp(minimum)=5.46A
2
200K_0402_1%
2
PR72
PC68 14 12 ILM1 2 1
0.22U_0603_25V7K EN1 ILIM1 PR70
196K_0402_1%
1
27 31 ILIM2 2 1
GND
TON
1
PD14 EN2 ILIM2 PR71
NC
RB751V-40TE17_SOD323-2 232K_0402_1%
2
1 2 PU6
21
VL TPS51427_QFN32_5X5
806K_0603_1%
2
PR143
PR144
0_0402_5%
2VREF_TPS514271
1U_0603_10V6K
B PR68 B
1
PC66
@ 47K_0402_5%
PR67
1
1
2 1 1 2
2
<30> MAINPWON
0.047U_0402_16V7K
0_0402_5% PR69
@ 0.047U_0402_16V7K
0_0402_5%
1
2
PC65
PC69
2
2VREF_TPS51427
A A

SCHEMATIC, MB A5732
5 4 3 2 1
A B C D
PJP1
2 2 1 1 B+
+1.8VP_B++
@ JUMP_43X79
2200P_0402_50V7K
10U_1206_25V6M
10P_0402_50V8J
0.1U_0402_25V6
1 2
PL18
1
@ FBMA-L11-201209-121LMA50T_0805
PC139
PC142
PC157
PC78
2
2
1
PR96 1
267K_0402_1%
1 2
5
PR92
0_0402_5% PC82
2 1 EN_1.8 BST_1.8 2 1 1 2
+1.8VP
<19,22> SYSON
PR77 Imax=5.5A
1
PC93 2.2_0603_5% 0.1U_0603_25V7K
@ .1U_0402_16V7K 4 PQ16 Ipeak=7.4A
SIS412DN-T1-GE3_PAK1212-8
2
Iocp(minimum)=9.62A
15
14
1
PU7 PL7
3
2
1
EN_PSV
TP
VBST
TON_1.8 2 13 UG_1.8 1 2
TON DRVH +1.8VP
4.7U_0805_6.3V6K
PR85 3 12 LX_1.8
VOUT LL
2
100_0603_5% PR90 1
+5VALW 1 2 V5FILT_1.8 4 11 TRIP_1.81 2 PR95
V5FILT TRIP
1
13K_0402_1% 4.7_1206_5% +
FB_1.8 5 10 V5DRV_1.8 1 2 +5VALW PC79
VFB V5DRV
1
PC95
PC97 PR94 220U_B2_2.5VM_R15M
2
LG_1.8 0_0603_5% 2
6 PGOOD DRVL 9 4
<19> PM_1.8V_PWRGD
PGND
4.7U_0805_10V6K
GND
2
1
1
PC96
PR62 TPS51117RGYR_QFN14_3.5x3.5 PC89 680P_0603_50V7K
3
2
1
2
@ 100K_0402_1% 4.7U_0805_10V6K
2
+3VALW 1 2
PQ17
2 SI7716ADN-T1-GE3_PAK1212-8 2
2 1
PR78
30.1K_0402_1%
1
PR79 PJP2
21.5K_0402_1% 2 1 B+
2 1
VCCPP_B++
@ JUMP_43X79
2
2200P_0402_50V7K
10U_1206_25V6M
0.1U_0402_25V6
1 2
PL16
1
@ FBMA-L11-201209-121LMA50T_0805
PC143
PC81
PC144
2
2
PR80
267K_0402_1%
1 2
5
PR81
0_0402_5% PR82 PC85
<19,22,25,28> SUSP# 2 1 EN_VCCP BST_VCCP1 2 1 2
0_0603_5% 0.1U_0603_25V7K
1
PC80 4 PQ18
3 @ .1U_0402_16V7K SIS412DN-T1-GE3_PAK1212-8 3
PL13
2
15
14
1
PU10
3
2
1
EN_PSV
TP
VBST
TON_VCCP 2 13 UG_VCCP 1 2
TON DRVH +VCCPP
PR84 3 12 LX_VCCP
VOUT LL
2
100_0603_5% PR91 1
4.7U_0805_6.3V6K
+5VALW 1 2 V5FILT_VCCP 4 11 TRIP_VCCP
1 2 PR87 PC94
V5FILT TRIP
1
12.1K_0402_1% 4.7_1206_5% + PC92
FB_VCCP 5 10 V5DRV_VCCP 2 1 +5VALW 220U_B2_2.5VM_R15M
VFB V5DRV
1
PR86
2
PC87 LG_VCCP 0_0603_5% 2
6 PGOOD DRVL 9 4
PGND
4.7U_0805_10V6K
GND
2
1
1
PC88
TPS51117RGYR_QFN14_3.5x3.5 PC86 680P_0603_50V7K
7
3
2
1
2
4.7U_0805_10V6K
2
PQ19
+VCCP
Imax=3.577A
2 1 Ipeak=4.77A
PR88 Iocp(minimum)=6.2A
8.66K_0402_1%
1
PR89
21.5K_0402_1%
4 4
2

SCHEMATIC, MB A5732
Custom A
A B C D
5 4 3 2 1
PJP3
2 2 1 1 B+
+0.89VP_B++
@ JUMP_43X79
2200P_0402_50V7K
10U_1206_25V6M
1 2
0.1U_0402_25V6
1
1
PL17
@ FBMA-L11-201209-121LMA50T_0805
PC147
PC135
PC150
2
2
PR159
267K_0402_1%
1 2
D D
5
PR152
0_0402_5% PR156 PC149
2 1 EN_0.89 BST_0.89 1 2 1 2
+0.89VP
<19,22,25,27> SUSP#
Imax=1.035A
1
PC153 0_0603_5% 0.1U_0603_25V7K
@ .1U_0402_16V7K 4 PQ20 Ipeak=1.38A
SIS412DN-T1-GE3_PAK1212-8
2
Iocp(minimum)=1.794A
15
14
1
PU8
3
2
1
PL8
EN_PSV
TP
VBST
TON_0.89 2 13 UG_0.89 1 2
TON DRVH +0.89VSP
PR158 3 12 LX_0.89
VOUT LL
5
100_0603_5% PR160 1
4.7U_0805_6.3V6K
+5VALW 1 2 V5FILT_0.89 4 11 TRIP_0.89
1 2
V5FILT TRIP
1
3.74K_0402_1% PR161 +
FB_0.89 5 10 V5DRV_0.89 2 1 +5VALW @ 4.7_1206_5%
VFB V5DRV
1
PR151 PC148
2
PC152 LG_0.89 0_0603_5% 2 220U_B2_2.5VM_R15M
6 9 4
1 1
PGOOD DRVL
PGND
PC137
4.7U_0805_10V6K
GND
2
1
TPS51117RGYR_QFN14_3.5x3.5 PC156 PC151
3
2
1
2
4.7U_0805_10V6K @ 680P_0603_50V7K
2
PQ23
C C
2 1
PR149
4.22K_0402_1%
1
PR150
21.5K_0402_1%
+VCCP +5VALW
2
1U_0603_10V6K
PC103
1
2
PC131
@ 10U_0603_6.3V6M
2
PU11
6 VCNTL
@ 5 3 +0.89VSP
PR99 VIN VOUT
9 VIN VOUT 4
100P_0402_25V8K
@ 10K_0402_1%
PC154
<19,22,25,27> SUSP# 1 2 8 EN
10U_0603_6.3V6M
7 2 PR157
GND
POK FB
1
@ 340_0402_1%
2
1
PC105
2
PC155 @ APL5912KAI-TRG_SO8
2
+1.8V @ 0.47U_0402_6.3V6K
1
B PR100 B
1
@ 3K_0402_1% @
PJ11
1
2
@ JUMP_43X39
2
PU12 +1.8V +5VALW

2
1 VIN VCNTL 6 +3VALW
1
2 5 PJ9
GND NC
1
PC136 @ JUMP_43X39
1
1
4.7U_0805_6.3V6K 3 7 PC133
PR148 VREF NC 1U_0603_10V6K
2
2
1K_0402_1% 4 8
VOUT NC
1U_0603_10V6K
9
2
TP
PC98
1
APL5336
2
PC130 PU9
1
PR146 +0.9VSP 10U_0603_6.3V6M APL5913-KAC-TRL_SO8
2
1
0_0402_5% D PR147
1 2 2 1K_0402_1% PC138 6
<22> SUSP VCNTL
1
G 0.1U_0402_16V7K 5 3 +1.5VSP
2
VIN VOUT
1
S PQ27 PC132 PR98 9 4

3
VIN VOUT
220P_0402_25V8K~D
PC134 2N7002KW_SOT323-3 10U_0603_6.3V6M 10K_0402_1%
2
PC129
@ 0.1U_0402_16V7K 1 2 8
<19,22,25,27> SUSP#
2
EN
10U_0603_6.3V6M
7 2 PR145
GND
POK FB
1
2.7K_0402_1%
2
1
PC99
2
PC128
2
0.47U_0402_6.3V6K
2
1
A A
PR97
3K_0402_1%
2
SCHEMATIC, MB A5732
5 4 3 2 1
5 4 3 2 1
D D
<5>
<5>
<5>
<5>
<5>
<5>
<5>
<19>
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
VR_ON
+3VS
1
+5VS
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
PR194
4.7K_0402_1% +CPU_B+ PL9
2
FBMA-L11-201209-121LMA50T_0805
2
PR195
1 2 B+
4700P_0402_25V7K
2200P_0402_50V7K
4.7U_0805_25V6M
4.7U_0805_25V6M
4.7U_0805_25V6M
<5,8,12,19> VGATE 2 13211_PWRGD PR200
0.1U_0402_25V6
10_0603_1%
1
0_0402_5%
1
PC100
PC101
PC104
PC102
32 3211_EN1
PC145
PC146
2
2
PR196
PR197
PR198
PR199
PR201
PR202
PR203
PR204
1
31 VID0
30 VID1
29 VID2
28 VID3
27 VID4
26 VID5
25 VID6
3211_VCC
5
PC182
+3VS 1U_0805_25V6K
2
EN
VID0
VID1
VID2
VID3
VID4
VID5
VID6
1
PR205 24 PR206 PC183 4
10K_0402_1% VCC 2.2_0603_5% 0.22U_0603_25V7K PQ13
1 PWRGD
BST 23 CPU_BOOST
1 2CPU_BOOST-1
1 2 SIS412DN-T1-GE3_PAK1212-8
1
2 2 IMON
C C
22 3211_DRVH PL14
3
2
1
PC184 <8> CLK_ENABLE# CLK_ENABLE# DRVH 2.2UH_PCMC063T-2R2MN_8A_20%
3
2
1000P_0402_50V7K CLKEN#
21 3211_SW 1 2
4
SW +CPU_CORE
FBRTN
1
PVCC 20 +5VS
5
1 2 3211_FB 5 PU15
PC185 FB ADP3211A
DRVL 19 3211_DRVL 2 1 PR115
1
390P_0402_50V7K 3211_COMP 6 PC186 4.7_1206_5%

COMP 2.2U_0603_10V6K
18 LL=5.9m ohm
2
PC187 PGND
7
2
1 2 1 23211_COMP-1
1 2 47P_0402_50V8J
GPU
17 4 OCP=4.55A
AGND
1
PR208 PC188 PR207 3211_ILIM
8 VID:0.75V~1.1V
CSCOMP
1K_0402_1% 470P_0402_50V8J 28K_0402_1% ILIM
33
CSREF
AGND Io(max)=3.5A
RAMP
LLINE
CSFB
PQ28 PC109
IREF
RPM
2
SI7716ADN-T1-GE3_PAK1212-8 680P_0603_50V7K
RT
3
2
1
2
PR209
9
10
11
12
13
14
15
16
1.8K_0402_5% 2 200K_0402_1%
2 274K_0402_1%
2 80.6K_0402_1%
1
3211_IREF
3211_RPM
3211_RT
3211_RAMP
3211_CSCOMP
3211_CSFB
3211_CSCOMP
100K_0402_1%_TSM0B104F4251RZ
3211_CSCOMP
PH4
1 2
Avoid high dV/dt

Place RTH1 close to inductor
on the same layer
1
2 1
PR210 1
PR211 1
PR212 1
499K_0402_1%
PR213
1
B 35.7K_0402_1% B
1
1
PC190 PR217
2
PC189 220P_0402_50V7K 75K_0402_1%

2
2
PR214
1000P_0402_50V7K
2
2 1
PR218
+CPU_B+ 2 PR219
1 3211_RAMP-1 309K_0402_1%
1K_0402_1%
<6>
<6>
VSSSENSE
VCCSENSE
Connect to input caps

1
PC191 PC192
2
1000P_0402_50V7K 1000P_0402_50V7K 2 1
PR220
0_0603_5%
Shortest the
net trace
A A

SCHEMATIC, MB A5732
5 4 3 2 1
A B C D
1 1
PH3 under CPU botten side :

CPU thermal protection at 90 degree C
@ SUYIN_200045GB009G13MZR
JBATT1 VMB Recovery at 50 degree C
PL10
SMB3025500YA_2P
1 1 2 VL
1 BATT+ VL
2 2
3 PR154 1 2 1K_0402_1% PR155 1 2 47K_0402_1%
3 +3VALWP
1
4 PR153 1 2 1K_0402_1%
4
2
5 PC124 PC125
5 EC_SMDA 1000P_0402_50V7K 0.01U_0402_25V7K PR133
6
2
6
1
7 EC_SMCA 47K_0402_1%
7 PH3 PR134
10 GND 8 8 MAINPWON <26>
11 9 47K_0402_1%
1
GND 9 100K_0402_1%_TSM0B104F4251RZ1 2
2
PR135
8
13.7K_0402_1%
1
D
1 2 5
P
+ PQ22
O 7 2
1 2 +3VALWP TM_REF1 6 G 2N7002KW_SOT323-3
-
G
2 PR141 PU1B S 2
3
6.49K_0402_1% LM393DG_SO8
4
1000P_0402_50V7K
16.9K_0402_1%
1
0.22U_0603_25V7K
1 2 BATT_TEMP <19>
1
PR138
PR142 1K_0402_1% 2 1 VL
PC126
PC127
1 2 PR139
EC_SMB_DA1 <19>
1
PR136 100_0402_1% 100K_0402_1%
2
1 2 PR140
EC_SMB_CK1 <19>
PR137 100_0402_1% 100K_0402_1%
2
3
2
PJSOT24C_SOT23-3
PJSOT24C_SOT23-3
PD10
PD11
@
@ A/D
1
3 3
4 4

SCHEMATIC, MB A5732
A B C D
5 4 3 2 1
Version change list (P.I.R. List) Page 1 of 1 for PWR

D D
Item Reason for change Rev. PG# Modify List Date Phase
1 Reserve bead to prevent noise issue happen P27, P28 Reserve PL16, PL17, PL18 2009.07.24 PT
P26, P27 Change PR77, PR206 to 2.2_0603_5%.

P28, P29 Add PR87, PR95, PR50, PR51, PR115 4.7_1206_5% into BOM. 2009.08.05 PT
2 EMI request add snubber to reduce power board band. Add PC88, PC96, PC57, PC64, PC109 680P_0603_50V.
Add PC157 10P_0402_50V
Reserve PU11, PC131, PC103, PC155, PC154, PC105

3 Reserve 0.89V LDO soultion P28 2009.08.05 PT
PR99, PR157, PR100
4
Adjust the +1.5VSP LDO feedback P28 Change PC129 to 220P 25V K NPO 0402
C 5 C
B B
10
A A

SCHEMATIC, MB A5732
5 4 3 2 1
A B C D E
Version change list (P.I.R. List) Page 1 of 2
Item Date Fixed Issue Rev. PG# Modify List
01 2009/07/20 MEMO LIST: BOM Structure Error 0.2 Mount C170,C996,C997,C106,C196,C224,C905,R114,R115,R139,R406,R407,R185

1 1
02 2009/07/20 WWAN PLTRST# 0.2 P.14 Floating Pin17,30,32 and Mount R14 to connect PLTRST#
03 2009/07/20 Unify the quality of the capacitance 0.2 P.06 Change C56,C924,C933-22U from Y5V(SE00000868L) to X5R(SE000000I10)
04 2009/07/20 Intel MoW-WW28-glitch issue 0.2 P.08 Add R121,R124 pull-up STP_PCI# and STP_CPU# to +3.3VS
05 2009/07/20 Add LCD BIST function. 0.2 P.09/19 JP24 pin3 add LCD_TST and U27 pin16 add LCD_TST
06 2009/07/20 Add USB signal for touch screen function. 0.2 P.09 JP24-pin34,pin36 add USB signal/ pin6 connect to +5VALW and pin39 connect to GND
07 2009/07/20 Change USB connector. 0.2 P.21 Change JP16 connector.
08 2009/07/20 Change board ID to R02 0.2 P.19 Change R122 to 100K,R127 to 8.2K
09 2009/07/20 Change RJ45 LAN connector. 0.2 P.18 Change JP71 connector.
2 2
10 2009/07/20 Change BT connector. 0.2 P.14 Change JP22 connector.
11 2009/07/20 Add EC GPIO Function 0.2 P.19 Add Pin16-LCD_TST, Pin17-BT_RADIO_OFF# and Pin90-BT_DET
12 2009/07/20 For DELL Request 0.2 P.14 Pop R116, R118 for WLAN/BT co-existance control
13 2009/07/31 Change M/B to IO/B connector. 0.2 P.21 Change JP25 from 40 pin to 30 pin
14 2009/07/31 Change SIM Card connector. 0.2 P.14 Change JP73 connector.
15 2009/07/31 Add Stand off 0.2 P.23 Add H16
16 2009/08/04 Change battery connector. 0.2 P.30 Change JBATT1 connector.
17 2009/08/04 Change SATA HDD connector. 0.2 P.17 Change JP48 connector.
3 3
18 2009/08/04 Change RTC battery connector. 0.2 P.24 Change JP79 connector.
19 2009/08/04 For EMI concern circuit 0.2 P.09 Add ESD diode L65
20 2009/08/04 For EMI concern circuit 0.2 P.08 Remove RTS5159_48M; Change R137 from 22 to 33
21 2009/08/04 Change 2P( Power board)connector. 0.2 P.20 Change JP42 connector.
22 2009/08/05 WLAN module pin define 0.2 P.14 Swap JP54.3 and JP54.5
23 2009/08/05 Change Audio Jack 0.2 P.16 Change JP60, JP61 connector.
24 2009/08/10 For TouchScreen circuit 0.2 P.12 Add R88, R93
25 2009/08/10 For Realtek Clock Generator Co-lay circuit 0.2 P.08 Add R94,R102,C182,C156; Change U3.27,U3.55,U3.72 to +1.5VM_CK505
4 4

SCHEMATIC, MB A5732
Custom A
A B C D E
A B C D E
Version change list (P.I.R. List) Page 2 of 2
Item Date Fixed Issue Rev. PG# Modify List
26 2009/08/10 For Layout placement 0.2 P.18 Remove U9 and C126

1 1
P.09,P.12,
27 2009/08/13 I/O board USB ports cannot detect issue 0.2 P.21 Swap USB port 1 and port 3,port 2 and port 7
28 2009/08/17 For Layout placement 0.2 P.08 Remove Clock Generator SRC-0ohm
29 2009/08/17 For LED circuit 0.2 P.21 Change R1256 from 0 to 1K
30 2009/08/17 For RF concern circuit 0.2 P.25 Reserve PC13 0.1uF on CHG_B+
31 2009/08/17 For RF concern circuit 0.2 P.09 Reserve C232,C233 100pF on LVDSAC+,LVDSAC-
32 2009/08/18 For EMI concern circuit 0.2 P.09 Change R1007 to L25, remove R1006.
33 2009/08/18 For EMI concern circuit 0.2 P.18 Add R199,R200,R201 on LAN chip pin29,pin37,pin1
34 2009/08/18 For EMI concern circuit 0.2 P.20 Add D15 to ON/OFFBTN#
2 2
35 2009/08/19 For EMI concern circuit 0.2 P.18 pop C193,C125,C130

P.12,P.14,
36 2009/08/24 For BIOS concern circuit 0.2 P.18 Swap PCIE port 1 and port 3
3 3
4 4

SCHEMATIC, MB A5732
Custom A
A B C D E

14fc7 Dell Inspiron Mini 10 1012 - Compal La-5732p Nim10 Uma - Rev 0.2

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A B C D E

MODEL NAME : NIM10

SAMOS Schematics Document 2

Intel Pineview-M Processor with TigerPoint

Security Classification Compal Secret Data Compal Electronics, Inc.

Project Name : LA-5732P

USB Port X1 Port 1 DMI SIM card

USB Port X1 Port 2 USB

page 14 page 14 page 14 page 18 MIC Jack Port 3

Power ON/OFF DC/DC Interface

Through power buttom cable Through LED cable

Security Classification Compal Secret Data Compal Electronics, Inc.

Full ON HIGH HIGH HIGH ON ON ON ON

S1(Power On Suspend) HIGH HIGH HIGH ON ON ON LOW

S3 (Suspend to RAM) LOW HIGH HIGH ON ON OFF OFF

S4 (Suspend to Disk) LOW LOW HIGH ON OFF OFF OFF

S5 (Soft OFF) LOW LOW LOW ON OFF OFF OFF

3 BOARD ID Table(Page 19) Tiger Point SM Bus address

VCC 3.3V +/-5%

Security Classification Compal Secret Data Compal Electronics, Inc.

+1.8V +1.8V AE26 DDR_A_DQS5

Signal Name Description Direction Type XDP_TDI 1 2 AK29 AE30 DDR_A_DQS6

XDP_TDO AB24 DDR_A_D60

Security Classification Compal Secret Data Compal Electronics, Inc.

T18 D12 XDP_RSVD_00 REV = 1.1

Close to Processor Close to Processor +VCCP +VCCP

H_THERMDA, H_THERMDC routing together. pin pin

+3VS Place closed to chipset H_EXTBGREF

Security Classification Compal Secret Data Compal Electronics, Inc.

GFX supply current: 1.38A U31E REV = 1.1

VCC N14 R1208 AF21 VSS VSS N25

AG3 VSS VSS N8

U5 VCCA_DDR AH28 VSS VSS P16

U8 VCCA_DDR AH8 VSS VSS P21

LVDS supply current: 0.06A C22 VSS VSS Y3

2 2 +VCC_CRT_DAC T30 VSS VSS

VCCRING_WEST VCCA_DMI VSS VSS

VCCP E2 +VCCP C944 6 OF 6

A R1219 1 R1217 2 +VCC_DLVD A

Security Classification Compal Secret Data Compal Electronics, Inc.

C1024 DDR_A_D24 61 62 DDR_A_D28

1 <4> DDR_CKE0 79 CKE0 NC/CKE1 80 DDR_CKE1 <4>

@ <4> DDR_A_BS2 DDR_A_BS2 85 86 DDR_A_MA14

B 161 VSS VSS 162 B

1 8 8 1 199 VDDSPD SA1 200

+3VM_CK505 2009-8-10 modify +1.5VM_CK505

<12> ICH_SMBDATA 6 1 CLK_SMBDATA

470_0402_5%~D DTC124EK_SC59 72 VDD_CPU CPU_0# 70 CLK_CPU_BCLK#

FSB 2 <12> CLK_ICH_14M 33_0402_5% FSC SRC_3#

FSC PCI_1 SRC_9

<10> CLK_PCI_ICH 1 2 33_0402_5% ITP_EN 17 PCIF_5/ITP_EN

10K_0402_5% 10K_0402_5% 10K_0402_5%

@ R132 R117 @ R110

10K_0402_5% 10K_0402_5% 10K_0402_5%

+LCDVDD +5VALW LCD POWER CIRCUIT

LCD/PANEL BD. Conn.

@ R1168 +3VS (TouchScreen)

68P_0402_50V8J~D 0.1U_0603_25V7K LVDSAC-

+3VS U34A TGP