Operational Amplifier

Simrandeep Singh
 The operational amplifier:

An operational amplifier is a direct coupled high gain

amplifier consisting of one or more differential (OPAMP)

amplifiers and followed by a level translator and an

output stage. An operational amplifier is available as a

single integrated circuit package.

block diagram of OPAMP
 input stage
The input stage is a dual input balanced output differential amplifier. This stage provides
most of the voltage gain of the amplifier and also establishes the input resistance of the
OPAMP

INTERMEDIATE STAGE
The intermediate stage of OPAMP is another differential amplifier which is driven by
the output of the first stage. This is usually dual input unbalanced output.
 level shifting circuit
Because direct coupling is used, the dc voltage level at the output of intermediate stage is
well above ground potential. Therefore level shifting circuit is used to shift the dc level at
the output downward to zero with respect to ground.

OUTPUT STAGE
The output stage is generally a push pull complementary amplifier. The output stage
increases the output voltage swing and raises the current supplying capability of the OPAMP.
It also provides low output resistance
 Level Translator:
Because of the direct coupling the dc level at the emitter rises from stages to stage. This
increase in dc level tends to shift the operating point of the succeeding stages and
therefore limits the output voltage swing and may even distort the output signal.

To shift the output dc level to zero,

level translator circuits are used.
An emitter follower with voltage divider
is the simplest form of level translator
as shown
Thus a dc voltage at the base of Q produces 0V
dc at the output. It is decided by R1 and R2.
Instead of voltage divider emitter follower either
with diode current bias or current mirror bias as
shown in fig may be used to get better results.

In this case, level shifter, which is common

emitter amplifier, shifts the level by 0.7V. If this
shift is not sufficient, the output may be taken at
the junction of two resistors in the emitter leg.
OPAMP circuit having input different amplifiers with balanced output, intermediate
stage with unbalanced output, level shifter and an output amplifier.
The specifications are given again for the dual
input, unbalanced-output differential amplifier:
RC = 2.2 k, RB= 4.7 k, Rin1 = Rin2= 50, +VCC
= 10V, -VEE= -10 V, dc =100 and VBE= 0.715V.
Determine the voltage gain, input resistance and
the output resistance.
The symbolic diagram of an OPAMP

741c is most commonly used OPAMP available in IC

package. It is an 8-pin DIP chip
 The Operational Amplifier
+VS

i(-) _
Inverting
Ri
RO
vid Output
A
vO = Advid
Noninverting
i(+) +

-VS

i(+), i(-) : Currents into the amplifier on the inverting and noninverting lines
respectively
vid : The input voltage from inverting to non-inverting inputs
+VS , -VS : DC source voltages, usually +15V and 15V
Ri : The input resistance, ideally infinity
A : The gain of the amplifier. Ideally very high, in the 1x1010 range.
RO: The output resistance, ideally zero
vO: The output voltage; vO = AOLvid where AOL is the open-loop voltage gain
CASCADED DIFFERENTIAL AMPLIFIERS STAGES
Que:For Cascaded DA Determine
1)The collector current and collector to emitter voltage for each transistor.
2)The overall voltage gain
3)The input resistance.
4)The output resistance.

Assume that for the

transistors
used hFE = 100
and VBE = 0.715V
Solution:
(a). To determine the collector current and collector to emitter voltage of transistors
Q1 and Q2, we assume that the inverting and non-inverting inputs are grounded. The
collector currents (IC IE) in Q1 and Q2 are obtained as below:

That is, IC1 = IC2 =0.988 mA.

Now, we can calculate the voltage between collector and
emitter for Q1 and Q2 using the collector current as follows:
VC1 = VCC = -RC1 IC1 = 10 (2.2k) (0.988 mA) = 7.83 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0.715 V,
VCE1 = VCE2 = VC1 -VE1 = 7.83 + 0715 = 8.545 V
Next, we will determine the collector current in Q3 and Q4 by
writing the Kirchhoff's voltage equation for the base emitter
loop of the transistor Q3:

VCC RC2 IC2 = VBE3 - R'E IC3 - RE2 (2 IE3) + VBE= 0

10 (2.2k) (0.988mA) - 0.715 - (100) (IE3) (30k) IE3 + 10=0
10 - 2.17 - 0.715 + 10 - (30.1k) IE3 = 0
 Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC RC3 IC3 = 10 (1.2k) (0.569 mA)
= 9.32 V
Therefore,
VCE3 = VVCE4 = VC3 VE3 = 9.32 7.12 = 2.2 V
Thus, for Q1 and Q2:
ICQ = 0.988 mA
VCEQ = 8.545 V
and for Q3 and Q4:
ICQ = 0.569 mA
VCEQ = 2.2 V
[Note that the output terminal (VC4) is at 9.32 V and
not at zero volts.]
 (b). First, we calculate the ac emitter resistance r'e of each stage and then its
voltage gain.

The first stage is a dual input, balanced output differential amplifier, therefore,
its voltage gain is

Where
Ri2 = input resistance of the second stage

The second stage is dual input, unbalanced output differential amplifier with
swamping resistor R'E, the voltage gain of which is

Hence the overall voltage gain is Ad= (Ad1) (Ad2) = (80.78) (4.17) = 336.85
 (c).The input resistance of the cascaded differential amplifier

is the same as the input resistance of the first stage, that is

Ri = 2ac(re1) = (200) (25.3) = 5.06 k

(d). The output resistance of the cascaded differential

amplifier is the same as the output resistance of the last

stage. Hence,

RO = RC = 1.2 k
 Pin diagram op amp 741

Pin 1 is Offset null(-).

Pin 2 is Inverting input terminal.
Pin 3 is a non-inverting input terminal.
Pin 4 is negative voltage supply (VEE)
Pin 5 is offset null(+).
Pin 6 is the output voltage.
Pin 7 is positive voltage supply (+VCC)
Pin 8 has no connection
Open Loop configuration op amp 741
 Parameters of OPAMP
The various important parameters of
OPAMP are follows:
1.Input Offset Voltage:
Input offset voltage is defined as the voltage that must be applied
between the two input terminals of an OPAMP to null or zero the output
shows that two dc voltages are applied to input terminals to make the
output zero.
Vio = Vdc1 Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the source resistance.
Vio is the difference of Vdc1 and Vdc2. It may be positive or negative.
For a 741C OPAMP the maximum value of Vio is 6mV. It means a
voltage 6 mV is required to one of the input to reduce the output offset
voltage to zero. The smaller the input offset voltage the better the
differential amplifier, because its transistors are more closely matched.
 Parameters of OPAMP

2. Input offset Current:

The input offset current Iio is the algebraic difference between the

currents into inverting and non-inverting terminals of a balanced

amplifier.
Iio = | IB1 IB2 |

The Iio for the 741C is 200nA maximum. As the matching between two
input terminals is improved, the difference between IB1 and
IB2 becomes smaller, i.e. the Iio value decreases further.For a precision
OPAMP 741C, Iio is 6 nA
 Parameters of OPAMP
3. Input Bias Current:

The input bias current IB is the average of the current entering the

input terminals of a balanced amplifier i.e.

IB = (IB1 + IB2 ) / 2

For 741C IB(max) = 700 nA and for precision 741C IB = 7 Na

 Parameters of OPAMP
4. Differential Input Resistance: (Ri)

Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded. For the 741C the input
resistance is relatively high 2 M. For some OPAMP it may be up to 1000 G ohm
1012ohm .

5. Input Capacitance: (Ci)

Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground. A typical value of
Ci is 1.4 pf for the 741C.
 Parameters of OPAMP

6. Offset Voltage Adjustment Range

741 OPAMP have offset voltage null capability.
Pins 1 and 5 are marked offset null for this purpose.
It can be done by connecting 10 K ohm pot between
1 and 5 as shown in fig
By varying the potentiometer, output offset voltage
(with inputs grounded) can be reduced to zero volts.
Thus the offset voltage adjustment range is the range
through which the input offset voltage can be adjusted
by varying 10 K pot. For the 741C the offset voltage
adjustment range is 15 mV.
 Parameters of OPAMP

7. Input Voltage Range :

Input voltage range is the range of a common mode input signal for which a

differential amplifier remains linear. It is used to determine the degree of matching

between the inverting and noninverting input terminals. For the 741C, the range of

the input common mode voltage is 13V maximum. This means that the common

mode voltage applied at both input terminals can be as high as +13V or as low as 13V.
 Parameters of OPAMP

8. Common Mode Rejection Ratio (CMRR).

CMRR is defined as the ratio of the differential voltage gain Ad to the common mode

voltage gain ACM

CMRR = Ad / ACM.

For the 741C, CMRR is 90 dB typically. The higher the value of CMRR the better is the

matching between two input terminals and the smaller is the output common mode

voltage.
 Parameters of OPAMP

8. Common Mode Rejection Ratio (CMRR).

ACM = Vocm / VCM.

ACM = common mode voltage gain

Vocm = output common mode voltage

VCM= Input common mode voltage

Generally ACM is very small

 Parameters of OPAMP
9. Supply voltage Rejection Ratio: (SVRR)

SVRR is the ratio of the change in the input offset voltage to the corresponding change

in power supply voltages. This is expressed in m V / V or in decibels, SVRR can be

defined as
SVRR = D Vio / D V
Where D V is the change in the input supply voltage and D Vio is the corresponding
change in the offset voltage.
For the 741C, SVRR = 150 V / V.
For 741C, SVRR is measured for both supply magnitudes increasing or decreasing
simultaneously, with R3 10K. For same OPAMPS, SVRR is separately specified as
positive SVRR and negative SVRR.
 Parameters of OPAMP
10. Large Signal Voltage Gain:

Since the OPAMP amplifies difference voltage between two input terminals, the

voltage gain of the amplifier is defined as

Because output signal amplitude is much large than the input signal the voltage gain is

commonly called large signal voltage gain. For 741C is voltage gain is 200,000 typically.
 Parameters of OPAMP
11. Output voltage Swing:

The ac output compliance PP is the maximum unclipped peak to peak output voltage

that an OPAMP can produce. Since the quiescent output is ideally zero, the ac output

voltage can swing positive or negative. This also indicates the values of positive and

negative saturation voltages of the OPAMP. The output voltage never exceeds these

limits for a given supply voltages +VCC and VEE. For a 741C it is 13 V.
 Parameters of OPAMP
12. Output Resistance: (RO)

RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground. It is 75 ohm for the 741C OPAMP.
 Parameters of OPAMP
13. Output Short circuit Current :

In some applications, an OPAMP may drive a load resistance that is approximately

zero. Even its output impedance is 75 ohm but cannot supply large currents. Since

OPAMP is low power device and so its output current is limited. The 741C can supply a

maximum short circuit output current of only 25mA.

 Parameters of OPAMP
14. Supply Current :
IS is the current drawn by the OPAMP from the supply. For the 741C OPAMP the supply
current is 2.8 m A.

15. Power Consumption:

Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be

consumed by the OPAMP in order to operate properly. The amount of power

consumed by the 741C is 85 m W.

 Parameters of OPAMP
16. Gain Bandwidth Product:
The gain bandwidth product is the bandwidth of the OPAMP when the open loop
voltage gain is reduced to 1. From open loop gain vs frequency graph At 1 MHz shown
in. fig, It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1.
The mid band voltage gain is 100, 000 and cut off frequency is 10Hz.
 Parameters of OPAMP
17. Slew Rate:
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts / m secs.

To understand this, consider a charging current of a capacitor shown in fig. 7.

17. Slew Rate:

If 'i' is more, capacitor charges quickly. If 'i' is limited to Imax, then rate of change is

also limited.

Slew rate indicates how rapidly the output of an OPAMP can change in response to

changes in the input frequency with input amplitude constant. The slew rate

changes with change in voltage gain and is normally specified at unity gain.

If the slope requirement is greater than the slew rate, then distortion occurs. For the

741C the slew rate is low 0.5 V / m S. which limits its use in higher frequency

applications
 Slew Rate Distortion
v
desired output
waveform SR = v/t = m (slope)

v
t
t
actual output
because of slew
rate limitation

The picture above shows exactly what happens when the slew rate limitations
are not met and the output of the operational amplifier is distorted.
 Parameters of OPAMP
18. Input Offset Voltage and Current Drift:

It is also called average temperature coefficient of input offset voltage or input offset
current. The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in m V / C.
Input offset voltage drift = ( D Vio / D T).
Similarly, input offset current drift is the ratio of the change in input offset current to
the change in temperature. Input offset current drift = ( D Iio / D T).
For 741C,
D Vio / D T = 0.5 m V / C.
D Iio/ D T = 12 pA / C.
 Parameters of OPAMP
19. Power Supply Rejection Ratio

One of the reasons op amps are so useful, is that they can be operated from a wide
variety of power supply voltages.
The 741 op amp can be operated from bipolar supplies ranging from 5V to 18V with
out too many changes to the parameters of the op amp.
The power supply rejection ratio (SVRR) refers to the slight change in output voltage
that occurs when the power supply of the op amp changes during operation.
SVRR = 20 log ( Vs / Vo)
The SVRR value is given for a specified op amp. For the 741 op amp, SVRR = 96 dB
over the range 5V to 18V.
Example 1 A 100 PF capacitor has a
maximum charging current of 150 A. What is
the slew rate?

Solution:
C = 100 PF=100 x 10-12 F
I = 150 A = 150 x 10-6 A

Slew rate is 1.5 V / s.

 Example - 2
An operational amplifier has a slew rate of 2 V /
s. If the peak output is 12 V, what is the power
bandwidth?

As for output free of distribution, the slews determines the maximum frequency of
operation fmax for a desired output swin
Example 3 For the given circuit in fig. 1. Iin(off) = 20 nA. If
Vin(off) = 0, what is the differential input voltage?. If A = 105,
what does the output offset voltage equal?

Solutin:
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = Iin(off) x 1k = 20 nA x 1 k
= 20 V
(ii) If A = 105 then the output offset voltage Vin(off) = 20
V x 105 = 2 volt
Output offset voltage = 2 volts.
 Example 4 R1 = 100, Rf = 8.2 k, RC = 10 k. Assume that the
amplifier is nulled at 25C. If Vin is 20 mV peak sine wave at 100
Hz. Calculate Er, and Vo values at 45C for the circuit shown in fig

The change in temperature T = 45 - 25 = 20C.

Error voltage = 51.44 mV