15/09/2018 Assignment 8

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Started on Saturday, 15 September 2018, 12:13 PM
State Finished
Completed on Saturday, 15 September 2018, 12:13 PM
Time taken 23 secs
Grade 0.00 out of 10.00 (0%)

Question 1
In the circuit below, R1 and R2 are 3.6 and 4.5 kilo-ohms respectively. C1 and C2 are
Not answered 4.6 and 9.1 pico-farads respectively. Assume that the op-amp has a very large gain.
Marked out of 1.00

What is the location of the pole in the transfer function? Give your answer in mega-
radians per second.

Answer:

The transfer function is:

sC1 R1 +1
H (s) =
sC2 R2 +1

The pole is at −1/(R2 C2 ) .

+
The correct answer is: -24.420024420024 /- -0.24420024420024

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15/09/2018 Assignment 8
Question 2
What is the location of the zero in the transfer function? Give your answer in mega-
Not answered radians per second.
Marked out of 1.00
Answer:

The transfer function is:

sC1 R1 +1
H (s) =
sC2 R2 +1

The zero is at −1/(R1 C1 ) .

+
The correct answer is: -60.386473429952 /- -0.60386473429952

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15/09/2018 Assignment 8
Question 3 In the circuit below, assume that the MOS device has a K of 52 milli-siemens per volt,
Not answered and λ of 0.12 per volt. Assume the op-amp has a gain of 689. RL is 77 ohms, and the
input is 1.2 volts.
Marked out of 1.00

What is the output impedance, looking into the source of the MOS device? Give your
answer in milli-ohms. Do not disconnect the opamp while computing this output
impedance; only disregard RL . The above circuit is called a voltage regulator.

Answer:

Current through the MOS device is I D = VI N /RL = 15.584415584416 milli-amperes.

gm of the device is 56.934685750941 milli-siemens.
ro of the device is 0.53472222222222 kilo-ohms.
If there is a perturbation of v at the output, then the voltage at the output of the opamp
is −Av, which is the gate of the nMOS. vgs of the nMOS is −(A + 1)v, and therefore
the current drawn up, into the source is gm (A + 1)v, in addition to v/r o .
ro
Output impedance is 1+g r o (A+1)
, where A is the opamp gain.
m

+
The correct answer is: 25.453839866132 /- 0.25453839866132

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15/09/2018 Assignment 8
Question 4 The circuit below is different from the earlier circuit: (1) it uses a pMOS device as
Not answered opposed to an nMOS, and (2) the op-amp polarities are flipped.
Assume that the pMOS device has a K of 52 milli-siemens per volt, and λ of 0.12 per
Marked out of 1.00
volt. Assume the op-amp has a gain of 689. RL is 77 ohms, and the input is 1.2 volts.

What is the output impedance, looking up into the drain of the pMOS device? Give
your answer in milli-ohms. Do not disconnect the opamp while computing this output
impedance; only disregard RL . The above circuit is called a low-dropout (LDO) voltage
regulator.

Answer:

Current through the MOS device is I D = VI N /RL = 15.584415584416 milli-amperes.

gm of the device is 56.934685750941 milli-siemens.
ro of the device is 0.53472222222222 kilo-ohms.
Apply a voltage v at the output; the voltage at the gate is Av , the current drawn by the
pMOS is gm Av , in addition to v/r o .
Output impedance is r o /(1 + gm r o A), where A is the opamp gain.

+
The correct answer is: 25.490781268823 /- 0.25490781268823

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15/09/2018 Assignment 8
Question 5 The circuit below is a sine-wave oscillator.
Not answered

Marked out of 1.00

The total capacitance in the circuit is 64 pico-farads. What should be the value of R,
such that the circuit oscillates at 2.1 mega-hertz? Give your answer in kilo-ohms.

Answer:

The double-integrator loop oscillator can be analyzed to obtain the frequency of

oscillation at:
ω 0 = 1/(RC) .
C is given to be 32 pico-farads.
R = 1/(ω 0 C) = 1/(2π f 0 C) = 2.3683771293437 kilo-ohms.

+
The correct answer is: 2.3683771293437 /- 0.023683771293437

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15/09/2018 Assignment 8
Question 6 An op-amp circuit is to be designed for a gain of −12. The maximum error tolerable in
Not answered the gain of the circuit is 0.22%. What is the minimum gain of the op-amp that you
require? Give your answer in decibels.
Marked out of 1.00

Answer:

If the opamp has a finite gain of K , then the gain of the circuit works out to:

, where −A is the desired circuit gain.

A
− = −12
1+A
1+
K

The error in the gain is (1 + A)/K .

For the error to be ϵ, the gain of the op-amp, K has to be: (1 + A)/ϵ.

+
The correct answer is: 75.430413429693 /- 1

Question 7 In the same op-amp circuit as in the earlier question, the op-amp also has an input
Not answered offset of 1.7 milli-volts. What is the extra error in milli-volts, because of the input offset?

Marked out of 1.00

Answer:

If the opamp has an input offset of 1.7 milli-volts, this will go through a gain of 1 + 12
to the output.
The net result is 1.7 × 13 milli-volts at the output, when the input is 0.
+
The correct answer is: 22.1 /- 1.105

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15/09/2018 Assignment 8
Question 8 In the same op-amp circuit as in the earlier question, the op-amp has a finite
Not answered bandwidth, i.e., the op-amp transfer function is of the form A

1+s/ω0
, where A is the DC

Marked out of 1.00 gain that you computed earlier in Q6, such that the gain is −12 and the error at DC is
0.22%.
The maximum error from the gain of −12 that you can tolerate at a frequency of 18
mega-hertz is -3 dB. What is ω 0 ? Give your answer in kilo-radians per second.

Answer:

The gain of the circuit works out to:

, where −G is the desired circuit gain.

G
− (1+G)(1+s/ω )
= −12
0
1+
A

To obtain -3dB at a frequency ω , at that frequency the real and imaginary parts will be
equal. This means:
1 + (1 + G)/A = ω/ω 0 ⋅ (1 + G)/A
(1+G)/A
or, ω 0 = ω ⋅
1+(1+G)/A

+
The correct answer is: 248.26821313111 /- 12.413410656556

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15/09/2018 Assignment 8
Question 9 In the circuit below, RA is 16 kilo-ohms and RB is 280 kilo-ohms.
Not answered

Marked out of 1.00

What is the CMRR (common mode rejection ratio) of the circuit? (CMRR is defined as
the ratio of differential gain to common mode gain. Differential gain is the difference of
the outputs by the difference of the inputs. Common mode gain is the average of the
outputs by the average of the inputs.) Give your answer in deci-bels.

Answer:

One can draw the half-circuit, or one can use superposition to work out the answer. If
you draw the half-circuit:
1. The differential mode half circuit looks like an ordinary non-inverting op-amp
amplifier circuit with gain of (1 + 2RB /RA ). This is the differential gain.
2. The common mode half circuit looks like a non-inverting op-amp amplifier with
gain 1.

The CMRR is therefore: 1 + 2RB /RA , expressed in dB.

+
The correct answer is: 31.126050015346 /- 0.1

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15/09/2018 Assignment 8
Question 10 In the circuit below R1 , R2 and R3 are 15, 32 and 45 kilo-ohms respectively.
Not answered

Marked out of 1.00

What is the input impedance of the circuit, Zin ? Give your answer in kilo-ohms.

Answer:

If a voltage v is applied at the input, the (-) terminal of the op-amp is also v. Therefore
the output of the op-amp is v ⋅ (1 + R2 /R3 ). This means that the potential difference
across the resistor R1 is −v ⋅ R2 /R3 . The current drawn from the input is therefore
−v ⋅ R2 /(R1 R3 ) .

The input impedance is therefore −R1 R3 /R2 . Note that the input impedance is
negative!
+
The correct answer is: -21.09375 /- -0.2109375

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