FLIPFLOPS

TECHNICAL SEMINAR REPORT

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ABSTRACT

A flip-flop is a Bistablemultivibrator. The circuit can be made to

change state by signals applied to one or more control inputs and
will have one or two outputs. It is the basic storage element
in sequential logic. Flip-flops and latches are fundamental building
blocks of digital electronics systems used in computers,
communications.

Flip-flops can be divided into common types:

 SR ("set-reset"),
 D ("data" or "delay"]),
 T ("toggle"),
 JK .

SR FLIP- FLOP:

Simple SR flip-flop which is built with NAND logic

gates. Set and reset now become active low signals,
denoted S and R respectively.

D FLIP-FLOP:

The D flip-flop is widely used. It is also known as a "data" or

"delay" flip-flop.
The D flip-flop captures the value of the D-input at a definite portion
of the clock cycle (such as the rising edge of the clock). That
captured value becomes the Q output. At other times, the output Q
does not change. The D flip-flop can be viewed as a memory cell,
a zero-order hold, or a delay line.

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T FLIP-FLOP:
If the T input is high, the T flip-flop changes state ("toggles")
whenever the clock input is strobed. If the T input is low, the flip-
flop holds the previous value.

JK FLIP-FLOP:
The JK flip-flop augments the behavior of the SR flip-flop (J=Set,
K=Reset) by interpreting the J = K = 1 condition as a "flip" or toggle
command. Specifically, the combination J = 1, K = 0 is a command
to set the flip-flop; the combination J = 0, K = 1 is a command to
reset the flip-flop; and the combination J = K = 1 is a command to
toggle the flip-flop, i.e., change its output to the logical complement
of its current value. Setting J = K = 0 maintains the current state.

CONCLUSION:
Flip-flops are used as data storage elements. Flip flop circuit
mainly involves in bounce elimination switch, data storage, data
transfer, latch, registers, counters, frequency division, memory,
etc.

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TABLE OF CONTENT
 CHAPTER : 1
INTRODUCTION ………………………………………………………………… 8
1.1 FLIPFLOPS………………………………………………………………...8
 CHAPTER : 2 TYPES OF FLIPFLOPS
 2.1 SR FLIPFLOP………………………………………………………………9
 2.2 D FLIPFLOP……………………………………………………………….12
 2.3 T FLIPFLOP……………………………………………………………….13
 2.4 JK FLIPFLOP……………………………………………………………..15
 CHAPTER : 3 APPLICATIONS OF FLIPFLOPS…………………………….17
 REFERENCES……………………………………………………………………..18

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CHAPTER: 1
INTRODUCTION

A flip-flop or latch is a circuit that has two stable states and can be
used to store state information. A flip-flop is a bistable multivibrator. The
circuit can be made to change state by signals applied to one or more
control inputs and will have one or two outputs. It is the basic storage
element in sequential logic. Flip-flops and latches are fundamental
building blocks of digital electronics systems used in computers,
communications, and many other types of systems.

1.1 FLIPFLOPS
A flip-flop is a device which stores a single bit (binary digit) of data; one
of its two states represents a "one" and the other represents a "zero".
Such data storage can be used for storage of state, and such a circuit is
described as sequential logic in electronics. When used in a finite-state
machine, the output and next state depend not only on its current input,
but also on its current state (and hence, previous inputs). It can also be
used for counting of pulses, and for synchronizing variably-timed input
signals to some reference timing signal

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CHAPTER 2
TYPES OF FLIPFLOPS

Flip-flops can be divided into common types: the SR ("set-

reset"), D ("data" or "delay"), T ("toggle"), and JK. The behavior of a
particular type can be described by what is termed the characteristic
equation, which derives the "next" (i.e., after the next clock pulse)
output, Qnext in terms of the input signal(s) and/or the current output.

2.1 SR Flipflop-
SR Flip Flop is an arrangement of logic gates that maintains a stable
output even after the inputs are turned off.
❖ This simple flip flop circuit has a set input (S) and a reset input (R).
The set input causes the output of 0 (top output) and 1 (bottom
output). The reset input causes the opposite to happen (top = 1,
bottom =0).
❖ Once the outputs are established, the wiring of the circuit is
maintained until S or R go high, or power is turned off to the circuit.

❖
❖ An animation of a SR latch, constructed from a pair of cross-coupled NOR gates.
Red and black mean logical '1' and '0', respectively
.

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❖ An animated SR latch. Black and white mean logical '1' and '0',
respectively.
(A) S = 1, R = 0: set
(B) S = 0, R = 0: hold
(C) S = 0, R = 1: reset
(D) S = 1, R = 1: not allowed
Transitioning from the restricted combination (D) to (A) leads to an
unstable state.
❖ When using static gates as building blocks, the most fundamental
latch is

SR latch -

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Gated S-R Flip-Flop
● A gate input is added to the S-R flip-flop to make the flip-flop
synchronous.
● In order for the set and reset inputs to change the flip-flop, the gate
input must be active (high).
● When the gate input is low, the flip-flop remains in the hold
condition.

Gated SR latch operation

E/C Action

0 No action (keep state)

1 The same as non-clocked SR latch

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2.2 D flip-flop

D flip-flop symbol

The D flip-flop is widely used. It is also known as a "data" or "delay" flip-

flop.
The D flip-flop captures the value of the D-input at a definite portion of
the clock cycle (such as the rising edge of the clock). That captured
value becomes the Q output. At other times, the output Q does not
change. The D flip-flop can be viewed as a memory cell, a zero-order
hold, or a delay line.
Truth table:

Clock D Qnext

Rising edge 0 0

Rising edge 1 1

Non-Rising X Q

('X' denotes a Don't care condition, meaning the signal is irrelevant)

Most D-type flip-flops in ICs have the capability to be forced to the set
or reset state (which ignores the D and clock inputs), much like an SR
flip-flop. Usually, the illegal S = R = 1 condition is resolved in D-type
flip-flops. By setting S = R = 0, the flip-flop can be used as described
above. Here is the truth table for the others S and R possible
configurations:

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 Inputs Outputs

S R D > Q Q'

0 1 X X 0 1

1 0 X X 1 0

1 1 X X 1 1

2.3 T flip-flop

A circuit symbol for flip-flop a T-type

If the T input is high, the T flip-flop changes state ("toggles") whenever

the clock input is strobed. If the T input is low, the flip-flop holds the
previous value. This behavior is described by the characteristic equation:

(expanding the XORoperator)

and can be described in a truth table:

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 T flip-flop operation[28]

Characteristic table Excitation table

Comment Comment

0 0 0 hold state (no clk) 0 0 0 No change

0 1 1 hold state (no clk) 1 1 0 No change

1 0 1 toggle 0 1 1 Complement

1 1 0 toggle 1 0 1 Complement

When T is held high, the toggle flip-flop divides the clock frequency
by two; that is, if clock frequency is 4 MHz, the output frequency
obtained from the flip-flop will be 2 MHz. This "divide by" feature has
application in various types of digital counters. A T flip-flop can also
be built using a JK flip-flop (J & K pins are connected together and
act as T) or a D flip-flop (T input XOR Qprevious drives the D input).

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2.4 JK flip-flop

A circuit symbol for a positive-edge-triggered JK flip-flop

JK flip-flop timing diagram

The JK flip-flop augments the behavior of the SR flip-flop (J=Set,
K=Reset) by interpreting the J = K = 1 condition as a "flip" or toggle
command. Specifically, the combination J = 1, K = 0 is a command to
set the flip-flop; the combination J = 0, K = 1 is a command to reset
the flip-flop; and the combination J = K = 1 is a command to toggle
the flip-flop, i.e., change its output to the logical complement of its
current value. Setting J = K = 0 maintains the current state. To
synthesize a D flip-flop, simply set K equal to the complement of J.
Similarly, to synthesize a T flip-flop, set K equal to J. The JK flip-flop
is therefore a universal flip-flop, because it can be configured to work
as an SR flip-flop, a D flip-flop, or a T flip-flop.
The characteristic equation of the JK flip-flop is:
and the corresponding truth table is:

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 JK flip-flop operation[28]

Characteristic table Excitation table

J K Comment Qnext Q Qnext Comment J K

0 0 hold state Q 0 0 No Change 0 X

0 1 reset 0 0 1 Set 1 X

1 0 set 1 1 0 Reset X 1

1 1 toggle Q 1 1 No Change X 0

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CHAPTER 3
Applications of Flip-Flops
These are the various types of flip-flops being used in digital
electronic circuits and the applications of Flip-flops are as specified
below.

● Counters
● Frequency Dividers
● Shift Registers
● Storage Registers

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REFERENCES

This Report follows Chapter FLIPFLOPS of the textbook

 Anand kumar,Switching theory and logic design : second edition

 With extra examples and teaching materials taken mostly, with multiple
references, from the Web.

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