Bus Organization of 8085 Microprocessor
Bus Organization of 8085 Microprocessor
2. Data bus –
ADDRESSING MODES
The various ways of specifying data (or operands) for instructions are called
as addressing modes.
The 8085 addressing modes are classified into following types:
Ex: (1). ADI DATA ; Add immediate the data to the contents of the accumulator.
(2).LXIH 8500H : Load immediate the H-L pair with the operand 8500H
(3). MVI 08H ; Move the data 08 H immediately to the accumulator
(4). SUI 05H ; Subtract immediately the data 05H from the accumulator
(ii) Direct Addressing mode
The mode of addressing in which the 16-bit address of the operand is directly available in the
instruction itself is called Direct Addressing mode. i.e., the address of the operand is available in
the instruction itself. This is a 3-byte instruction.
Ex: (1). LDA 9525H; Load the contents of memory location into Accumulator.
(2). STA 8000H; Store the contents of the Accumulator in the location 8000H
(3). IN 01H; Read the data from port whose address is 01H.
Ex: (1). LXIH 9570H : Load immediate the H-L pair with the address of the location 9570H
MOV A, M : Move the contents of the memory location pointed by the H-L pair to
accumulator
Depending upon the size of machine codes, the 8085 instructions are
classified into three types.
One-byte instructions:
A 1 byte instruction include the opcode and the operand in the 8 bits only
which is one byte.
Two-byte instructions
The two byte instruction is one which contains an 8-bit op-code and 8-bit
operand (Data).
Ex: 1. MVI A, 09 Hex code = 3E, 09 (two bytes)
Three-byte instructions
In a three byte instruction the first byte is opcode and second and third bytes
are operands i.e. 16-bit data or 16-bit address.
8085: The main reason of multiplexing address and data bus is to reduce the
number of pins for address and data and dedicate those pins for other several
functions of microprocessor. These multiplexed set of lines used to carry the
lower order 8 bit address as well as data bus
The address bus has 8 signal lines A8-A15. They are unidirectional. The
other 8 addressA0-A7 bits are multiplexed with the 8 data bits D0-D7.
Therefore the bits AD0-AD7 are bi-directional. They serve as A0-A7 and
D0-D7 at the same time.
The address's high order bits remain on the bus for 3 clock periods. The low
order bits remain for only 1 clock period and may be lost if they are not saved
externally. An external latch is used to save the value of AD7-AD0 when it is
carrying the address bits so that the entire address remains for the 3 clock
cycles.
ALE will go high and forcing enable pin of Latch. This will make the latch
transparent. It means whatever will be input, will be output. Presently input
address is A0-A7.Therefore output is A0-A7.
When ALE=0, then AD0-AD7 will now be used as data bus as the output is
D0-D7