Diagramas DVD Nisato DVZ308 PDF

5 4 3 2 1
L4 NC/FB0805
STB12V
D12 L35
2 1 +12V 2 3 L28 MIC12V
MIC12V
C96 10U/1A_SMD C95 Q3 FB0805
RS1K_SMD 8550 15.7mA-19mA
100UF/25V
1
100UF/25V R10
10K
BR1 R9
GB206 1K/0805 P+5V
R7
10K
1
4
FB7 FB
3
R8 STANDBY STBY
1 2 1
1
4
STBY
D 4K7 D
Q2
C1
3904
2
101
L2 EEL19
1mH/0.05A/6X8 T2
1 12
D15 L30
+ EC1 EC3 +
10uF/400V R163 C99 5V 2 1 +5V L36 1206 P+5V
P+5V
10uF/400V
C87 10UH/2A BC11 C39 BC6
100K/0.5W 222/1KV
SR360
0.8A-1.3A
2 1 1000UF/16V 0.1UF 470UF/16V L6 NC/FB0805 0.1UF
GND
4.7U/1A_0805 2 11
GND L3
D16 3 2 A+5V
RS1K_SMD Q4 USB/DIGI AUDIO/RGBCVBS/IR

R11 8050/DIP
STB12V
1
3
R3 1K/0805
100R/0805 10
F+
F+
AC:200mA-1.4mA
4
DC:140mA-93mA
3
R4 U10
EN
BP
D
20
TNY-275PN 9 GND
R154
S
S
8
+
5 0R/0.5W/1206
7
4
C C
EC4 C97 C106
2
10uF/25V
F2 100UF/35V 0.1UF R20 STB-25V
T2AL/250V 1K
1
R21
D13 Q7
10K
7 3 2 F-
F-
1
BT8550 C98
RS1K_SMD R152
AC:200mA-1.4mA
100UF/35V
2K L8
Z2 DC:140mA-93mA
NC/FB0805 7.5V/1W_SMD
2
510R/0805
CON2 D14 L5 L7 NC/FB0805 R22
ON/OFF Button(SW) 6 2 1 STB-25V L1
C109 -12V P-12V
P-12V
C101 10UH/1A_SMD C102
1
C94 FB0805
RS1K_SMD
100UF/50V 100UF/50V
0.1UF R23 Z1 11mA-19mA
12V/1W_SMD 100UF/25V
Q5 10K
2 3
5551 Q6
R19 5401
3 2
1
2
10K
2
1
CON1
~AC100-240V INPUT VOLTAGE R13 STB12V
10K
R18
100K
B B
U12 PC817
R5 100 R150 5V
4 4 1 1
680R +5V
3 3 2 2
R153 R79
R6 1K 4.7K
100K
R151 C104
1K 0.1UF
3
IC1
1
TL431
Ajacent to relevant component demoting specific R149
Y1
2
component shall be replaced only by the 4.7K

component specitied in the circuit for safety reasons
Note:Damage rquring service,unplug this produce 222/400V
from the wall oulet and refer servicing
to qualifled service presonal when
A replacement parts are required sure A
the service
technician has used replacement parts specified
by the manufactruer or have the same
characteristics,as the original
parts
Unauthorized substitution may result in
fire,electric shock or other hazards
upon Design: MODEL: DV5312 TITLE: AC TO DC
completion of any service or repairs this
product,Ask the service thechnician to perform Checked: PART NO.: DWG NO.:DV5312-YL01-03
safety check to determinw that product is in
proper operatin condition
Apprd: SHEET: 1 OF 5 VER: A
EMC PART
SHEN ZHEN MTC MULTIMEDIA CO.,LTD
5 4 3 2 1
5 4 3 2 1
CVBS_C CVBS
CVBS_C
P+12V
P+12V
FS1: H=RGB L=CVBS C148 J1
150pF AUDIO 6CH
R207
FS2 FS3 SCART CFG 1K2
00 4:3 TP7
LMAIN-OUT 1
01 TV 16:9/TV
CON12 R247 R248
Cr/YC-Y_OUT TP80 10 16:9 Y_R_V Cr/YC-Y Cr/YC-Y_OUT CVBS 7
1 Y_R_V
D YUV-Y TP79 R202 D
2 Cb/YC-C_OUT TP78 C132 0R TP8
3 1K5 NC
RGB/CVBS TP77 150pF RMAIN-OUT 2
4 CVBS TP76
5 16:9/TV TP75 R1
6
3
TP83 22
7 LMAIN-OUT Q24
8 LMAIN-OUT FS2 1
RMAIN-OUT BT3904 TP9
9 RMAIN-OUT
SL-OUT 3
9PIN/2.0 P+5V CVBS_G_Y YUV-Y
2
CVBS_G_Y
TP73
TP72 C143 8
3
150pF
1 Q1 R176 TP13
FS3
BT3904 75R SR-OUT 4
3
R249 R250
FS1 1 Q23 C_B_U Cb/YC-C Cb/YC-C_OUT LMAIN-OUT TP14
C_B_U
BT3904 CEN-OUT 5
C138 0R NC
RGB/CVBS 150pF
2
9
TP12
TP11 R234 TP19
TP10 LFE-OUT 6
TP17 4K7
TP67 P+5V
TP48 Y_C_CVBS
TP49 SCART config circuit
TP50 C174
TP47 150pF
C C
R230 R229 R204 R239
10K 10K 10K 2.2K
CON3
1 -25V
F+ -25V
2 F-
3 F-
F+
J3
4
5 P+5V AV4
DATA P+5V
6 R205 75R
CLK FPC_DOUT
7 R201 75R
FPC_CLK
8 STB R192 75R Cr/YC-Y_OUT 1
IRRCV FPC_STB TP3
9 IRRCV
9PIN/2.0 C158 C193 C194 C195 J2

101 101 101 101
COAX_SPDIF 2
TP4
5 7 CVBS TP20
Cr/YC-Y 2 1 Cb/YC-C TP22 YUV-Y 3

TP23 TP5
4 3
6
9
Cb/YC-C_OUT 4
TP6
SVIDEO&CVBS
B B
6
TP81
TP82
D5V
3
R210 C121
S/PDIF_OUT Q22 0.1uF CON13
S/PDIF_OUT 1
R217 OPTICAL_SPDIF
56R BT3904 Close to Q22 P+5V D5V
1
2
3
2
2R/0805
3PIN/2.0
R164 33R
R214
27R
C153
R155
COAX_SPDIF
56R
0.1uF
R14
C152
22R
A 22pF A
Design: MODEL: DV5312 TITLE: JACK+VIDEO+SCART
Checked: PART NO.: DWG NO.:DV5312-YL01-03

5 4 3 2 1
5 4 3 2 1
TP1
TP18
TP2
TP71
TP70
CON10
1 MIC12V
MIC12V
2
D 3 MIC1 R254 47K D
4
5 MIC2
5P/2.0 R220 43K R218 2.2K

MIC1 R262 R311 0R LRIN APWM_L- C128 160pF
2K7
C163 -12VA
4
1.5nF U7A
MIC2 R263 2 - LM4558
2
2K7 R221 43K 1 R199 1K LMAIN-OUT
R271 D1 D2 LMAIN-OUT
APWM_L+ 3 +
R272 NC/4148
NC/1K
3
NC/4148 +12VA
0R/NC R252 R251 MUTE R186 Q27 C131
1
8
47K 10K BT3904 1nF
1
2K2
2
DSPVCC33
R257 47K
R273
NC/1K R243 43K R242 2.2K
APWM_R- C123 160pF
MIC_VOCAL R12
MIC_VOCAL NC/0R C192 -12VA U7B
4
1.5nF LM4558
6 -
R219 43K 7 R231 1K RMAIN-OUT
R274 RMAIN-OUT
APWM_R+ 5 +
1K/NC
3
+12VA R232
R255 10K MUTE R198 Q25 C124
1
8
47K BT3904 1nF
2K2
2
C C
R290 47K
DSPVCC33 R285 43K R281 2.2K

ADCVCC33 APWM_SL- C216 160pF
-12VA
R269 R309
4
NC/10K C219 U8A
U11 NC/0R 1.5nF LM4558
2 -
R280 1k
1 14 R286 43K 1 SL-OUT
AIN DVDD DGND AMCLK
AIN 2 SDOUT MCLK 13 AMCLK APWM_SL+ 3 +
3
ABCLK 3 12 ALRCLK ALRCLK
ABCLK BCLK LRCLK R282 2K2
4 11 +12VA R292 MUTE 1 Q32 C217
FMT NOHP R310 DSPVCC33 FB6 FB ADCVCC33 R288 10K BT3904 1nF
5 10
8
CAP AGND ADCVCC33 0R 47K
6 VREF AVDD 9
7 8 LRIN +12VA R260 33R P+12V
2
RIN LIN P+12V
+ C211 C212
+ C208 C206 + C209 CE2632 C198 C229 C228 +
100U/16V 104 C200
10u/16V 104 10U/16V 0.1uF 0.1uF 0.1uF 47uF/16V
R289 47K
R284 43K R278

APWM_SR- C214 160pF
2.2K -12VA R261 33R P-12V P-12V
-12VA
4
C278 U8B
1.5nF 6 - LM4558 C184 C226 C227 +
R283 43K R277 1k C201
7 SR-OUT
3
APWM_SR+ 5 + 0.1uF 0.1uF 0.1uF 47uF/16V
MUTER279 2K2 1
+12VA R291 Q31
R287 10K BT3904
8
47K C215
2
1nF
R253 4.7K R43 3.3K

3
1 Q28 +
B
MUTE_CTL MUTE_CTL BT3904 C197 B
10uF/16V P-12V P-12V
2
AMUTE or MUTE_CTL: R306 47K

Hi: Mute. +12V D5V
D23 LL4148 R301 43K R297 2.2K
1 2 2 3 APWM_CEN- C222 160pF
-12VA
R182 100K Q29 R159 C225
4
BT8550 100K 1.5nF U9A
R200 10K 2 LM4558
1
-
R302 43K R296 1K
1 CEN-OUT
Q20 BT8550 APWM_CEN+ 3 +
3
2 3 MUTE
+12VA R308 MUTE R298 Q34
1
R304 10K BT3904 C223
8
2
C231 47K 2K2 1nF

R258 100uF/16V R256
1
2
D22 47K R259 100K
LL4148 2K
1
R305 47K
C196
47uF/25V R300 43K R294 2.2K
APWM_LFE- C220 160pF
C224 -12VA
4
1.5nF
6 - U9B
R299 43K 7 LM4558 LFE-OUT
APWM_LFE+ 5 +
3
R293
+12VA 1K MUTE R295 Q33
1
R303 R307 BT3904 C221
8
47K 10K 2K2 1nF
2
A A
Design: MODEL: DV5312 TITLE: AUDIO+KARAOKE

5 4 3 2 1
5 4 3 2 1
DSPVCC33
R175 + C179
4.7R 100uF/16V
2
Q26 1 R181 220R
LD_DVD
8550
OPU HD65PS Others
DSPVCC33 R175: 3.3R 4.7R
3
D D
R189: 3.3R 4.7R
BEMF
OPU HD65PS Others R189 + C178
R221: 3.3R 4.7R 4.7R 100uF/16V Current Type(Default)
R224: 3.3R 4.7R C136
C146 C141 C130 470P R177
CN201 is used for Sanyo/Samsung/Sony OPUs 1nF 1nF 470P SP_M- SPDL_SENS-
SPDL_SENS-
2
R161=300R, for HOP1200W only 2K
Q21 1 R167 220R
LD_CD
8550 include arima , R161=0R
DVDLD
1 2
3
R161 DSPVCC33
CON14 OPU_HFM R216 2R/0805 P+5V R222
24Pin OPU connector C134 1R D24 4148
CDLD 1nF 0R
24 R202=300R, for HOP1200W only VR_DVD + C230 1 2
GND-LD DVDLD VR_CD 220uF/16V
DVD-LD 23
22 D21 4148
NC OPU_HFM
HFM 21
20 OPU5V R168
MD CDLD VC1 R15 33R 2.1V SP_MOT- SPDL_SENS+
CD-LD 19 VC SPDL_SENS+
18 VR_DVD 2K
VR-DVD VR_CD PDIC Control:
VR-CD 17
NC 16 DVD=LOW
E 15 RF_E CD=HIGH
14 OPU5V RFA5V
VCC VC1 2.1V
VC(VREF) 13
12 P+5V
GND/PD R317 PDIC Control:
F 11 RF_F
B 10 RF_B 3.3K DVD=LOW
1
A 9 RF_A CD=HIGH
RF 8 RF
7 CD_DVD D18
CD/DVD_SW CD_DVD
6 RF_D Q37 1N4002
D 8550 1N4002
C 5 RF_C
2
4 TACT-
2
T- TACT+ D19
T+ 3 1
2 FACT+ C147 C166 1 2
F+ FACT- 0.1uF 0.1uF + C188
C
F- 1 C
2
47uF/16V
3
GND
GND
3V3_DRV 0R 1 Q36 1V8_DRV0R 1 Q35

R223 8550 R226 8550
2
26
25
3
DSPVCC33 DSPVCC18
Q38
8550
3
R224 R227
20K 1% 4K3 1%
U5
AM5888S
(value) is for AM5888s
Close to motor driver. 1.25V 1.25V
3V3_FB 1V8_FB
FOCUS_S 1 28
CON9 VINFC STBY DRVSB
3V3_DRV 2 27 VC2 DSPVCC33 R225 R228
TACT- TP60 FOCUS_S CFCERR1(TRB_1) BIAS 12K 1% 10K
TR- 24 FOCUS_S
23 TACT+ TP88 SLED_S SLED_S 1V8_FB 3 26 TRACK_S
TR+ FACT- TP59 TRACK_S CFCERR2(REGO2) VINTK
FO- 22 TRACK_S
21 FACT+ TP87 SPDL_S SLED_S 4 25 1V8_DRV R160 R165
FO+ MD_DVD TP58 SPDL_S VINSL+ CTKERR1(TRB_2)
MD(DVD) 20 1K 1% 33K
19 OPU_HFM TP86 3V3_FB 5 24
VCC/NC VR_DVD TP57 VINSL-(REGO1) CTKERR2(NC)
VR(DVD) 18
17 CLOSE 6 23 SPDL_S
GND(DVD) CLOSE VOSL(FWD) VINLD
16 DVDLD TP56
LD(DVD) CDLD TP85 OPEN
LD(CD) 15 OPEN 7 VNFFC(REV) PREGND 22
14 VR_CD TP55 R240
VR(CD) P+5V C129
GND(CD) 13 1K 1%
12 MD_CD TP54 0.1uF
MD(CD) R17 0R CD_DVD P+5V
NC/SEL 11 CD_DVD 8 VCC PVCC2 21
10 RF RF
V-RF RF_C LOAD-
V-C 9 RF_C 9 PVCC1(LOAD-) VNFTK(NC) 20
8 RF_B +
V-B RF_B
7 RF_A RF_A C175 C156 LOAD+ 10 19
V-A RF_D 220uF/16V 0.1uF PGND(LOAD+) PGND(VCC2)
V-D 6 RF_D
5 RF_F RF_F SL_MOT+ 11 18 SP_M-
V-F RF_E VOSL-(VOSL+) VOLD-
V-E 4 RF_E
3 OPU5V TP61 SL_MOT- 12 17 SP_MOT+
Vcc VC1 TP39 VOSL+(VOSL-) VOLD+
Vs 2
B 1 FACT- 13 16 TACT- B
GND VOFC- VOTK-
FACT+ 14 15 TACT+
VOFC+ VOTK+
GND1
GND
24P/0.5
29
30
TP46
TP62
TP51 MD_DVD
TP63
TP52 MD_CD
TP64
TP53 R236 CON7
TP84 NC
R185 SL- 1 SL_MOT- TP68
NC SL+ 2 SL_MOT+ TP69
HOMESW 3 HOMESW TP27
VR_CD R244 100R GND 4
SP+ 5 SP_MOT+ TP40
SP- 6 SP_MOT- TP41
VR_DVD R245 100R
6P 2.0: SLED & SPINDLE Con
R235 R187
100R 100R DSPVCC33
CON8
5 LOAD+ TP42
LOAD+ 4 LOAD- TP44
LOAD- 3
OUTSW 2 TP65 R172 R162 R197
GND 1 4.7K 4.7K 4.7K
INSW
HOMESW
5p 2.0: TRAY_Con IN_OUT_SW HOMESW
INSW IN_OUT_SW
INSW
TP66
A A
Design:
Checked:
5 4 3 2 1
Apprd:
5 4 3 2 1
Important power supply!

Note: While using different OPU, FB1
use the same parameter for R206 51K VDDPWM DSPVCC33
AM5888S FB
R213 51K
22K C133 + C185
While using AM5888S R209 104 100uF/16V
R211 51K
Close to Vaddis!
FOCUS_S R206 51K
FOCUS_S TRACK_S R213 51K
TRACK_S FB5
SPDL_S R209 22K VDD1AFE
SPDL_S
SLED_S
SLED_S R211 51K FB FB3 Crystal
VDDAFE Use it to connect the shell of the crystal with ground.
DSPVCC33
FB
15.4K 1%
C164 C159 C161 C160
SPDL_SENS+
0.1uF
SPDL_SENS-
D Flash speed <= 70 nS. + PH1 D
MIC_VOCAL
. 1
FCU_IOWR#
FCU_IORD#
FCU_WAIT#
SLED_PWM
1nF 1nF 27nF 27nF C155 C125 C186
LD_DVD
MD_DVD
FCU_CS2#
FCU_CS3#
FCU_SCLK
If plan to use 90ns Flash, it needs to be verified by s/w.
LD_CD
FCU_RST
MD_CD
10nF 104 100uF/16V
FCU_IRQ
RF_E
RF_B
RF_A
RF_F
RF_D
RF_C
OSCOUT C135 33pF
VC
U2
R233
C182
MEMADD15 1 48 MEMADD16 C181 1nF
MEMADD14 A15 A16 FB4
2 47
TRACK_PWM
FOCUS_PWM
SPDL_SENS+
SPDL_SENS-
A14 BYTE# VCCQ
MIC_VOCAL
SPDL_PWM
MEMADD13 3 46 C168 1nF RF VDDDAC
I2C_CLK
I2C_DAT
A13 GND RF DSPVCC33
MEMADD12 4 45 MEMDAT15 FB
MD_DVD
RESOUT
LD_DVD
A12 DQ15
MD_CD
MEMADD11 5 44 MEMDAT7 C142
LD_CD
A11 DQ7
VREF
RF_E
RF_B
RF_A
RF_F
RF_D
RF_C
MEMADD10 6 43 MEMDAT14 + C187 R158
RFN
33pF
RFP
A10 DQ14
MEMDAT9
MEMDAT1
MEMDAT8
MEMDAT0
MEMADD0
MEMCS0#
VC
MEMADD9 7 42 MEMDAT6 C127 1M
MEMRD#
A9 DQ6 100uF/16V
MEMADD8 MEMDAT13 104 Y4
100R
100R
8 A8 DQ13 41
VDD1AFE
MEMADD19 R195 0R MEMDAT5 Close to Vaddis!
VDDPWM
9 40 27.000MHz
VDDAFE
VDDAFE
NC A19 DQ5 MEMDAT12
10 A20 DQ12 39
MEMWR# 11 38 MEMDAT4 TP181
TP182 FB2 FB
RESET# WE# DQ4 FLASHVCC VDDPLL OSCIN C137 33pF
R190
R184
12 37
.
RP# VCC FLASHVCC DSPVCC18
FLASHVCC 13 36 MEMDAT11 DSPVCC18
VPP NC DQ11 MEMDAT3 C150 C183 + C180
14 35
1
R194 NC WP# NC DQ3 MEMDAT10 104 104
MEMADD18
15
16
A19 RY/BY# DQ10 34
33 MEMDAT2
DSPVCC33 100uF/16V Close to Vaddis!
MEMADD17 A18 DQ2 MEMDAT9
17 A17 DQ9 32
MEMADD7 18 31 MEMDAT1
A7 DQ1
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
MEMADD6 19 30 MEMDAT8 Close to Pin37 of U15
MEMADD5 A6 DQ8 MEMDAT0 U1A
20 A5 DQ0 29
MEMADD4 21 28 MEMRD#
GPIO[56]/FCU_RST
GNDREF
RESOUT
VREF
F
GPIO[9]/MEMDAT[9]
MEMDAT[1]
GPIO[8]/MEMDAT[8]
MEMDAT[0]
D
C
RFN
MEMRD#
MEMCS0#
GPIO[59]/FCU_CS2#
GPIO[58]/FCU_CS3#
GPIO[57]/FCU_WAIT#
GNDC
VDDC
IGPIO[54]/PWMCO[5]
GPIO[53]/PWMCO[4]
GPIO[52]/PWMCO[3]
GPIO[51]/PWMCO[2]
VDDP
MEMADD[0]
GPIO[63]/MEMCS2#
GPIO[62]/FCU_IORD#
GPIO[61]/FCU_IOWR#
GPIO[60]/FCU_SCLK
GNDPWM
GPIO[50]/PWMCO[1]
DVD_LD
CD_LD
DVD_MD
CD_MD
VC
VDDPWM
GPIO[49]/PWMCO[0]
IGPIO[55]/FCU_IRQ
VDDSAFE
GND1AFE
GNDAFE
K
E
B
A
VDD1AFE
RFP
G
VDDAFE
MEMADD3 A4 OE#
22 A3 GND 27 DSPVCC33
MEMADD2 23 26 MEMCS0#
MEMADD1 A2 CE# MEMADD0
24 A1 A0 25
SST39VF800 R16
390 Ohm 1%
MEMDAT2 1 156 Close to
2
[39VF400/800/160] MEMDAT10 MEMDAT[2] GNDDACBS2
2 155
MEMDAT[10]/GPIO[0] RSET Vaddis R241
Flash select R195 R194 DSPVCC33 R188 0R FLASHVCC
MEMDAT3
MEMDAT11
3 MEMDAT[3] DAC1 154
VDDDAC
C_B_U
C_B_U D20 4k7
4 MEMDAT[11]/GPIO[1] VDDDAC 153 LL4148
Intel NC 0R MEMDAT4
MEMDAT12
5 MEMDAT[4] DAC2 152 Y_R_V
CVBS_C Y_R_V
6 MEMDAT[12]/GPIO[2] DAC3 151 CVBS_C RESET#
1
AMD/SST 0R NC P+5V R169 NC/0R MEMDAT5
MEMDAT13
7 MEMDAT[5] VDDDAC 150 VDDDAC
CVBS_G_Y
8 MEMDAT[13]/GPIO[3] DAC4 149 CVBS_G_Y + C191
MEMDAT6 9 148
MEMDAT14 MEMDAT[6] GNDDAC_D Y_C_CVBS 10uF/16V
10 MEMDAT[14]/GPIO[4] DAC5 147 Y_C_CVBS
Vaddis 9
11 146 OSCIN
75R 1%
75R 1%
75R 1%
75R 1%
75R 1%
GNDC XIN
MEMDAT7 12 MEMDAT[7] XO 145 OSCOUT UART:
MEMDAT15 13 144 VDDPLL
MEMDAT[15] VDDPLL For customer model, please just keep
14 VDDC GNDPLL 143
RESET# test point close to Vaddis.
MEMADD16
15 VDDP ZR36962 RESET# 142
R173
R215
R208
R174
R193
16 MEMADD[16] GNDC 141
C CON6 17 140 DUPRD1 R191 10K MUTE_CTL C
FCU_SCLK TP24 MEMADD15 MEMCS1#/GPIO[5] VDDC DUPRD1 MUTE_CTL
TP38 2 2 1 1 18 MEMADD[15] GPIO[48]/DUPRD1 139
4 3 DSPVCC33 TP25 MEMADD14 19 138 DUPTD1 DUPTD1 R2 1K5 FS3
MEMDAT13 4 3 MEMDAT12 TP32 MEMADD13 MEMADD[14] GPIO[47]/DUPTD1 DUPRD0 DUPRD0 R203 10K FS2 FS3 ADD FOR (D)
TP36 6 6 5 5 20 MEMADD[13] GPIO[46]/DUPRD0 137 FS2
FCU_IRQ 8 7 MEMADD12 21 136 DUPTD0 DUPTD0 R180 180R FS1
TP37 8 7 MEMADD[12] GPIO[45]/PWMCO[5]/DUPTD0 FS1
10 9 FCU_RST TP43 MEMADD11 22 135 DSPVCC33
10 9 MEMADD[11] VDDP DSPVCC33
12 12 11 11 FCU_CS2# TP45 MEMADD10 23 MEMADD[10] IGPIO[44] 134 IRRCV
IRRCV MUX GPIOs
FCU_WAIT# 14 13 FCU_CS3# TP33 MEMADD9 24 133 FPC_DOUT
TP35 14 13 MEMADD[9] GPIO[43]/TDO FPC_DOUT R26
16 15 MEMADD8 25 132 FPC_CLK
16 15 MEMWR# MEMADD[8] GPIO[42]/TCK FPC_STB FPC_CLK 10K
26 MEMWR# GPIO[41]/TDI/NMI 131 FPC_STB C191
SD/MMC/MS MEMADD18 27 130 INSW
MEMADD17 MEMADD[18]/GPIO[6] GPIO[40] CD_DVD'' INSW CD_DVD + RESET#
28 129 10uF/16V
3
MEMADD7 MEMADD[17] GPIO[39] DRVSB FB8 C279 CD_DVD
29 MEMADD[7] GPIO[38] 128 DRVSB R25
MEMADD6 30 127 IN_OUT_SW MBW2012-221 1nF 1 Q8 C2
2
MEMADD[6] IGPIO[37]/TMS/NMI CLOSE IN_OUT_SW BT3904
31 GNDC GPIO[36] 126 CLOSE 4k7 0.1UF
MEMADD5 32 125 OPEN D20
MEMADD4 MEMADD[5] GPIO[35] HOMESW OPEN
2
33 MEMADD[4] GPIO[34]/RAMCKE/SPDIFIN 124 HOMESW 4148 R24
MEMADD3 34 123 AIN 15K
MEMADD[3] GPIO[33]/AIN/SPDIFIN AIN
35 122 S/PDIF_OUT
MEMADD2 VDDP GPIO[32]/SPDIFO ABCLK S/PDIF_OUT
1
CON5 36 MEMADD[2] GPIO[31]/ABCLK 121 ABCLK
FCU_IORD# R157 0R MEMADD1 37 120 ALRCLK
MEMADD19 MEMADD[1] GPIO[30]/ALRCLK ALRCLK
1 38 MEMADD[19]/IGPIO[7] VDDP 119
39 118 R270 AMCLK
FCU_IOWR# R156 0R 2 USB_DP USBVDD GPIO[29]/AMCLK 33R AMCLK
40 USBDP/GPO[67] GNDC 117
USB_DN 41 116 APWM_L-
2PIN/2.0 USBDN/GPO[68] GPIO[28]/AOUT[0]/APWM0- APWM_L+ APWM_L-
42 USBGND GPIO[27]/APWM0+ 115 APWM_L+
RAMADD4 43 114 APWM_R-
RAMADD3 RAMADD[4] GPIO[26]/AOUT[1]/APWM1- APWM_R+ APWM_R-
44 RAMADD[3] GPIO[25]/APWM1+ 113 APWM_R+
RAMADD5 45 112 APWM_SL-
RAMADD[5] GPIO[24]/AOUT[2]/APWM2- APWM_SL+ APWM_SL-
46 VDDIP IGPIO[23]/APWM2+ 111 APWM_SL+
RAMADD2
47
48
GNDC
RAMADD[2]
GNDAPWM
GPIO[22]/AOUT[3]/APWM3-
110
109 APWM_SR-
APWM_SR-
EEPROM
RAMADD6 APWM_SR+ U6
RAMDQM2/RAMCKE/GPO[66]
49 108
RAMCKE/SDI_PSC/GPIO[10]
RAMADD1 RAMADD[6] GPIO[21]/APWM3+ APWM_CEN- APWM_SR+
50 RAMADD[1] GPIO[20]/APWM4- 107 APWM_CEN-
RAMADD7 51 106 APWM_CEN+ DSPVCC33 8 1
RAMADD[7] GPIO[19]/PWMCO[5]/APWM4+ APWM_CEN+ VCC A0
52 105 7 2
RAMADD[11]/GPO[64]
VDDC VDDAPWM WP A1
6 3
RAMCS1#/GPO[65]
AIN/SPDIFIN/IO[18]
SCL A2
APWM7+/GPIO[12]
APWM6+/GPIO[14]
APWM5+/GPIO[16]
DSPVCC33
APWM7-/GPIO[13]
APWM6-/GPIO[15]
APWM5-/GPIO[17]
R179 5 4
GPAIO/IGPIO[11]
VDDAPWM R246 4R7 R178 C154 SDA GND
2K 2K 104
DSPVCC33
RAMADD[10]
RAMDAT[10]
RAMDAT[11]
RAMDAT[12]
RAMDAT[13]
RAMDAT[14]
RAMDAT[15]
RAMADD[0]
RAMADD[8]
RAMADD[9]
RAMDAT[8]
RAMDAT[7]
RAMDAT[9]
RAMDAT[6]
RAMDAT[5]
RAMDAT[4]
RAMDAT[3]
RAMDAT[2]
RAMDAT[1]
RAMDAT[0]
NC/24C02
RAMRAS#
RAMCAS#
GNDPCLK
RAMCS0#
VDDPCLK
RAMDQM
RAMWE#
MEMADD1 + C177
RAMBA
GNDC
GNDC
GNDC
GNDC
GNDC
VDDC
C126
VDDP
VDDP
VDDP
VDDP
VDDP
PCLK
100uF/16V
0.1uF I2C_CLK
I2C_DAT
R212
100
101
102
103
104
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
1K Close to pin 105
BOOTSEL JP1
B B
Play OPEN
1
2
Download CLOSE
RAMADD10
RAMADD11
RAMDAT10
RAMDAT11
RAMDAT12
RAMDAT13
RAMDAT14
RAMDAT15
APWM_LFE+
RAMADD0
RAMADD8
RAMADD9
APWM_LFE-
RAMDAT8
RAMDAT7
RAMDAT9
RAMDAT6
RAMDAT5
RAMDAT4
RAMDAT3
RAMDAT2
RAMDAT1
RAMDAT0
STBY
RAMCS0-
RAMCS1-
RAMRAS-
RAMCAS-
RAMDQM
RAMCKE
RAMWE-
OK_DET
RAMBA
JP1
IPCLK
IPCLK
NC
STBY
TP31
TP29
TP30
R183
APWM_LFE+
APWM_LFE-
56R CON4
500mA for device
P+5V P+5V
PCLK USB_DN 4
CON11 USB_DP 3
C139 P+5V 2
TP26 1 1
NC/5PF DUPTD0 2
TP28
DUPRD0 3 R238 R237 2.0X4USB
TP34
4 15K 15K
Close to
4PIN/2.0
Vaddis
ADD FOR STB REALLY
R170 10K
DSPVCC33 RAMCKE
DSPVCC33
C171 C151 C167 C199 C165 C122 C169 C202 C170
104 104 104 104 104 104 104 104 104 + C173
220uF/16V
RAMDAT10
RAMDAT11
RAMDAT12
RAMDAT13
RAMDAT14
RAMDAT15
RAMDAT15
RAMDAT14
RAMDAT13
RAMDAT12
RAMDAT11
RAMDAT10
RAMADD11
RAMADD9
RAMADD8
RAMADD7
RAMADD6
RAMADD5
RAMADD4
RAMDAT8
RAMDAT9
RAMDAT9
RAMDAT8
RAMDQM
RAMADD4
RAMADD5
RAMADD6
RAMADD7
RAMADD8
RAMADD9
RAMDQM
PCLK
PCLK
SDRAM3.3V
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
DSPVCC18
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
C145 C157 C162 C144

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
NC
DQMH
NC
A11
A9
A8
A7
A6
A5
A4
VSS
VSS
CLK
CKE
VSS
VSSQ
VDDQ
VSSQ
VDDQ
104 104 104 104 + C189 SDRAM configuration:

A4
A5
A6
A7
A8
A9
NC
NC
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
VSS
CKE
CLK
UDQM
VSS
VDDQ
VSSQ
VDDQ
VSSQ
220uF/16V
U4 U3 1X16Mbit: CS0# = Low;
1X64Mbit: CS1# = Low; CS0#=BA1
A
16Mbit: K4S161622C-TC/L70 NM SDRAM speed <=7ns
[64Mbit:K4S641632H-UC70] A
Tras <=44.4ns
A10/AP
LDQM
DQML
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
CAS#
RAS#
WE#
VDD
VDD
VDD
VDD
VDD
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
RAS
CAS
CS#
Trp <=22.2ns
BA0
BA1
A10
WE
CS
BA
A3
A2
A1
A0
A0
A1
A2
A3
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
9
8
7
6
5
4
3
2
1
1
2
3
4
5
6
7
8
9
SDRAM3.3V
RAMADD10
RAMADD10
RAMADD3
RAMADD3
RAMADD2
RAMADD1
RAMADD0
RAMADD0
RAMADD1
RAMADD2
RAMDAT7
RAMDAT6
RAMDAT5
RAMDAT4
RAMDAT3
RAMDAT2
RAMDAT1
RAMDAT0
RAMDAT0
RAMDAT1
RAMDAT2
RAMDAT3
RAMDAT4
RAMDAT5
RAMDAT7
RAMDAT6
RAMCS0-
RAMCS1-
RAMDQM
RAMDQM
RAMRAS-
RAMCAS-
RAMCAS-
RAMRAS-
RAMCS0-
RAMWE-
RAMWE-
RAMBA
RAMBA
Design: MODEL: DV5312 TITLE: DSP+SDRAM+FLASH

5 4 3 2 1
5 4 3 2 1
线路图原理框图
D D
FLASH SDRAM
16M 1*16M/4*16M
CD
ARIMA
+12V PH681
DSP S-VIDEO/CVBS OUTPUT

VIDEO PORT
MOTOR-DRIVER
C +5V
D5888S ZR36962 C
U5 YUV OUTPUT
VIDEO PORT
T2
EEL19 U1
+1.8V
PWM POWER DIGTAL COAXIAL OUTPUT
AC IN
TNY275PN COAXIAL PORT
100-240V +3.3V
IC1
USB1.1 INPUT
USB PORT
R L
+5V OPERATIONAL AMPLIFIER

VFD DRIVER 5.1CH AUDIO OUTPUT
NJM4558
B B
-21V AUDIO PORT
U7/U8/U9
VFD
DISPLAY
A A
Design: MODEL: DV5312 TITLE: DSP+SDRAM+FLASH

表格编号：QR-RD-016A
5 4 3 2 1
5 4 3 2 1
D D
TITLE: Cover page

Design: MODEL: DV5312(ZORAN)
C Checked: PART NO.: DWG NO.:DV5312-YL01-03 C
Apprd: SHEET: 6 pages

VER: A

B
表格编号：QR-RD-016A B
A A
5 4 3 2 1
TNY274-280
TinySwitch-III Family
®
Energy Efficient, Off-Line Switcher with

Enhanced Flexibility and Extended Power Range
Product Highlights + +
Lowest System Cost with Enhanced Flexibility DC
Output
• Simple ON/OFF control, no loop compensation needed
-
• Selectable current limit through BP/M capacitor value
Wide-Range
- Higher current limit extends peak power or, in open HV DC Input
D
EN/UV
frame applications, maximum continuous power BP/M
TinySwitch-III
- Lower current limit improves efficiency in enclosed S
adapters/chargers
-
- Allows optimum TinySwitch-III choice by swapping PI-4095-082205
devices with no other circuit redesign
• Tight I2f parameter tolerance reduces system cost Figure 1. Typical Standby Application.
- Maximizes MOSFET and magnetics power delivery
- Minimizes max overload power, reducing cost of
transformer, primary clamp & secondary components OUTPUT POWER TABLE
• ON-time extension – extends low line regulation range/ 230 VAC ±15% 85-265 VAC
hold-up time to reduce input bulk capacitance Peak or Peak or
• Self-biased: no bias winding or bias components PRODUCT3
Adapter1 Open Adapter1 Open
• Frequency jittering reduces EMI filter costs Frame2 Frame2
• Pin-out simplifies heatsinking to the PCB
• SOURCE pins are electrically quiet for low EMI TNY274 P or G 6W 11 W 5W 8.5 W
TNY275 P or G 8.5 W 15 W 6W 11.5 W
Enhanced Safety and Reliability Features TNY276 P or G 10 W 19 W 7W 15 W
• Accurate hysteretic thermal shutdown protection with
automatic recovery eliminates need for manual reset TNY277 P or G 13 W 23.5 W 8W 18 W
• Improved auto-restart delivers <3% of maximum power TNY278 P or G 16 W 28 W 10 W 21.5 W
in short circuit and open loop fault conditions TNY279 P or G 18 W 32 W 12 W 25 W
• Output overvoltage shutdown with optional Zener TNY280 P or G 20 W 36.5 W 14 W 28.5 W
• Line under-voltage detect threshold set using a single
optional resistor Table 1. Notes: 1. Minimum continuous power in a typical non-
• Very low component count enhances reliability and ventilated enclosed adapter measured at 50 °C ambient. Use of an
external heatsink will increase power capability 2. Minimum peak
enables single-sided printed circuit board layout power capability in any design or minimum continuous power in an
• High bandwidth provides fast turn on with no overshoot open frame design (see Key Application Considerations). 3. Packages:
and excellent transient load response P: DIP-8C, G: SMD-8C. See Part Ordering Information.
• Extended creepage between DRAIN and all other pins
improves field reliability
®
EcoSmart – Extremely Energy Efficient • PC Standby and other auxiliary supplies
• Easily meets all global energy efficiency regulations • DVD/PVR and other low power set top decoders
• No-load <150 mW at 265 VAC without bias winding, • Supplies for appliances, industrial systems, metering, etc.
<50 mW with bias winding
• ON/OFF control provides constant efficiency down to Description
very light loads – ideal for mandatory CEC regulations
and 1 W PC standby requirements TinySwitch-III incorporates a 700 V power MOSFET, oscillator,
high voltage switched current source, current limit (user
Applications selectable) and thermal shutdown circuitry. The IC family uses
• Chargers/adapters for cell/cordless phones, PDAs, digital an ON/OFF control scheme and offers a design flexible solution
cameras, MP3/portable audio, shavers, etc. with a low system cost and extended power capability.
February 2006
TNY274-280
BYPASS/
MULTI-FUNCTION DRAIN
(BP/M) (D)
REGULATOR
5.85 V
LINE UNDER-VOLTAGE
115 µA 25 µA
FAULT BYPASS PIN
PRESENT + UNDER-VOLTAGE
AUTO-
RESTART -
COUNTER 5.85 V VI
CURRENT
4.9 V LIMIT
LIMIT STATE
6.4 V RESET
MACHINE
CURRENT LIMIT
COMPARATOR
ENABLE -
JITTER
CLOCK
1.0 V + VT
DCMAX THERMAL
SHUTDOWN
OSCILLATOR
ENABLE/
1.0 V
UNDER-
S Q
VOLTAGE
(EN/UV)
R Q
LEADING
EDGE
BLANKING
SOURCE
(S)
PI-4077-013106
Figure 2. Functional Block Diagram.
Pin Functional Description

DRAIN (D) Pin: P Package (DIP-8C)
This pin is the power MOSFET drain connection. It provides G Package (SMD-8C)
internal operating current for both start-up and steady-state
operation. EN/UV 8 S
1
BYPASS/MULTI-FUNCTION (BP/M) Pin: BP/M 2 7 S

This pin has multiple functions:
6 S
1. It is the connection point for an external bypass capacitor D 4 5 S

for the internally generated 5.85 V supply.
2. It is a mode selector for the current limit value, depending
on the value of the capacitance added. Use of a 0.1 µF
PI-4078-080905
capacitor results in the standard current limit value. Use of
a 1 µF capacitor results in the current limit being reduced to Figure 3. Pin Configuration.
that of the next smaller device size. Use of a 10 µF capacitor
results in the current limit being increased to that of the next with a Zener connected from the BP/M pin to a bias winding
larger device size for TNY275-280. supply.
3. It provides a shutdown function. When the current into the
bypass pin exceeds 5.5 mA, the device latches off until the ENABLE/UNDER-VOLTAGE (EN/UV) Pin:
BP/M voltage drops below 4.9 V, during a power down. This pin has dual functions: enable input and line under-voltage
This can be used to provide an output overvoltage function sense. During normal operation, switching of the power
2 E
2/06
TNY274-280
MOSFET is controlled by this pin. MOSFET switching is maximum duty cycle signal (DCMAX) and the clock signal that
terminated when a current greater than a threshold current is indicates the beginning of each cycle.
drawn from this pin. Switching resumes when the current being
pulled from the pin drops to less than a threshold current. A The oscillator incorporates circuitry that introduces a small
modulation of the threshold current reduces group pulsing. The amount of frequency jitter, typically 8 kHz peak-to-peak, to
threshold current is between 60 µA and 115 µA. minimize EMI emission. The modulation rate of the frequency
jitter is set to 1 kHz to optimize EMI reduction for both average
The EN/UV pin also senses line under-voltage conditions through and quasi-peak emissions. The frequency jitter should be
an external resistor connected to the DC line voltage. If there is measured with the oscilloscope triggered at the falling edge of
no external resistor connected to this pin, TinySwitch-III detects the DRAIN waveform. The waveform in Figure 4 illustrates
its absence and disables the line under-voltage function. the frequency jitter.
SOURCE (S) Pin: Enable Input and Current Limit State Machine
This pin is internally connected to the output MOSFET source The enable input circuit at the EN/UV pin consists of a low
for high voltage power return and control circuit common. impedance source follower output set at 1.2 V. The current
through the source follower is limited to 115 µA. When the
TinySwitch-III Functional current out of this pin exceeds the threshold current, a low
logic level (disable) is generated at the output of the enable
Description circuit, until the current out of this pin is reduced to less than
TinySwitch-III combines a high voltage power MOSFET switch the threshold current. This enable circuit output is sampled
with a power supply controller in one device. Unlike conventional at the beginning of each cycle on the rising edge of the clock
PWM (pulse width modulator) controllers, it uses a simple signal. If high, the power MOSFET is turned on for that cycle
ON/OFF control to regulate the output voltage. (enabled). If low, the power MOSFET remains off (disabled).
Since the sampling is done only at the beginning of each cycle,
The controller consists of an oscillator, enable circuit (sense and subsequent changes in the EN/UV pin voltage or current during
logic), current limit state machine, 5.85 V regulator, BYPASS/ the remainder of the cycle are ignored.
MULTI-FUNCTION pin under-voltage, overvoltage circuit, and
current limit selection circuitry, over- temperature protection, The current limit state machine reduces the current limit by
current limit circuit, leading edge blanking, and a 700 V power discrete amounts at light loads when TinySwitch-III is likely to
MOSFET. TinySwitch-III incorporates additional circuitry for switch in the audible frequency range. The lower current limit
line under-voltage sense, auto-restart, adaptive switching cycle raises the effective switching frequency above the audio range
on-time extension, and frequency jitter. Figure 2 shows the and reduces the transformer flux density, including the associated
functional block diagram with the most important features. audible noise. The state machine monitors the sequence of
enable events to determine the load condition and adjusts the
Oscillator current limit level accordingly in discrete amounts.
The typical oscillator frequency is internally set to an average
of 132 kHz. Two signals are generated from the oscillator: the Under most operating conditions (except when close to no-load),
the low impedance of the source follower keeps the voltage on
600 the EN/UV pin from going much below 1.2 V in the disabled
PI-2741-041901
state. This improves the response time of the optocoupler that

500
is usually connected to this pin.
VDRAIN
400
5.85 V Regulator and 6.4 V Shunt Voltage Clamp
300 The 5.85 V regulator charges the bypass capacitor connected
to the BYPASS pin to 5.85 V by drawing a current from the
200 voltage on the DRAIN pin whenever the MOSFET is off. The
BYPASS/MULTI-FUNCTION pin is the internal supply voltage
100
node. When the MOSFET is on, the device operates from the
0
energy stored in the bypass capacitor. Extremely low power
136 kHz consumption of the internal circuitry allows TinySwitch-III to
128 kHz operate continuously from current it takes from the DRAIN
pin. A bypass capacitor value of 0.1 µF is sufficient for both
high frequency decoupling and energy storage.
0 5 10
Time (µs)
Figure 4. Frequency Jitter.
E
2/06 3
TNY274-280
In addition, there is a 6.4 V shunt regulator clamping the Auto-Restart

BYPASS/MULTI-FUNCTION pin at 6.4 V when current In the event of a fault condition such as output overload, output
is provided to the BYPASS/MULTI-FUNCTION pin short circuit, or an open loop condition, TinySwitch-III enters
through an external resistor. This facilitates powering of into auto-restart operation. An internal counter clocked by the
TinySwitch-III externally through a bias winding to decrease oscillator is reset every time the EN/UV pin is pulled low. If the
the no-load consumption to well below 50 mW. EN/UV pin is not pulled low for 64 ms, the power MOSFET
switching is normally disabled for 2.5 seconds (except in the
BYPASS/MULTI-FUNCTION Pin Under-Voltage case of line under-voltage condition, in which case it is disabled
The BYPASS/MULTI-FUNCTION pin under-voltage circuitry until the condition is removed). The auto-restart alternately
disables the power MOSFET when the BYPASS/MULTI- enables and disables the switching of the power MOSFET until
FUNCTION pin voltage drops below 4.9 V in steady state the fault condition is removed. Figure 5 illustrates auto-restart
operation. Once the BYPASS/MULTI-FUNCTION pin voltage circuit operation in the presence of an output short circuit.
drops below 4.9 V in steady state operation, it must rise back
to 5.85 V to enable (turn-on) the power MOSFET. In the event of a line under-voltage condition, the switching of
the power MOSFET is disabled beyond its normal 2.5 seconds
Over Temperature Protection until the line under-voltage condition ends.
The thermal shutdown circuitry senses the die temperature. The
threshold is typically set at 142 °C with 75 °C hysteresis. When Adaptive Switching Cycle On-Time Extension
the die temperature rises above this threshold the power MOSFET Adaptive switching cycle on-time extension keeps the cycle
is disabled and remains disabled until the die temperature falls on until current limit is reached, instead of prematurely
by 75 °C, at which point it is re-enabled. A large hysteresis of terminating after the DCMAX signal goes low. This feature
75 °C (typical) is provided to prevent overheating of the PC reduces the minimum input voltage required to maintain
board due to a continuous fault condition. regulation, extending hold-up time and minimizing the size
of bulk capacitor required. The on-time extension is disabled
Current Limit during the startup of the power supply, until the power supply
The current limit circuit senses the current in the power MOSFET. output reaches regulation.
When this current exceeds the internal threshold (ILIMIT), the
power MOSFET is turned off for the remainder of that cycle. The Line Under-Voltage Sense Circuit
current limit state machine reduces the current limit threshold The DC line voltage can be monitored by connecting an external
by discrete amounts under medium and light loads. resistor from the DC line to the EN/UV pin. During power-up or
when the switching of the power MOSFET is disabled in auto-
The leading edge blanking circuit inhibits the current limit restart, the current into the EN/UV pin must exceed 25 µA to
comparator for a short time (tLEB) after the power MOSFET is initiate switching of the power MOSFET. During power-up, this
turned on. This leading edge blanking time has been set so that is accomplished by holding the BYPASS/MULTI-FUNCTION
current spikes caused by capacitance and secondary-side rectifier pin to 4.9 V while the line under-voltage condition exists. The
reverse recovery time will not cause premature termination of BYPASS/MULTI-FUNCTION pin then rises from 4.9 V to
the switching pulse. 5.85 V when the line under-voltage condition goes away. When the
switching of the power MOSFET is disabled in auto-restart mode
PI-4098-082305
and a line under-voltage condition exists, the auto-restart counter

300 V
DRAIN
is stopped. This stretches the disable time beyond its normal
2.5 seconds until the line under-voltage condition ends.
200
The line under-voltage circuit also detects when there is
100
no external resistor connected to the EN/UV pin (less than
0
~1 µA into the pin). In this case the line under-voltage function
is disabled.
10
V TinySwitch-III Operation
DC-OUTPUT
5
TinySwitch-III devices operate in the current limit mode. When
0
enabled, the oscillator turns the power MOSFET on at the
beginning of each cycle. The MOSFET is turned off when the
0 2500 5000 current ramps up to the current limit or when the DCMAX limit is
Time (ms) reached. Since the highest current limit level and frequency of
Figure 5. Auto-Restart Operation. a TinySwitch-III design are constant, the power delivered to the
4 E
2/06
TNY274-280
load is proportional to the primary inductance of the transformer not to proceed with the next switching cycle. The sequence of
and peak primary current squared. Hence, designing the supply cycles is used to determine the current limit. Once a cycle is
involves calculating the primary inductance of the transformer started, it always completes the cycle (even when the EN/UV
for the maximum output power required. If the TinySwitch-III pin changes state half way through the cycle). This operation
is appropriately chosen for the power level, the current in the results in a power supply in which the output voltage ripple
calculated inductance will ramp up to current limit before the is determined by the output capacitor, amount of energy per
DCMAX limit is reached. switch cycle and the delay of the feedback.
Enable Function The EN/UV pin signal is generated on the secondary by

TinySwitch-III senses the EN/UV pin to determine whether or comparing the power supply output voltage with a reference
voltage. The EN/UV pin signal is high when the power supply
output voltage is less than the reference voltage.
V
EN In a typical implementation, the EN/UV pin is driven by an
optocoupler. The collector of the optocoupler transistor is
CLOCK connected to the EN/UV pin and the emitter is connected to
the SOURCE pin. The optocoupler LED is connected in series
DC with a Zener diode across the DC output voltage to be regulated.
MAX
When the output voltage exceeds the target regulation voltage
level (optocoupler LED voltage drop plus Zener voltage), the
optocoupler LED will start to conduct, pulling the EN/UV pin
I DRAIN low. The Zener diode can be replaced by a TL431 reference
circuit for improved accuracy.
ON/OFF Operation with Current Limit State Machine

The internal clock of the TinySwitch-III runs all the time. At
the beginning of each clock cycle, it samples the EN/UV pin to
V DRAIN
decide whether or not to implement a switch cycle, and based
on the sequence of samples over multiple cycles, it determines
the appropriate current limit. At high loads, the state machine
PI-2749-082305
sets the current limit to its highest value. At lighter loads, the
state machine sets the current limit to reduced values.
Figure 6. Operation at Near Maximum Loading.
V V
EN EN
CLOCK CLOCK
DC DC
MAX MAX
I DRAIN I DRAIN
V DRAIN
V DRAIN
PI-2667-082305 PI-2377-082305
Figure 7. Operation at Moderately Heavy Loading. Figure 8. Operation at Medium Loading.
E
2/06 5
TNY274-280
200
PI-2381-1030801
V V
EN 100
DC-INPUT
0
CLOCK
10
DC
MAX V
5 BYPASS
I DRAIN 400
200 V
DRAIN
0
0 1 2
Time (ms)
V DRAIN Figure 11. Power-Up Without Optional External UV Resistor
Connected to EN/UV Pin.
PI-2348-030801
PI-2661-082305
Figure 9. Operation at Very Light Load. 200

V
100 DC-INPUT
At near maximum load, TinySwitch-III will conduct during 0

nearly all of its clock cycles (Figure 6). At slightly lower load,
it will “skip” additional cycles in order to maintain voltage 400
regulation at the power supply output (Figure 7). At medium 300
loads, cycles will be skipped and the current limit will be reduced
(Figure 8). At very light loads, the current limit will be reduced 200 V
DRAIN
even further (Figure 9). Only a small percentage of cycles will
occur to satisfy the power consumption of the power supply. 100
0
The response time of the ON/OFF control scheme is very fast 0 .5 1
compared to PWM control. This provides tight regulation and Time (s)
excellent transient response.
Figure 12. Normal Power-Down Timing (without UV).
200
PI-2383-030801
PI-2395-030801
100 V
DC-INPUT 200
V
0 100 DC-INPUT
10 0
V
5 BYPASS 400
0 300
400 200 V
DRAIN
200 V 100
DRAIN
0 0
0 1 2 0 2.5 5
Time (ms) Time (s)
Figure 10. Power-Up with Optional External UV Resistor (4 MΩ) Figure 13. Slow Power-Down Timing with Optional External
Connected to EN/UV Pin. (4 MΩ) UV Resistor Connected to EN/UV Pin.
6 E
2/06
TNY274-280
Power Up/Down Functional Description above). This has two main benefits.
The TinySwitch-III requires only a 0.1 µF capacitor on the First, for a nominal application, this eliminates the cost of a
BYPASS/MULTI-FUNCTION pin to operate with standard bias winding and associated components. Secondly, for battery
current limit. Because of its small size, the time to charge this charger applications, the current-voltage characteristic often
capacitor is kept to an absolute minimum, typically 0.6 ms. The allows the output voltage to fall close to zero volts while still
time to charge will vary in proportion to the BYPASS/MULTI- delivering power. TinySwitch-III accomplishes this without a
FUNCTION pin capacitor value when selecting different current forward bias winding and its many associated components. For
limits. Due to the high bandwidth of the ON/OFF feedback, applications that require very low no-load power consumption
there is no overshoot at the power supply output. When an (50 mW), a resistor from a bias winding to the BYPASS/
external resistor (4 MΩ) is connected from the positive DC MULTI-FUNCTION pin can provide the power to the chip.
input to the EN/UV pin, the power MOSFET switching will The minimum recommended current supplied is 1 mA. The
be delayed during power-up until the DC line voltage exceeds BYPASS/MULTI-FUNCTION pin in this case will be clamped
the threshold (100 V). Figures 10 and 11 show the power-up at 6.4 V. This method will eliminate the power draw from the
timing waveform in applications with and without an external DRAIN pin, thereby reducing the no-load power consumption
resistor (4 MΩ) connected to the EN/UV pin. and improving full-load efficiency.
Under startup and overload conditions, when the conduction time Current Limit Operation
is less than 400 ns, the device reduces the switching frequency Each switching cycle is terminated when the DRAIN current
to maintain control of the peak drain current. reaches the current limit of the device. Current limit operation
provides good line ripple rejection and relatively constant power
During power-down, when an external resistor is used, the delivery independent of input voltage.
power MOSFET will switch for 64 ms after the output loses
regulation. The power MOSFET will then remain off without BYPASS/MULTI-FUNCTION Pin Capacitor
any glitches since the under-voltage function prohibits restart The BYPASS/MULTI-FUNCTION pin can use a ceramic
when the line voltage is low. capacitor as small as 0.1 µF for decoupling the internal power
supply of the device. A larger capacitor size can be used to adjust
Figure 12 illustrates a typical power-down timing waveform. the current limit. For TNY275-280, a 1 µF BP/M pin capacitor
Figure 13 illustrates a very slow power-down timing waveform will select a lower current limit equal to the standard current
as in standby applications. The external resistor (4 MΩ) is limit of the next smaller device and a 10 µF BP/M pin capacitor
connected to the EN/UV pin in this case to prevent unwanted will select a higher current limit equal to the standard current
restarts. limit of the next larger device. The higher current limit level of
the TNY280 is set to 850 mA typical. The TNY274 MOSFET
No bias winding is needed to provide power to the chip does not have the capability for increased current limit so this
because it draws the power directly from the DRAIN pin (see feature is not available in this device.
E
2/06 7
TNY274-280
C5
2.2 nF
250 VAC
L2
D7 Ferrite Bead
VR1 BYV28-200
P6KE150A T1 3.5 × 7.6 mm +12 V, 1 A
NC 8
C10 C11 J3
D1 D2 R2 1000 µF 100 µF
1N4007 1N4007 100 Ω 1 6 25 V 25 V J4
F1
J1 3.15 A C4 RTN
C1 C2 R1
6.8 µF 22 µF 1 kΩ 10 nF
1 kV 3 R7
400 V 400 V
85-265 RV1 4 20 Ω
VAC 275 VAC
D5
1N4007GP 2 D6
R5* UF4003
J2 3.6 MΩ
D3 D4 5
1N4007 1N4007
L1 VR2
1 mH 1N5255B C6 VR3
28 V 1 µF BZX79-C11
60 V 11 V
R3
47 Ω
*R5 and R8 are optional 1/8 W R6
components 390 Ω
R8* 1/8 W
† 21 kΩ
C7 is configurable to adjust 1% U2
D PC817A
U1 current limit, see circuit EN/UV
description
BP/M
S
S R4
TinySwitch-III C7 † 2 kΩ
U1 100 nF 1/8 W
TNY278P 50 V
PI-4244-021406
Figure 14. TNY278P, 12 V, 1 A Universal Input Power Supply.
Applications Example LED forward drop, current will flow in the optocoupler LED.
This will cause the transistor of the optocoupler to sink current.
The circuit shown in Figure 14 is a low cost, high efficiency, When this current exceeds the ENABLE pin threshold current
flyback power supply designed for 12 V, 1 A output from the next switching cycle is inhibited. When the output voltage
universal input using the TNY278. falls below the feedback threshold, a conduction cycle is allowed
to occur and, by adjusting the number of enabled cycles, output
The supply features under-voltage lockout, primary sensed regulation is maintained. As the load reduces, the number of
output overvoltage latching shutdown protection, high enabled cycles decreases, lowering the effective switching
efficiency (>80%), and very low no-load consumption frequency and scaling switching losses with load. This provides
(<50 mW at 265 VAC). Output regulation is accomplished using almost constant efficiency down to very light loads, ideal for
a simple zener reference and optocoupler feedback. meeting energy efficiency requirements.
The rectified and filtered input voltage is applied to the primary As the TinySwitch-III devices are completely self-powered,
winding of T1. The other side of the transformer primary is there is no requirement for an auxiliary or bias winding on the
driven by the integrated MOSFET in U1. Diode D5, C2, R1, transformer. However by adding a bias winding, the output
R2, and VR1 comprise the clamp circuit, limiting the leakage overvoltage protection feature can be configured, protecting
inductance turn-off voltage spike on the DRAIN pin to a safe the load against open feedback loop faults.
value. The use of a combination a Zener clamp and parallel
RC optimizes both EMI and energy efficiency. Resistor R2 When an overvoltage condition occurs, such that bias voltage
allows the use of a slow recovery, low cost, rectifier diode by exceeds the sum of VR2 and the BYPASS/MULTIFUNCTION
limiting the reverse current through D5. The selection of a (BP/M) pin voltage (28 V+5.85 V), current begins to flow into the
slow diode also improves efficiency and conducted EMI but BP/M pin. When this current exceeds 5 mA the internal latching
should be a glass passivated type, with a specified recovery shutdown circuit in TinySwitch-III is activated. This condition
time of ≤2 µs. is reset when the BP/M pin voltage drops below 2.6 V after
removal of the AC input. In the example shown, on opening
The output voltage is regulated by the Zener diode VR3. When the loop, the OVP trips at an output of 17 V.
the output voltage exceeds the sum of the Zener and optocoupler
8 E
2/06
TNY274-280
For lower no-load input power consumption, the bias winding Key Application Considerations
may also be used to supply the TinySwitch-III device. Resistor
R8 feeds current into the BP/M pin, inhibiting the internal high TinySwitch-lll Design Considerations
voltage current source that normally maintains the BP/M pin
capacitor voltage (C7) during the internal MOSFET off time. Output Power Table
This reduces the no-load consumption of this design from The data sheet output power table (Table 1) represents the
140 mW to 40 mW at 265 VAC. minimum practical continuous output power level that can be
obtained under the following assumed conditions:
Under-voltage lockout is configured by R5 connected between
the DC bus and EN/UV pin of U1. When present, switching 1. The minimum DC input voltage is 100 V or higher for
is inhibited until the current in the EN/UV pin exceeds 25 µA. 85 VAC input, or 220 V or higher for 230 VAC input or
This allows the startup voltage to be programmed within the 115 VAC with a voltage doubler. The value of the input
normal operating input voltage range, preventing glitching of capacitance should be sized to meet these criteria for AC
the output under abnormal low voltage conditions and also on input designs.
removal of the AC input. 2. Efficiency of 75%.
3. Minimum data sheet value of I2f.
In addition to the simple input pi filter (C1, L1, C2) for 4. Transformer primary inductance tolerance of ±10%.
differential mode EMI, this design makes use of E-Shield™ 5. Reflected output voltage (VOR) of 135 V.
shielding techniques in the transformer to reduce common 6. Voltage only output of 12 V with a fast PN rectifier diode.
mode EMI displacement currents, and R2 and C4 as a damping 7. Continuous conduction mode operation with transient KP*
network to reduce high frequency transformer ringing. These value of 0.25.
techniques, combined with the frequency jitter of TNY278, 8. Increased current limit is selected for peak and open frame
give excellent conducted and radiated EMI performance with power columns and standard current limit for adapter
this design achieving >12 dBµV of margin to EN55022 Class columns.
B conducted EMI limits. 9. The part is board mounted with SOURCE pins soldered to
a sufficient area of copper and/or a heatsink is used to keep
For design flexibility the value of C7 can be selected to pick one the SOURCE pin temperature at or below 110 °C.
of the 3 current limits options in U1. This allows the designer 10. Ambient temperature of 50 °C for open frame designs and
to select the current limit appropriate for the application. 40 °C for sealed adapters.
• Standard current limit (ILIMIT) is selected with a 0.1 µF BP/M *Below a value of 1, KP is the ratio of ripple to peak primary
pin capacitor and is the normal choice for typical enclosed current. To prevent reduced power capability due to premature
adapter applications. termination of switching cycles a transient KP limit of ≥0.25
• When a 1 µF BP/M pin capacitor is used, the current is recommended. This prevents the initial current limit (IINIT)
limit is reduced (ILIMITred or ILIMIT-1) offering reduced RMS from being exceeded at MOSFET turn on.
device currents and therefore improved efficiency, but at
the expense of maximum power capability. This is ideal For reference, Table 2 provides the minimum practical power
for thermally challenging designs where dissipation must delivered from each family member at the three selectable current
be minimized. limit values. This assumes open frame operation (not thermally
• When a 10 µF BP/M pin capacitor is used, the current limited) and otherwise the same conditions as listed above.
limit is increased (ILIMITinc or ILIMIT+1), extending the power These numbers are useful to identify the correct current limit
capability for applications requiring higher peak power or to select for a given device and output power requirement.
continuous power where the thermal conditions allow.
Overvoltage Protection
Further flexibility comes from the current limits between adjacent The output overvoltage protection provided by TinySwitch-III
TinySwitch-III family members being compatible. The reduced uses an internal latch that is triggered by a threshold current
current limit of a given device is equal to the standard current of approximately 5.5 mA into the BP/M pin. In addition to an
limit of the next smaller device and the increased current limit is internal filter, the BP/M pin capacitor forms an external filter
equal to the standard current limit of the next larger device. providing noise immunity from inadvertent triggering. For the
bypass capacitor to be effective as a high frequency filter, the
capacitor should be located as close as possible to the SOURCE
and BP/M pins of the device.
E
2/06 9
TNY274-280
OUTPUT POWER TABLE

230 VAC ±15% 85-265 VAC
PRODUCT
ILIMIT-1 ILIMIT ILIMIT+1 ILIMIT-1 ILIMIT ILIMIT+1
TNY274 P or G 9 10.9 9.1 7.1 8.5 7.1
TNY275 P or G 10.8 12 15.1 8.4 9.3 11.8
TNY276 P or G 11.8 15.3 19.4 9.2 11.9 15.1
TNY277 P or G 15.1 19.6 23.7 11.8 15.3 18.5
TNY278 P or G 19.4 24 28 15.1 18.6 21.8
TNY279 P or G 23.7 28.4 32.2 18.5 22 25.2
TNY280 P or G 28 32.7 36.6 21.8 25.4 28.5
Table 2. Minimum Practical Power at Three Selectable Current Limit Levels.
For best performance of the OVP function, it is recommended practically eliminates audible noise. Vacuum impregnation
that a relatively high bias winding voltage is used, in the range of of the transformer should not be used due to the high primary
15 V-30 V. This minimizes the error voltage on the bias winding capacitance and increased losses that result. Higher flux densities
due to leakage inductance and also ensures adequate voltage are possible, however careful evaluation of the audible noise
during no-load operation from which to supply the BP/M pin performance should be made using production transformer
for reduced no-load consumption. samples before approving the design.
Selecting the Zener diode voltage to be approximately 6 V Ceramic capacitors that use dielectrics such as Z5U, when used
above the bias winding voltage (28 V for 22 V bias winding) in clamp circuits, may also generate audio noise. If this is the
gives good OVP performance for most designs, but can be case, try replacing them with a capacitor having a different
adjusted to compensate for variations in leakage inductance. dielectric or construction, for example a film type.
Adding additional filtering can be achieved by inserting a low
value (10 Ω to 47 Ω) resistor in series with the bias winding TinySwitch-lll Layout Considerations
diode and/or the OVP Zener as shown by R7 and R3 in
Figure 14. The resistor in series with the OVP Zener also limits Layout
the maximum current into the BP/M pin. See Figure 15 for a recommended circuit board layout for
TinySwitch-III.
Reducing No-load Consumption
As TinySwitch-III is self-powered from the BP/M pin capacitor, Single Point Grounding
there is no need for an auxillary or bias winding to be provided Use a single point ground connection from the input filter capacitor
on the transformer for this purpose. Typical no-load consumption to the area of copper connected to the SOURCE pins.
when self-powered is <150 mW at 265 VAC input. The addition
of a bias winding can reduce this down to <50 mW by supplying Bypass Capacitor (CBP)
the TinySwitch-III from the lower bias voltage and inhibiting the The BP/M pin capacitor should be located as near as possible
internal high voltage current source. To achieve this, select the to the BP/M and SOURCE pins.
value of the resistor (R8 in Figure 14) to provide the data sheet
DRAIN supply current. In practice, due to the reduction of the Primary Loop Area
bias voltage at low load, start with a value equal to 40% greater The area of the primary loop that connects the input filter
than the data sheet maximum current, and then increase the value capacitor, transformer primary and TinySwitch-III together
of the resistor to give the lowest no-load consumption. should be kept as small as possible.
Audible Noise Primary Clamp Circuit

The cycle skipping mode of operation used in TinySwitch-III A clamp is used to limit peak voltage on the DRAIN pin at turn
can generate audio frequency components in the transformer. off. This can be achieved by using an RCD clamp or a Zener
To limit this audible noise generation the transformer should (~200 V) and diode clamp across the primary winding. In all
be designed such that the peak core flux density is below cases, to minimize EMI, care should be taken to minimize the
3000 Gauss (300 mT). Following this guideline and using the circuit path from the clamp components to the transformer and
standard transformer production technique of dip varnishing TinySwitch-III.
10 E
2/06
TNY274-280
TOP VIEW Input Filter

Capacitor
Y1-
Capacitor
+
HV DC
INPUT
-
T
r
a
n
s
f Output Filter
S S S S o Capacitor
CBP r
m
e
TinySwitch-III r
EN/UV BP/M D
Opto-
coupler
- DC +
OUT
Maximize hatched copper
areas ( ) for optimum
heatsinking
PI-4278-013006
Figure 15. Recommended Circuit Board Layout for TinySwitch-III with Under-Voltage Lock Out Resistor.
Thermal Considerations Optocoupler

The four SOURCE pins are internally connected to the IC lead Place the optocoupler physically close to the TinySwitch-III
frame and provide the main path to remove heat from the device. to minimizing the primary-side trace lengths. Keep the high
Therefore all the SOURCE pins should be connected to a copper current, high voltage drain and clamp traces away from the
area underneath the TinySwitch-III to act not only as a single optocoupler to prevent noise pick up.
point ground, but also as a heatsink. As this area is connected
to the quiet source node, this area should be maximized for Output Diode
good heatsinking. Similarly for axial output diodes, maximize For best performance, the area of the loop connecting the
the PCB area connected to the cathode. secondary winding, the output diode and the output filter
capacitor, should be minimized. In addition, sufficient copper
Y-Capacitor area should be provided at the anode and cathode terminals
The placement of the Y-capacitor should be directly from the of the diode for heatsinking. A larger area is preferred at the
primary input filter capacitor positive terminal to the common/ quiet cathode terminal. A large anode area can increase high
return terminal of the transformer secondary. Such a placement frequency radiated EMI.
will route high magnitude common mode surge currents away
from the TinySwitch-III device. Note – if an input π (C, L, C)
EMI filter is used then the inductor in the filter should be placed
between the negative terminals of the input filter capacitors.
E
2/06 11
TNY274-280
Quick Design Checklist startup. Repeat under steady state conditions and verify that
the leading edge current spike event is below ILIMIT(Min) at the
As with any power supply design, all TinySwitch-III designs end of the tLEB(Min). Under all conditions, the maximum drain
should be verified on the bench to make sure that component current should be below the specified absolute maximum
specifications are not exceeded under worst case conditions. The ratings.
following minimum set of tests is strongly recommended: 3. Thermal Check – At specified maximum output power,
minimum input voltage and maximum ambient temperature,
1. Maximum drain voltage – Verify that VDS does not exceed verify that the temperature specifications are not exceeded
650 V at highest input voltage and peak (overload) output for TinySwitch-III, transformer, output diode, and output
power. The 50 V margin to the 700 V BVDSS specification capacitors. Enough thermal margin should be allowed for
gives margin for design variation. part-to-part variation of the RDS(ON) of TinySwitch-III as
2. Maximum drain current – At maximum ambient temperature, specified in the data sheet. Under low line, maximum power,
maximum input voltage and peak output (overload) power, a maximum TinySwitch-III SOURCE pin temperature of
verify drain current waveforms for any signs of transformer 110 °C is recommended to allow for these variations.
saturation and excessive leading edge current spikes at
12 E
2/06
TNY274-280
ABSOLUTE MAXIMUM RATINGS(1,5)

DRAIN Voltage ................................................-0.3 V to 700 V Lead Temperature(4) ....................................................... 260 °C
DRAIN Peak Current: TNY274.......................400 (750) mA(2)
TNY275.....................560 (1050) mA(2) Notes:
TNY276.....................720 (1350) mA(2) 1. All voltages referenced to SOURCE, TA = 25 °C.
TNY277.....................880 (1650) mA(2) 2. The higher peak DRAIN current is allowed while the
TNY278...................1040 (1950) mA(2) DRAIN voltage is simultaneously less than 400 V.
TNY279 ................. 1200 (2250) mA(2) 3. Normally limited by internal circuitry.
TNY280 ................. 1360 (2550) mA(2) 4. 1/16 in. from case for 5 seconds.
EN/UV Voltage ................................................... -0.3 V to 9 V 5. Maximum ratings specified may be applied one at a time,
EN/UV Current ........................................................... 100 mA without causing permanent damage to the product.
BP/M Voltage .................................................. ....-0.3 V to 9 V Exposure to Absolute Maximum Rating conditions for
Storage Temperature ......................................-65 °C to 150 °C extended periods of time may affect product reliability.
Operating Junction Temperature(3) .................-40 °C to 150 °C
THERMAL IMPEDANCE
Notes:
Thermal Impedance: P or G Package:
1. Measured on the SOURCE pin close to plastic interface.
(θJA) ........................... 70 °C/W(2); 60 °C/W(3)
2. Soldered to 0.36 sq. in. (232 mm2), 2 oz. (610 g/m2) copper clad.
(θJC)(1) ............................................... 11 °C/W
3. Soldered to 1 sq. in. (645 mm2), 2 oz. (610 g/m2) copper clad.
Conditions
SOURCE = 0 V; TJ = -40 to 125 °C
Parameter Symbol Min Typ Max Units
See Figure 16
(Unless Otherwise Specified)
CONTROL FUNCTIONS
Output Frequency TJ = 25 °C Average 124 132 140
fOSC kHz
in Standard Mode See Figure 4 Peak-Peak Jitter 8
Maximum Duty
DCMAX S1 Open 62 65 %
Cycle
EN/UV Pin Upper
Turnoff Threshold IDIS -150 -115 -90 µA
Current
EN/UV Pin IEN/UV = 25 µA 1.8 2.2 2.6
VEN V
Voltage IEN/UV = -25 µA 0.8 1.2 1.6
EN/UV Current > IDIS (MOSFET Not
IS1 290 µA
Switching) See Note A
TNY274 275 360
TNY275 295 400
DRAIN Supply EN/UV Open TNY276 310 430
Current (MOSFET
IS2 TNY277 365 460 µA
Switching at fOSC)
See Note B TNY278 445 540
TNY279 510 640
TNY280 630 760
E
2/06 13
TNY274-280
Conditions
SOURCE = 0 V; TJ = -40 to 125 °C
See Figure 16
CONTROL FUNCTIONS (cont.)
TNY274 -6 -3.8 -1.8
VBP/M = 0 V,
ICH1 TJ = 25 °C TNY275-279 -8.3 -5.4 -2.5
See Note C, D
BP/M Pin Charge TNY280 -9.7 -6.8 -3.9
mA
Current TNY274 -4.1 -2.3 -1
VBP/M = 4 V,
ICH2 TJ = 25 °C TNY275-279 -5 -3.5 -1.5
See Note C, D
TNY280 -6.6 -4.6 -2.1
BP/M Pin Voltage VBP/M See Note C 5.6 5.85 6.15 V
BP/M Pin Voltage

VBP/MH 0.80 0.95 1.20 V
Hysteresis
BP/M Pin Shunt
VSHUNT IBP = 2 mA 6.0 6.4 6.7 V
Voltage
EN/UV Pin Line
Under-Voltage ILUV TJ = 25 °C 22.5 25 27.5 µA
Threshold
CIRCUIT PROTECTION
TNY274 di/dt = 50 mA/µs
233 250 267
TJ = 25 °C See Note E
256 275 294
Standard Current 326 350 374
Limit (BP/M
Capacitor = ILIMIT
419 450 481 mA
0.1 µF)
See Note D TNY278 di/dt = 110 mA/µs
512 550 588
605 650 695
698 750 802
Reduced Current 196 210 233
Limit (BP/M ILIMITred mA
Capacitor = 1 µF) 233 250 277
14 E
2/06
TNY274-280
Conditions
SOURCE = 0 V; TJ = -40 to 125 °C
See Figure 16
CIRCUIT PROTECTION (cont.)
256 275 305
326 350 388
Reduced Current TJ = 25 °C See Note E
Limit (BP/M TNY278 di/dt = 110 mA/µs
ILIMITred 419 450 499 mA
Capacitor = 1 µF) TJ = 25 °C See Note E
512 550 610
605 650 721
196 210 233
TJ = 25 °C See Note E, F
326 350 388
419 450 499
Increased Current TJ = 25 °C See Note E
Limit (BP/M TNY277 di/dt = 90 mA/µs
ILIMITinc 512 550 610 mA
Capacitor = 10 µF) TJ = 25 °C See Note E
605 650 721
698 750 833
791 850 943
Standard 0.9 × 1.12 ×
I2f
Current Limit I2f I2f
I2f = ILIMIT(TYP)2 ×
Power Coefficient I2f
fOSC(TYP) Reduced or A2Hz
0.9 × 1.16 ×
Increased I2f
I2f I2f
Current Limit
See Figure 19 0.75 ×
Initial Current Limit IINIT
TJ = 25 °C, See Note G ILIMIT(MIN) mA
Leading Edge TJ = 25 °C
tLEB 170 215 ns
Blanking Time See Note G
Current Limit TJ = 25 °C
tILD 150 ns
Delay See Note G, H
Thermal Shutdown
TSD 135 142 150 °C
Temperature
E
2/06 15
TNY274-280
Conditions
SOURCE = 0 V; TJ = -40 to 125 °C
See Figure 16
CIRCUIT PROTECTION (cont.)
Thermal Shut-
TSDH 75 °C
down Hysteresis
BP/M Pin Shut-
down Threshold ISD 4 5.5 7.5 mA
Current
BP/M Pin Power-

Up Reset Thresh- VBP/M(RESET) 1.6 2.6 3.6 V
old Voltage
OUTPUT
TNY274 TJ = 25 °C 28 32
ID = 25 mA TJ = 100 °C 42 48
TNY275 TJ = 25 °C 19 22
ID = 28 mA TJ = 100 °C 29 33
TNY276 TJ = 25 °C 14 16
ID = 35 mA TJ = 100 °C 21 24
ON-State TNY277 TJ = 25 °C 7.8 9.0

RDS(ON) Ω
Resistance ID = 45 mA TJ = 100 °C 11.7 13.5
TNY278 TJ = 25 °C 5.2 6.0

ID = 55 mA TJ = 100 °C 7.8 9.0
TNY279 TJ = 25 °C 3.9 4.5

ID = 65 mA TJ = 100 °C 5.8 6.7
TNY280 TJ = 25 °C 2.6 3.0

ID = 75 mA TJ = 100 °C 3.9 4.5
VBP/M = 6.2 V TNY274-276 50
VEN/UV = 0 V
IDSS1 VDS = 560 V TNY277-278 100
OFF-State Drain TJ = 125 °C
TNY279-280 200 µA
Leakage Current See Note I
VDS = 375 V,
VBP/M = 6.2 V
IDSS2 TJ = 50 °C 15
VEN/UV = 0 V See Note G, I
Breakdown VBP = 6.2 V, VEN/UV = 0 V,
BVDSS 700 V
Voltage See Note J, TJ = 25 °C
DRAIN Supply
50 V
Voltage
16 E
2/06
TNY274-280
Conditions
SOURCE = 0 V; TJ = -40 to 125 °C
See Figure 16
OUTPUT (cont.)
Auto-Restart TJ = 25 °C
tAR 64 ms
ON-Time at fOSC See Note K
Auto-Restart
DCAR TJ = 25 °C 3 %
Duty Cycle
NOTES:
A. IS1 is an accurate estimate of device controller current consumption at no-load, since operating frequency is so
low under these conditions. Total device consumption at no-load is the sum of IS1 and IDSS2.
B Since the output MOSFET is switching, it is difficult to isolate the switching current from the supply current at the
DRAIN. An alternative is to measure the BP/M pin current at 6.1 V.
C. BP/M pin is not intended for sourcing supply current to external circuitry.
D. To ensure correct current limit it is recommended that nominal 0.1 µF / 1 µF / 10 µF capacitors are used. In
addition, the BP/M capacitor value tolerance should be equal or better than indicated below across the ambient
temperature range of the target application. The minimum and maximum capacitor values are guaranteed by
characterization.
Tolerance Relative to Nominal

Nominal BP/M Capacitor Value
Pin Cap Value
Min MAX
0.1 µF -60% +100%
1 µF -50% +100%
10 µF -50% NA
E. For current limit at other di/dt values, refer to Figure 23.
F. TNY274 does not set an increased current limit value, but with a 10 µF BP/M pin capacitor the current limit is the
same as with a 1 µF BP/M pin capacitor (reduced current limit value).
G. This parameter is derived from characterization.
H. This parameter is derived from the change in current limit measured at 1X and 4X of the di/dt shown in the ILIMIT
specification.
I. IDSS1 is the worst case OFF state leakage specification at 80% of BVDSS and maximum operating junction
temperature. IDSS2 is a typical specification under worst case application conditions (rectified 265 VAC) for no-load
consumption calculations.
J. Breakdown voltage may be checked against minimum BVDSS specification by ramping the DRAIN pin voltage up
to but not exceeding minimum BVDSS.
K. Auto-restart on time has the same temperature characteristics as the oscillator (inversely proportional to
frequency).
E
2/06 17
TNY274-280
470 Ω
5W S2
470 Ω
S D
S1
S
2 MΩ
S BP/M 50 V
EN/UV 10 V
S
150 V
0.1 µF
NOTE: This test circuit is not applicable for current limit or output characteristic measurements.
PI-4079-080905
Figure 16. General Test Circuit.
DCMAX
(internal signal)
tP
EN/UV
tEN/UV
VDRAIN
1
tP =
fOSC
PI-2364-012699
Figure 17. Duty Cycle Measurement. Figure 18. Output Enable Timing.
PI-4279-013006
0.8
Figure 19. Current Limit Envelope.
18 E
2/06
TNY274-280
Typical Performance Characteristics

1.1 1.2
PI-4280-012306
PI-2213-012301
1.0
(Normalized to 25 °C)
Breakdown Voltage
Output Frequency
0.8
1.0 0.6
0.4
0.2
0.9 0
-50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125
Junction Temperature (°C) Junction Temperature (°C)
Figure 20. Breakdown vs. Temperature. Figure 21. Frequency vs. Temperature.
1.2 1.4
PI-4081-082305
PI-4102-010906
Normalized Current Limit 1.2

1
Standard Current Limit
1.0
0.8
0.8 Normalized
0.6 di/dt = 1
0.6 TNY274 50 mA/µs
TNY275 55 mA/µs Note: For the
0.4 TNY276 70 mA/µs normalized current
0.4 limit value, use the
TNY277 90 mA/µs
TNY278 110 mA/µs typical current limit
0.2 specified for the
0.2 TNY279 130 mA/µs appropriate BP/M
TNY280 150 mA/µs capacitor.
0 0
-50 0 50 100 150 1 2 3 4
Temperature (°C) Normalized di/dt
Figure 22. Standard Current Limit vs. Temperature. Figure 23. Current Limit vs. di/dt.
300 1000
PI-4083-082305
PI-4082-082305
Scaling Factors:
TNY274 1.0
250
Drain Capacitance (pF)
TNY275 1.5
Drain Current (mA)
TNY276 2.0
200 TNY277 3.5 100
TNY278 5.5 Scaling Factors:
TNY279 7.3 TNY274 1.0
150 TNY280 11 TNY275 1.5
TNY276 2.0
TNY277 3.5
100 10 TNY278 5.5
TNY279 7.3
TCASE=25 °C TNY280 11
50 TCASE=100 °C
0 1
0 2 4 6 8 10 0 100 200 300 400 500 600
DRAIN Voltage (V) Drain Voltage (V)
Figure 24. Output Characteristic. Figure 25. COSS vs. Drain Voltage.
E
2/06 19
TNY274-280
Typical Performance Characteristics (cont.)

50
PI-4084-082305
1.2
PI-4281-012306
Scaling Factors:
TNY274 1.0
Under-Voltage Threshold
40 1.0
TNY275 1.5
TNY276 2.0
TNY277 3.5
Power (mW)
0.8
30 TNY278 5.5
TNY279 7.3
TNY280 11 0.6
20
0.4
10 0.2
0 0
0 200 400 600 -50 -25 0 25 50 75 100 125
DRAIN Voltage (V) Junction Temperature (°C)
Figure 26. Drain Capacitance Power. Figure 27. Under-Voltage Threshold vs. Temperature.
20 E
2/06
TNY274-280
PART ORDERING INFORMATION

TinySwitch Product Family
Series Number
Package Identifier
G Plastic Surface Mount SMD-8C
P Plastic DIP-8C
Lead Finish
N Pure Matte Tin (Pb-Free)
Tape & Reel and Other Options
Blank Standard Configurations
TNY 278 G N - TL TL Tape & Reel, 1000 pcs min./mult., G Package only
DIP-8C
⊕D S .004 (.10) Notes:
-E- 1. Package dimensions conform to JEDEC specification
MS-001-AB (Issue B 7/85) for standard dual-in-line (DIP)
package with .300 inch row spacing.
2. Controlling dimensions are inches. Millimeter sizes are
shown in parentheses.
.240 (6.10) 3. Dimensions shown do not include mold flash or other
.260 (6.60) protrusions. Mold flash or protrusions shall not exceed
.006 (.15) on any side.
4. Pin locations start with Pin 1, and continue counter-clock-
wise to Pin 8 when viewed from the top. The notch and/or
dimple are aids in locating Pin 1. Pin 3 is omitted.
Pin 1
5. Minimum metal to metal spacing at the package body for
.367 (9.32) the omitted lead location is .137 inch (3.48 mm).
-D- 6. Lead width measured at package body.
.387 (9.83)
7. Lead spacing measured with the leads constrained to be
.057 (1.45) perpendicular to plane T.
.068 (1.73)
(NOTE 6)
.125 (3.18) .015 (.38)
.145 (3.68) MINIMUM
-T-
SEATING .008 (.20)
PLANE .120 (3.05) .015 (.38)
.140 (3.56)
.300 (7.62) BSC

.100 (2.54) BSC .048 (1.22) .137 (3.48) (NOTE 7)
.014 (.36)
.053 (1.35) MINIMUM .300 (7.62) P08C
.022 (.56) ⊕T E D S .010 (.25) M .390 (9.91) PI-3933-100504
E
2/06 21
TNY274-280
SMD-8C
Notes:
⊕ D S .004 (.10) .046 .060 .060 .046 1. Controlling dimensions are
inches. Millimeter sizes are
-E- shown in parentheses.
.080 2. Dimensions shown do not
include mold flash or other
.086 protrusions. Mold flash or
.186 protrusions shall not exceed
.372 (9.45) .006 (.15) on any side.
.240 (6.10)
.388 (9.86) .286 .420 3. Pin locations start with Pin 1,
.260 (6.60)
⊕ E S .010 (.25) and continue counter-clock-
wise to Pin 8 when viewed
from the top. Pin 3 is omitted.
4. Minimum metal to metal
spacing at the package body
Pin 1 Pin 1 for the omitted lead location
.137 (3.48) is .137 inch (3.48 mm).
MINIMUM Solder Pad Dimensions 5. Lead width measured at
.100 (2.54) (BSC)
package body.
6. D and E are referenced
.367 (9.32) datums on the package
-D-
.387 (9.83) body.
.057 (1.45)
.125 (3.18) .068 (1.73)
.145 (3.68) (NOTE 5)
.004 (.10)
.032 (.81) .048 (1.22)
.053 (1.35)
.009 (.23) .004 (.10) .036 (0.91) 0°- 8°
.037 (.94)
.012 (.30) .044 (1.12) G08C
PI-4015-013106
22 E
2/06
TNY274-280
E
2/06 23
TNY274-280
Revision Notes Date

D Release final data sheet. 1/06
E Corrected figure numbers and references. 2/06
For the latest updates, visit our website: www.powerint.com

Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not assume
any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY HEREIN AND SPECIFICALLY
DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS.
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The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one or more U.S.
and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrationsʼ patents
may be found at www.powerint.com. Power Integrations grants its customers a license under certain patent rights as set forth at http://www.powerint.com/ip.htm.
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POWER INTEGRATIONSʼ PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS
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when properly used in accordance with instructions for use, can be reasonably expected to result in significant injury or death to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or effectiveness.
The PI logo, TOPSwitch, TinySwitch, LinkSwitch, DPA-Switch, EcoSmart, Clampless, E-Shield, Filterfuse,
PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies.
©Copyright 2006, Power Integrations, Inc.
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24 E
2/06
DWN. CHKD. APPD.
仕様書番号
DSF-P0027 Ver. 0.1 仕様書 Specifications Haneda Kachi Terajima
Specifications number '07.02.14 '07.02.14 '07.02.14
作成日
'07.02.14
Creation day 改訂履歴 Record of Revision
Ver. Description of Revision Date REVD CHKD APPD

1.0 制定 Haneda Kachi Terajima
RoHS
Gold-plated connector is used.
仕様書
Specifications
製品名：
Product name： OPA-681PH-NH
Parts name： OPA-681PH-NH-2
Parts number：
APPROVED BY (CHOP MARK AND SIGNATURE)
目次 CONTENTS
Please approve after understanding clause 4.-(11) on sheet 14.
It is considered that it was approved when there is an order before returning this specifications. １－１．　適用範囲 Scope and field of Application
１－２．評価条件 Test Conditions

内容説明
Contents explanation ２－１．性能 Characteristics
○ 仕様内容は改善の為変更になる可能性が有ります。２－２．信頼性 Reliability

There is a possibility for change of specification for the improvement.
２－３．信頼性試験条件 Reliability test conditions
○ 仕様を満足する範囲内において、改善の為部品の一部を変更する場合が有ります。
There is a possibility for change of parts within a range of specification for the improvement. ２－４．機械的仕様 Mechanical specifications
２－５．主要部品安全規格 Safety Standerd of Main Parts
３－１．外形図 Dimensions
３－２．結線図 Schematic diagram
SUPPLIER ３－３．ＡＰＣ回路図 APC circuit diagram

General
R&D QA
Manager ３－４．光路図 Optical path diagram
Arima Devices Japan Inc.
４．取り扱い上の注意 Precautions for handling
Design & Development Division
Yasuda Bldg.No.4, 2-26-2, Tsuruyacho, 製品名： Product name: 仕様書番号：　Specifications number: Sheet
Haneda Kachi Terajima Kanagawa-ku, Yokohama 221-0835, JAPAN
OPA-681PH-NH DSF-P0027 0
Arima Devices Japan Inc. Arima Devices Japan Inc.

1-1. 適用範囲　Scope and field of Application 2-1. 性能　Characteristics
本仕様書はDVD用光ﾋﾟｯｸｱｯﾌﾟに適用する。
This specification apply to the optical pickup for DVD. 2-1-(1) 基本仕様　Basic specifications
種類　Type 光ピックアップ　Optical pickup
1-2. 評価条件　Test Conditions 用途　Application DVD , CD-DA(Compact Disc Digital Audio) , VCD(Video CD)
(1) 標準評価条件　Standard test environment
温度 Temperature 23±3℃ 方式　Method DVD 光源半導体レーザー　Laser diode
湿度 Humidity 60±5%RH DVD Light source 波長　Wavelength：　650Min.～655Typ.～660Max. nm
ただし、判定に疑義が生じない場合には下記条件で測定してもかまわない。型番　Type：　ADL-65075GR
In case that doubt does not happen to determination measurement does not matter even ﾒｰｶｰ：　華上光電公司
the following condition. Manufacturer：　Arima Optoelectronics Corporation
温度 Temperature 25±10℃
湿度 Humidity 65±25%RH CD 光源半導体レーザー　Laser diode
CD Light source 波長　Wavelength：　770Min.～790Typ.～805Max. nm
(2) 評価姿勢　Test posture 型番　Type：　ADL-78031FR
対物ﾚﾝｽﾞ光軸は重力方向とする。ﾒｰｶｰ：　華上光電公司
The object lens axis makes gravity direction. Manufacturer：　Arima Optoelectronics Corporation
(3) 試験用装置、回路　Mechanical installation, circuit 光検出器６分割PDIC 6 Divided PDIC

判定に疑義を生じない水準であること。 Photo detector 型番　Type：　PH9119A4NF1
It shall not ensure suspicion from the evaluation of the test results. ﾒｰｶｰ：　NEC化合物デバイス株式会社
Manufacturer：　NEC corporation
(4) 評価用ディスク　Test disc
CD: A-BEX TCD-782を使用する。　For test, use A-BEX TCD-782. アクチュエータ　Actuator 4本ワイヤータイプ　4-wire type
DVD: A-BEX TDV-520Cを使用する。　For test, use A-BEX TDV-520C
ﾌｫｰｶｽｴﾗｰ　Focus error 非点収差方式　Astigmatic method
(5) 標準試験条件　Standard test conditions
特に指定しない限り、以下の条件で行う。ﾄﾗｯｷﾝｸﾞｴﾗｰ　Tracking error DVD：　位相差検出法　DPD method
Except specified, test under the following conditions.
[a] 機械的条件　Mechanical condition CD：　3ビーム方式　3-beam method
傾角　Skew
ラジアル方向０度、タンジェンシャル方向０度。光学系　Optical 対物レンズ　Objective lens DVD：　f=3.05mm NA=0.60 WD=1.67mm
Radial skew 0 deg, Tangential skew 0 deg.
取付高さ　Height CD：　f=3.07mm NA=0.47 WD=1.30mm
ガイドシャフト中心とディスクの下面までの距離が9.5mm
The distance to a guide shaft center and the undersurface of a disc is 9.5mm. 対物レンズ出射光量 DVD ：　0.6 mW max 連続 Continuous
[b] 回路条件　Electric offset Emitting light output at objective lens CD ：　0.5 mW max 連続 Continuous
Vcc電圧　Vcc Voltage
5.0V 動作温度 10～80 %RH -10～60 ℃
Vc電圧　Vc Voltage Operating environment
2.5V 保存温度 -30～70 ℃
フォーカスオフセット電圧　Focusing offset Non-operating 但し急激な温度変化を与えて結露を生じさせないこと。
ベストフォーカスに調整する。 environment Avoid dew caused by rapid thermal change.
Adjusted to the best focusing point.
ラジアルオフセット電圧　Radial offset 寸法　Dimensions 3-1項による
D.C. 0V 外形　Appearance See section 3-1 Fig.1
APC回路　APC circuit 重量　Weight 15g(Nom.)
3-3項 APC回路図による
See section 3-3. Fig..3 APC circuit diagram 使用姿勢 Use attitude ﾄﾗｯｷﾝｸﾞ方向が重力方向となす角度は45°以上を推奨。
(6) 評価回転速度　Evaluation Disc speed The angle that tracking direction does with gravity direction
標準速（１倍速）で測定する。　Nomal speed recommends 45 or more degree.
製品名： Product name: 仕様書番号：　Specifications number: Sheet 製品名： Product name: 仕様書番号：　Specifications number: Sheet
OPA-681PH-NH DSF-P0027 1 OPA-681PH-NH DSF-P0027 2

項目 Items 条　件 Condition 仕様 Specifications
2-1-(2) 電気性能 Electrical performance ﾌｫﾄﾃﾞｨﾃｸﾀｰ (PDIC)
項目 Items 条　件 Condition 仕様 Specifications Photo detector
ﾚｰｻﾞｰﾀﾞｲｵｰﾄﾞ (DVD) 最大定格 Tc=25℃
Laser diode Maximum ratings
最大定格 Tc=25℃ 電源電圧 Vcc - 6 V
Maximum ratings Power supply voltage
光出力 Po CW 10 mW ADL-65075GR
Light output power 許容損失 PD 240 mW
Allowable dissipation
逆電圧 Vrl,Vrd - 2 V Laser diode
Reverse voltage 30 V Monitor pin photo diode 推奨電源電圧範囲 Vcc ：+4.5 ～+5.5 V
Recommended power Vc ：+1.5 ～Vcc-2.0 V
電気特性 Tc=25℃ supply voltage range
Electrical characteristics
動作電流 Iop Po=7mW 35 mA max 25 mA typ ADL-65075GR 電気特性 Tc=25℃
Operating current Electrical characteristics Vcc=5.0V, Vc=2.5V
RL=3kΩ, CL=10pF(NEC)
動作電圧 Vop Po=7mW 2.5 V max 2.2 V typ ADL-65075GR
Operating voltage 最大出力電圧 VoM Pi=10μW A～D ：195 mV min 260 mV typ 325 mV max
Maximum output voltage λ=780nm E～F ：350 mV min 470 mV typ 590 mV max
ﾚｰｻﾞｰﾀﾞｲｵｰﾄﾞ (CD) RF ：330 mV min 440 mV typ 550 mV max
Laser diode
最大定格 Tc=25℃ Pi=10μW A～D ：205 mV min 275 mV typ 345 mV max
Maximum ratings λ=650nm E～F ：370 mV min 495 mV typ 620 mV max
光出力 Po CW 5 mW RF ：345 mV min 460 mV typ 575 mV max
Light output power
遮断周波数 fc from 100kHz, -3dB A～D ：65 MHz min 100 MHz typ - max
逆電圧 Vrl,Vrd - 2 V Laser diode Cut off frequency λ=650nm, 780nm E～F ：0.5 MHz min 2 MHz typ - max
Reverse voltage 30 V Monitor pin photo diode RF ：60 MHz min 90 MHz typ - max
電気特性 Tc=25℃
動作電流 Iop Po=3mW 55 mA max 45 mA typ ADL-78031FR
Operating current
動作電圧 Vop Po=3mW 2.3 V max 1.8 V typ ADL-78031FR

Operating voltage
アクチュエータ
Actuator
　ﾌｫｰｶｽｺｲﾙ駆動電流連続 150 mA rms max 但しトラッキングは0mA

　Focusing coil current Continuous 0mA for tracking
　ﾄﾗｯｷﾝｸﾞｺｲﾙ駆動電流連続 150 mA rms max 但しフォーカスは0mA

　Tracking coil current Continuous 0mA for focusing

信頼性規格
項目条　件仕様
2-1-(3) アクチュエータ規格 Reliability
Actuator characteristics Items Condition Specifications spec.
信頼性規格トラッキング　Tracking
Reliability 対物レンズ可動量自由中立点からの可動量 ±0.4 mm以上 or more
Items Condition Specifications spec. Movable distance From free position
フォーカス　Focusing
対物レンズ可動量フォーカス基準位置より ±0.7 mm以上 or more コイル直流抵抗 D.C. 4.0～5.4 ohm B±30%
Movable distance From focus center position Coil resistance at 25℃
コイル直流抵抗 D.C. 5.5～7.5 ohm B±30% 位相遅れ量 at 1～5 KHz max 15 deg C±10deg
Coil resistance at 25℃ Phase delay
共振周波数振幅ピーク値の周波数 50～60 Hz +5Hz
位相遅れ量 at 1～5 KHz max 25 deg C±10deg Resonance freq. (fo) Frequency of amplitude peak C -8Hz
Phase delay 共振ピーク量共振周波数での振幅値 max 14 dB C±5dB
共振周波数振幅ピーク値の周波数 50～60 Hz +5Hz Resonance peak value (Q) Amplitude value in
Resonance freq. (fo) Frequency of amplitude peak C -8Hz resonance frequency
共振ピーク量共振周波数での振幅値 max 14 dB C±5dB Q = Gain(fo) - Gain(5Hz)
Resonance peak value (Q) Amplitude value in
resonance frequency 高次共振周波数振幅ピーク値の周波数 18 KHz以上 or more A 18 KHz以上
Q = Gain(fo) - Gain(5Hz) Higher-order Frequency of amplitude peak or more
resonance frequency
高次共振周波数振幅ピーク値の周波数 18 KHz以上 or more A 18 KHz以上ピーク交点周波数共振ピークと中域ゲインの交点 10 KHz以上 or more A 10 KHz以上
Higher-order Frequency of amplitude peak or more Peak intersection The intersection of a higher-order or more
resonance frequency frequency resonance peak and a middle range
ピーク交点周波数共振ピークと中域ゲインの交点 10 KHz以上 or more A 10 KHz以上 gain
Peak intersection The intersection of a higher-order or more 5Hz感度 0.57～0.93 mm/V B±30%
frequency resonance peak and a middle range Sensitivity(5Hz)
gain 200Hz感度 34～46 μm/V B±30%
5Hz感度 0.81～1.09 mm/V B±30% Sensitivity(200Hz)
Sensitivity(5Hz)
200Hz感度 44～60 μm/V B±30% チルト精度　Tilt accuracy
Sensitivity(200Hz) タンジェンシャル方向 Focus： ±0.5 ±0.3 deg A±0.3deg
Tangential direction DVDフォーカス基準位置より
*Measurements in terminal of ACT PCB From focus center position for DVD
*The above-mentioned data is without FPC and FFC ラジアル方向 Tracking： ±0.3 ±0.3 deg A±0.3deg
Radial direction 自由中立点より
From free position
*Measurements in terminal of ACT PCB

*The above-mentioned data is without FPC and FFC
対物レンズの動作　Direction of objective lens movement
フォーカス方向　Focusing direction
コネクタのFo+ピンにプラス電圧が印可された場合、対物レンズはディスクに近づく方向に動く。
When positive voltage applied to Fo+ pin, the objective lens moves toward the disc.
トラッキング方向　Tracking direction
コネクタのTR+ピンにプラス電圧が印可された場合、対物レンズはディスクの内周方向に動く。
When positive voltage applied toTR+ pin, the objective lens moves toward the inner of disc.

2-1-(4) 信号再生規格 2-2. 信頼性　Reliability
信頼性規格 2-2-(1) 環境試験 Environment test
Reliability spec.
項目条　件方　　法
Items Condition Specifications Operating Non-operating
RF信号　RF signal Items Condition Test method
信号振幅 DVD：14Tの振幅値(p-p) DVD： 1.08±0.22 Vp-p B±40% B±25% 放置試験　Non-operating test
Signal level DVD：p-p level of 14T signal. 高温保存 Temperature: 70℃ 各条件雰囲気中に非動作にて放置し、常温・常湿中に
CD：11Tの振幅値(p-p) CD： 0.65±0.15 Vp-p B±25% B±25% High temperature Time: 24H 取り出し、72時間放置後再生性能を測定する。
CD：p-p level of 11T signal. 温度試験に関しては疑義を生じない限り、16時間
Gain 1X(A+B+C+D) output 低温保存 Temperature: -30℃ 放置後の測定を可とする。
Low temperature Time: 24H Leave the non-operating pickup under each condition
ジッター量 DVD：クロックジッター DVD： 10.5 % max. A 14% max. A 14% max. and leave under standard environment for 72 hours
Jitter DVD：Data to the standard clock 高湿保存 Temperature: 40℃ and measure.
CD：3Tジッター標準偏差 CD： 26 nsec max. A 32nsec max. A 32nsec max. High humidity Humidity: 90% If there are no suspicion, it may be measured after
CD：Standard deviation of 3T jitter Time: 48H 16 hours regarding to the temperature test.
信頼性規格温度サイクル Temperature: -20,60℃ .4h 1h 1h 1h .6h

Reliability Temperature cycle Cycle: 5 cycles +60℃
Items Condition Specifications spec. +25℃
ﾌｫｰｶｽｴﾗｰ信号 Focusing error signal FE=(A+C)-(B+D) -20℃
信号振幅 Sカーブの振幅値(p-p) DVD： 1.25±0.35 Vp-p B±30% 4 hours
Signal level p-p level of S-curve CD： 0.79±0.26 Vp-p B±30%
信号バランスエラー信号のセンターずれ量 ±17 %　以下 C±20% 温度特性試験　Operating test

Signal balance Deviation of signal Less than 高温動作 Temperature: 60℃ 条件雰囲気中にて4時間以上放置後、同条件中で
High temperature 10分以上動作させ、下記項目を測定する。
信号検出範囲 Sカーブの(p-p)に対する範囲 DVD： 6.0 μm 設計値 Design value 試験項目：　ジッター量、RF信号振幅
Detecting range S-curve p-p range CD： 6.0 μm 設計値 Design value 低温動作 Temperature: -10℃ Before applying the following test, leave the pickup
Low temperature under the condition mentioned in the left for more
合焦ずれジッター最良点と動作基準 DVD： ±20 % C±20% than 4 hours and operate the unit for 10 minutes
Defocus 位置との距離 CD： ±17 % C±17% under the same condition.
Distance of best jitter position and Test items: jitter, RF signal level
standard position
極性 (A+C)-(B+D)<0 の時は合焦点よりディスクが近い状態 2-2-(2) 輸送試験 Transit test

Polarity If (A+C)-(B+D)<0,disc closer than focalpoint.
項目条　件方　　法
CD：ﾄﾗｯｷﾝｸﾞｴﾗｰ信号 Tracking error signal TE=E-F Items Condition Test method
信号振幅エラー信号の振幅値(p-p) 0.12±0.06 Vp-p B±30% 振動試験加速度　Acceleration: 2.4G constant
Signal level Signal p-p level Vibration test 周波数　Frequency: 10～50Hz
Sweep time: 5 minutes(往復 up & down)
信号バランスエラー信号のセンターずれ量 ±30 % C±20% 方向　direction: 3 directions(X, Y, Z)
Signal balance Deviation of signal 時間　Time: 0.5 hour X 3 directions, total 1.5 hours
振動試験機を使用する。　Use vibration test machine.
回折格子調整精度 Subtract 180 from phase ±45 deg C±15deg
Grating adjustment shift between E and F signal 衝撃試験加速度　Acceleration: 80G, 6 msecond
Position: approx. 37.5mm from Shock test 方向　Direction: 3 directions 6 faces(±X, ±Y, ±Z)
center of disc 3 times X 6 faces, total 18 times.
衝撃試験機を使用する。　Use shock test machine.
極性 E-F>0は内周方向へスポットがずれた時
Polarity If E-F>0,the spots are slipped off the track to the inside.

2-3. 信頼性試験条件　Reliability test conditions 2-5. 主要部品安全規格 Safety Standerd of Main Parts
(1)試験条件、姿勢　Test condition, posture 2-5-1. Connector

標準試験条件と同一条件で測定することを原則とする。
The reliability test shall be conducted at the same conditions as the standard test. LD03T2-24ND-01 : Manufactured by SUMIKO TEC CO LTD
Parts Material Manufacture Material Generic Material UL Flame UL File
(2)試験用測定器、ディスク　Measuring instrument, disc Name Type Class No
標準試験と同一の測定器または、同等品を用いる。 DSM JAPAN ENGINEERING
Socket Housing PA4/6 TS250F6D 94V-0 E172082
但し、測定器、ディスクはやむを得ない場合を除き特殊環境中に入れてはならない。 PLASTIC K.K
The same measuring instrument and disc of equvalent as used in the standard test shall be used.
Slider Housing POLYPLASTICS CO., LTD. PPS 1140-A1 94V-0 E109088
But the instrument and disc shall not be entered into a specific environment exept in case of inevitable.
(3)測定　Measurements FPC0.5H-SMT-24P G : Manufactured by SHANGHAI YUESHEN ELECTRONIC CO LTD

電気系の設定、及び機械的設定は、標準試験条件の初期設定のままで行う。 Parts Material Manufacture Material Generic Material UL Flame UL File
The electric and mechanical measurements of this test shall take place as they were initially measured at the Name Type Class No
standard test conditions. DSM JAPAN ENGINEERING
Socket Housing PA4/6 TS250F4D 94V-0 E172082
PLASTIC K.K
(4)適用規格　Specifications 1140-A6
Slider Housing POLYPLASTICS CO., LTD. PPS 94V-0 E109088
各試験による性能は、適用規格欄の分類に基づき規格一覧表により判定する。 HF2000
See the column of reliability specifications and classification (A, B, C).
A: 絶対値　Absolute value
B: 対初期比　Ratio to initial value 2-5-2. Printed circuit boards
C: 対初期差　Difference from initial value
Parts Material Manufacture Type UL Flame Class UL File No.
(5)結露　Dew condensation
試験中は結露することのないようにする。
ELEMENT DENSHI CO LTD E36 94V-0 E69115
The dew condensation under test implementation is strict prohibition.
PCB-ACT
Towa Devices Corp. 1, CM 94V-0 E220250
(6)対物レンズ　Objective lens
対物レンズが汚れた場合は清掃後に測定する。
Ya Hsin Industrial Co., Ltd. GT10T 94V-0 E226898
Clean and measure it when object lens is dirty.
FPC-OPT
Shenzhen Flexcircuits Co., Ltd. FPC1020 94V-0 E160353
2-4. 機械的仕様　Mechanical specifications
(1)外形寸法、送り部品取付部：　3-1 外形図
Dimension, feed parts attachment part: 3-1 Fig.1 Dimensions
(2)コネクター結線：　3-2 結線図
Connector wiring: 3-2 Fig.2 Schematic diagram
(3)送りガイド用軸受け　Feed guide bearing.

① 基準軸受け　Master bearing: 2-φ3(+0.015, -0.000) mm
② 従動軸受け　Sub bearing: 3(+0.020, +0.005) mm
③ 治具（シャフト径　φ2.998 X 2本使用）に取付、自重で落下すること。
Set the pickup to jig and the pickup shall fall free.

3-1. Fig.1外形図 Dimensions 3-2. Fig..2 結線図 Schematic diagram
コネクタピン配列について *先行スポット(Lead spot): F

Connector pin layout *FPC Connection: pitch=0.5mm
　　図示方向：対物レンズ側より見る *Vcc=5V , Vc=2.5V
　　View from the objective lens side *FPC/FFC Connection: pitch=0.5mm
contact side connector
コネクタ仕様　Connector Spec.
メッキ厚 Plating thickness [μm]
ﾒｰｶｰ型番　　　　　　処理
Au 下地 priming Ni
Manufacturer 　Type Plating
Min Typ Max Min Typ Max
SUMIKO TEC LD03T2-24ND-01 Au 0.056 0.0864 0.105 1.795 2.0764 2.320 *1
YUESHEN FPC0.5H-SMT-24P G Au 0.076 0.1016 0.127 1.270 2.1590 3.048
*1 The plating thickness is a measurement value by the connector manufacturer. (n=100)

3-3. Fig..3 APC回路図 APC circuit diagram 4. 取り扱い上の注意　Precautions for handling
（１）対物レンズからはレーザ光が放射されます。
動作中のLDを直視したり、あるいは他のレンズやミラーを介して光束を監視すると危険ですから、絶対に行わないで
下さい。　もし観察するときは、赤外線ビューアーかITVカメラ等を使用して下さい。
Laser light is emitted from an object lens. Never look directly into the LD or observe the laser beam through another
lens or mirror. If you need to view the beam, use an infrared viewer or an ITV camera.
（２）半導体レーザは静電気によって破壊されやすいので、ピックアップの取り扱いに際しては静電気の発生を防止するように
ご注意下さい。　作業を行う床と机上には静電防止マットを敷き、高抵抗（１ＭΩ程度）を介してアースと接続して下さい。
作業を行う人は手首にリストストラップを着用し、高抵抗（１ＭΩ程度）を介してアースと接続して下さい。
Take precaution against static electricity for handling the pickup, because laser diode may be destroyed by static
DVD Vref=0.18V
electricity. Spread conductive rubber sheet to floor and desk and connect to ground through high impedance
resistor (about 1MΩ). Use wrist band and connect to ground through high impedance resistor (about 1MΩ).
（３）ＬＤの端子は、出荷時に輸送による静電気破壊防止のため、半田ショートされています。　　ショート部の開放は、コネクタ
差し込み後半田鏝で行って下さい。　使用する半田鏝は、金属部分が接地されたもの或いは通電５分後の絶縁抵抗が
１０ＭΩ以上（Ｄ．Ｃ．５００Ｖ）のもので、半田鏝先が３３０℃以下（３０Ｗ）のものを使用し、速やかに行って下さい。
The terminal of laser diode is shorted with solder for protecting laser diode. Open the terminal by solder iron quickly
after connecting circuit. Use solder iron that metal part of iron is earth connected or insulations resistance is over
10MΩ(500V D.C.) at working and temperature of heater chip is less than 320 degree(30W).
（４）半導体レーザは過電流に非常に弱いので、電源のon-offに際してはスパイク電流を流さないような電源回路を使用して
下さい。　定格を越す光出力を発生させる電流を流さないようご注意下さい。
When tuning on or off the APC circuit, use power source which generate no spike current, because laser diode may be
broken by over current. Take precautions not to operate laser diode over rated output level by over current.
（５）対物レンズに付着したゴミや埃はレンズ用ブロワーを使用して丁寧に吹き飛ばして下さい。　対物レンズに指紋等の汚れ
を付けないように特にその取り扱いにご注意下さい。　万一、汚れが付着した場合にはレンズペーパーにクリーニング液
CD Vref=0.18V （日本綿棒㈱Tel03-3573-1884 CDレンズクリーナ液B4）を少量付けて軽く拭き取って下さい。
Use lens-blower carefully to blow dust on the objective lens. Please pay attention so as not to attach the dirt of
fingerprint etc. to the object lens, especially to the handling. If the objective lens got dirty, wipe slightly with lens
cleaning paper moistened with cleaning liquid (B4) made by JCB INDUSTRY Ltd.
（６）ピックアップの保管や輸送については、対物レンズが下向き、または基準シャフトが下向きになるようにして下さい。
高温高湿下・低温下・埃・砂塵などの多い場所での保存は避けてください。
The storage and transport of the pickup about, the object lens please do as downward, or master bearing becomes
downward. Do not store under high temperature and high humidity, low temperature and dusty environment.
DVD-LD power supply ON procedure （７） LDのチップは、GaAs+GaAlAsで毒物として良く知られているAsを含んでいます。　　毒性は、他の化合物、例えばAs2O3、
SW2 OFF → SW1 DVD ON → SW2 DVD-LD ON AsCl3等に比較し、はるかに弱い毒性で素子1ヶ当たりは少量ですが、チップを取り出し酸やアルカリへ入れたり、200゜C
DVD-LD power supply OFF procedure 以上に加熱したり、口に入れたりすることは絶対行わないで下さい。　ライン不良、サービスパーツの不良品は、廃棄物
SW2 OFF → SW1 OFF 入れにまとめて入れ、御社指定の方法で廃棄処理をして下さい。
The LD chip is manufactured from GaAs and GaAlAs, which contains toxic As(Arsenic). The toxicity of As in this form
is far lower than other As compounds such as As2O3 and AsCl3,and the As content of one chip is very small.
However, avoid putting the chip in an acid or alkali solution, heating it over 200゜C, or putting it your mouth. Defective
3-4. Fig..4 光路図 Optical path diagram LDs from the production line and parts removed in servicing should be disposed of with due care.
（８）本製品は精密調整されています。　分解、調整は行わないでください。　不用意な取り扱いによる衝撃や落下など無い
ようにしてください。　対物レンズ、アクチュエータ、VR、レーザモジュール部は手を触れたり力を加えないでください。
This pickup is already adjusted precisely. Do not decompose or readjust. Pay attention not to drop or not to shock due
to rough handling. Do not touch and do not give force to following parts of the unit:
a. The objective lens b. The actuator c. The variable resistor d.The laser module
（９）アクチュエータ：強力な磁気回路を有していますので、鉄片などの磁性体が近づきますと特性が変化しますので
ご注意ください。　また、カバーの隙間から異物の入ることの無いようにして下さい。
Due to strong magnetic circuit, pay attention not to close magnetic materials like iron. Take care of not entering small
pieces of substance into the opening of the cover.
（１０）レーザーへの戻り光によるノイズ低減のため、DVD-LDに高周波を重畳しています。　輻射レベル低減のための
対策はしていますが、お客様の製品からの放射ノイズを規定内に抑える事を保証するものではありません。
予測できない症状・事態を確認するためにも、お客様の製品で必要とされる評価・試験を必ず行ってください。
The high frequency is superimposed to DVD-LD for the noise decrease to the laser by the return light.
It is not the one to guarantee to suppress the radiation noise from customer's product in regulations though measures
for the radiation level decrease are done. Do the evaluation and the examination needed in customer's product
to check the symptom and the situation not predictable.
（１１） FPC・FFC用コネクタが金めっき仕様の場合はFPC・FFC接触部の表面処理は金めっきとしてください。
異種金属の組み合わせは接点が腐食し接触不良の原因になるため避けてください。
Make the surface treatment in the FPC・FFC contact part a gold plating when the connector for FPC・FFC is a
gold-plated specification.
Avoid the combination of dissimilar. Otherwise, the point of contact corrodes and it causes the loose connection.
製品名： Product name: 仕様書番号：　Specifications number: Sheet

製品名： Product name: 仕様書番号：　Specifications number: Sheet

14 top cover 1
13 back panel 1
12 decoding board 1
11 SCART board 1
10 bottom 1
PDF 文件使用 "pdfFactory Pro" 试用版本创建 www.fineprint.com.cn

09 loader 1
08 cd door 1
07 cd door mirror 1
06 power button 1
05 control PCBA 1
04 control button 1
03 front panel 1
02 front panel mirror 1
5
01 USB cover 1
Item Part Numer Description Qty
4
Model DV3 110 Version A Scale Prepare Date
Name Exploded View Material Sheet Authorize Date
3
Number DV3110-JG01-01 Qty Unit Approval Date
R
2 View
Shenzhen MTC Co., Ltd
1
QR-RD-014B
Procedimiento para cambio de región
All of the DVDs we default all region in firmware ,If need change pls following below way
1, Current region display:

Open the loader , press 9735 on remote and press 9
2, Change region
Open the loader, press 9735 and" Region code " Such as 1 ,or 2,or 3....
It can change region which you want .
file:///I|/Manuales%20de%20Service/Electronica/A%20LLENAR/OEM/DVZ308(Nisato)/Free%20Zone%20setting.txt22/07/2009 02:40:25 p.m.

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5 4 3 2 1

RS1K_SMD Q4 USB/DIGI AUDIO/RGBCVBS/IR

component shall be replaced only by the 4.7K

9PIN/2.0 C158 C193 C194 C195 J2

Cr/YC-Y 2 1 Cb/YC-C TP22 YUV-Y 3

Design: MODEL: DV5312 TITLE: JACK+VIDEO+SCART

Checked: PART NO.: DWG NO.:DV5312-YL01-03

Apprd: SHEET: 5 OF 5 VER: A

SHEN ZHEN MTC MULTIMEDIA CO.,LTD

5P/2.0 R220 43K R218 2.2K

DSPVCC33 R285 43K R281 2.2K

R284 43K R278

R253 4.7K R43 3.3K

AMUTE or MUTE_CTL: R306 47K

C231 47K 2K2 1nF

Design: MODEL: DV5312 TITLE: AUDIO+KARAOKE

Checked: PART NO.: DWG NO.:DV5312-YL01-03

Apprd: SHEET: 4 OF 5 VER: A

SHEN ZHEN MTC MULTIMEDIA CO.,LTD

3V3_DRV 0R 1 Q36 1V8_DRV0R 1 Q35

Important power supply!

ADD FOR STB REALLY

C145 C157 C162 C144

104 104 104 104 + C189 SDRAM configuration:

Design: MODEL: DV5312 TITLE: DSP+SDRAM+FLASH

Checked: PART NO.: DWG NO.:DV5312-YL01-03

Apprd: SHEET: 2 OF 5 VER: A

SHEN ZHEN MTC MULTIMEDIA CO.,LTD

DSP S-VIDEO/CVBS OUTPUT

+5V OPERATIONAL AMPLIFIER

Design: MODEL: DV5312 TITLE: DSP+SDRAM+FLASH

Checked: PART NO.: DWG NO.:DV5312-YL01-03

Apprd: SHEET: 1 OF 1 VER: A

SHEN ZHEN MTC MULTIMEDIA CO.,LTD

TITLE: Cover page

C Checked: PART NO.: DWG NO.:DV5312-YL01-03 C

Apprd: SHEET: 6 pages

SHEN ZHEN MTC MULTIMEDIA CO.,LTD

Energy Efﬁcient, Off-Line Switcher with

Figure 2. Functional Block Diagram.

Pin Functional Description

BYPASS/MULTI-FUNCTION (BP/M) Pin: BP/M 2 7 S

1. It is the connection point for an external bypass capacitor D 4 5 S

state. This improves the response time of the optocoupler that

In addition, there is a 6.4 V shunt regulator clamping the Auto-Restart

and a line under-voltage condition exists, the auto-restart counter

Enable Function The EN/UV pin signal is generated on the secondary by

ON/OFF Operation with Current Limit State Machine

Figure 7. Operation at Moderately Heavy Loading. Figure 8. Operation at Medium Loading.

Figure 9. Operation at Very Light Load. 200

At near maximum load, TinySwitch-III will conduct during 0

Figure 14. TNY278P, 12 V, 1 A Universal Input Power Supply.

OUTPUT POWER TABLE

Table 2. Minimum Practical Power at Three Selectable Current Limit Levels.

Audible Noise Primary Clamp Circuit

TOP VIEW Input Filter

Thermal Considerations Optocoupler

１－２．評価条件 Test Conditions

○ 仕様内容は改善の為変更になる可能性が有ります。２－２．信頼性 Reliability

２－５．主要部品安全規格 Safety Standerd of Main Parts

３－１．外形図 Dimensions

３－２．結線図 Schematic diagram

SUPPLIER ３－３．ＡＰＣ回路図 APC circuit diagram

(3) 試験用装置、回路　Mechanical installation, circuit 光検出器６分割PDIC 6 Divided PDIC

　ﾌｫｰｶｽｺｲﾙ駆動電流連続 150 mA rms max 但しトラッキングは0mA

　ﾄﾗｯｷﾝｸﾞｺｲﾙ駆動電流連続 150 mA rms max 但しフォーカスは0mA

対物レンズの動作　Direction of objective lens movement

信頼性規格温度サイクル Temperature: -20,60℃ .4h 1h 1h 1h .6h

信号バランスエラー信号のセンターずれ量 ±17 %　以下 C±20% 温度特性試験　Operating test

(1)試験条件、姿勢　Test condition, posture 2-5-1. Connector

(3)測定　Measurements FPC0.5H-SMT-24P G : Manufactured by SHANGHAI YUESHEN ELECTRONIC CO LTD

(3)送りガイド用軸受け　Feed guide bearing.

製品名： Product name: 仕様書番号：　Specifications number: Sheet