3/17/2020 Multiple Choice Question (MCQ) on Computer Organization Set-1 | Multiple Choice Questions For Computer Operator

Multiple Choice Question (MCQ) on Computer

15th February 2013
Organization Set-1

Multiple Choice Question (MCQ) on Computer Organization Set-1

1. The load instruction is mostly used to designate a transfer from memory to a processor register
known as____.
A. Accumulator B. Instruction Register
C. Program counter D. Memory address Register
Ans: A
2. A group of bits that tell the computer to perform a specific operation is known as____.
A. Instruction code B. Micro-operation
C. Accumulator D. Register
Ans: A
3. The time interval between adjacent bits is called the_____.
A. Word-time B. Bit-time
C. Turn around time D. Slice time
Ans: B
4. A k-bit field can specify any one of_____.
A. 3k registers B. 2k registers
C. K2 registers D. K3 registers
Ans: B
5. MIMD stands for _____.
A. Multiple instruction multiple data
B. Multiple instruction memory data
C. Memory instruction multiple data
D. Multiple information memory data
Ans: A
6. Logic gates with a set of input and outputs is arrangement of______.
A. Computational circuit
B. Logic circuit
C. Design circuits
D. Register
Ans: A
7. The average time required to reach a storage location in memory and obtain its contents is
called_____.
A. Latency time. B. Access time.
C. Turnaround time. D. Response time.
Ans: B
8. The BSA instruction is______.
A. Branch and store accumulator B. Branch and save return address
C. Branch and shift address D. Branch and show accumulator
Ans: B
9. A floating point number that has a O in the MSB of mantissa is said to have_____.
A. Overflow B. Underflow
C. Important number D. Undefined
Ans: B
10. Translation from symbolic program into Binary is done in_____.
A. Two passes. B. Directly
C. Three passes. D. Four passes.

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Ans: A
11. The instruction ‘ORG O’ is a______.
A. Machine Instruction. B. Pseudo instruction.
C. High level instruction. D. Memory instruction.
Ans: B
12. ‘Aging registers’ are _______.
A. Counters which indicate how long ago their associated pages have been
referenced.
B. Registers which keep track of when the program was last accessed.
C. Counters to keep track of last accessed instruction.
D. Counters to keep track of the latest data structures referred.
Ans: A
13. Memory unit accessed by content is called______.
A. Read only memory B. Programmable Memory
C. Virtual Memory D. Associative Memory
Ans: D
14. _________ register keeps tracks of the instructions stored in program stored in memory.
A. AR (Address Register) B. XR (Index Register)
C. PC (Program Counter) D. AC (Accumulator)
Ans: C
15. n bits in operation code imply that there are ___________ possible distinct
operators.
A. 2n B. 2n
C. n/2 D. n2
Ans: B
16. A three input NOR gate gives logic high output only when_____.
A. one input is high B. one input is low
C. two input are low D. all input are high
Ans: D
17. The circuit converting binary data in to decimal is_____.
A. Encoder B. Multiplexer
C. Decoder D.Code converter
Ans: D
18. The multiplicand register & multiplier register of a hardware circuit implementing booth's algorithm
have (11101) & (1100). The result shall be ______.
A. (812)10 B. (-12)10
C. (12)10 D. (-812)10
Ans: A
19. PSW is saved in stack when there is a _____.
A. interrupt recognized B. execution of RST instruction
C. Execution of CALL instruction D. All of these
Ans: A
20. In computers, subtraction is carried out generally by____.
A. 1's complement method B. 2's complement method
C. signed magnitude method D. BCD subtraction method
Ans: B
21. The main memory in a Personal Computer (PC) is made of_____.
A. cache memory. B. static RAM
C. Dynamic Ram D. both A.and (B).
Ans: D
22. Cache memory works on the principle of_____.
A. Locality of data . Locality of memory
C. Locality of reference D. Locality of reference & memory
Ans: C
23. An n-bit microprocessor has_____.
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A. n-bit program counter B. n-bit address register

C. n-bit ALU D. n-bit instruction register
Ans: D
24. When CPU is executing a Program that is part of the Operating System, it is said to be in _____.
A. Interrupt mode B. System mode
C. Half mode D. Simplex mode
Ans: B
25. Logic X-OR operation of (4ACO)H & (B53F)H results _____.
A. AACB B. 0000
C. FFFF D. ABCD
Ans: C
26. If the main memory is of 8K bytes and the cache memory is of 2K words. It uses associative mapping.
Then each word of cache memory shall be_____.
A. 11 bits B. 21 bits
C. 16 bits D. 20 bits
Ans: C
27. A Stack-organised Computer uses instruction of _____.
A. Indirect addressing B. Two-addressing
C. Zero addressing D. Index addressing
Ans: C
28. In a program using subroutine call instruction, it is necessary______.
A. initialize program counter B. Clear the accumulator
C. Reset the microprocessor D. Clear the instruction register
Ans: D
29. Virtual memory consists of _______.
A. Static RAM B. Dynamic RAM
C. Magnetic memory D. None of these
Ans: A
30. In signed-magnitude binary division, if the dividend is (11100)2 and divisor is (10011)2 then the result
is ______.
A. (00100)2 B. (10100)2
C. (11001)2 D. (01100)2
Ans: B
31. Generally Dynamic RAM is used as main memory in a computer system as it______.
A. Consumes less power B. has higher speed
C. has lower cell density D. needs refreshing circuitry
Ans: B
32. Write Through technique is used in which memory for updating the data _____.
A. Virtual memory B. Main memory
C. Auxiliary memory D. Cache memory
Ans: D
33. Cache memory acts between_______.
A. CPU and RAM B. RAM and ROM
C. CPU and Hard Disk D. None of these
Ans: A
34. The circuit used to store one bit of data is known as ______.
A. Encoder B. OR gate
C. Flip Flop D. Decoder
Ans: C
35. Von Neumann architecture is ______.
A. SISD B. SIMD
C. MIMD D. MISD
Ans: A
36. In a vectored interrupt.
A. the branch address is assigned to a fixed location in memory.
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B. the interrupting source supplies the branch information to the processor through an interrupt vector.
C. the branch address is obtained from a register in the processor
D. none of the above
Ans: B
37. In a memory-mapped I/O system, which of the following will not be there?
A. LDA B. IN
C. ADD D. OUT
Ans: A
38. If memory access takes 20 ns with cache and 110 ns without it, then the ratio (cache uses a 10 ns
memory) is _____.
A. 93% B. 90%
C. 88% D. 87%
Ans: B
39. The addressing mode used in an instruction of the form ADD X Y, is _____.
A. Absolute B. indirect
C. index D. none of these
Ans: C
40. _________ register keeps track of the instructions stored in program stored in memory.
A. AR (Address Register) B. XR (Index Register)
C. PC (Program Counter) D. AC (Accumulator)
Ans: C
41. The idea of cache memory is based ______.
A. on the property of locality of reference
B. on the heuristic 90-10 rule
C. on the fact that references generally tend to cluster
D. all of the above
Ans: A
42. Which of the following is not a weighted code?
A. Decimal Number system B. Excess 3-cod
C. Binary number System D. None of these
Ans: B
43. The average time required to reach a storage location in memory and obtain its contents is called the
_____.
A. seek time B. turnaround time
C. access time D. transfer time
Ans: C
44. (2FAOC)16 is equivalent to _____.
A. (195 084)10 B. (001011111010 0000 1100)2
C. Both A.and (B) D. None of these
Ans: B
45. The circuit used to store one bit of data is known as_______.
A. Register B. Encoder
C. Decoder D. Flip Flop
Ans: D
46. Computers use addressing mode techniques for ____________.
A. giving programming versatility to the user by providing facilities as pointers to memory counters for loop
control
B. to reduce no. of bits in the field of instruction
C. specifying rules for modifying or interpreting address field of the instruction
D. All the above
Ans: D
47. What characteristic of RAM memory makes it not suitable for permanent storage?
A. too slow B. unreliable
C. it is volatile D. too bulky
Ans: C
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48. The amount of time required to read a block of data from a disk into memory is composed of seek
time, rotational latency, and transfer time. Rotational latency refers to ______.
A. the time its takes for the platter to make a full rotation
B. the time it takes for the read-write head to move into position over the appropriate track
C. the time it takes for the platter to rotate the correct sector under the head
D. none of the above
Ans: A
49. In computers, subtraction is generally carried out by ______.
A. 9’s complement B. 10’s complement
C. 1’s complement D. 2’s complement
Ans: D
50. Assembly language ________.
A. uses alphabetic codes in place of binary numbers used in machine language
B. is the easiest language to write programs
C. need not be translated into machine language
D. None of these
Ans: A
51. Suppose that a bus has 16 data lines and requires 4 cycles of 250 nsecs each to transfer data. The
bandwidth of this bus would be 2 Megabytes/sec. If the cycle time of the bus was reduced to 125 nsecs and
the number of cycles required for transfer stayed the same what would the bandwidth of the bus?
A. 1 Megabyte/sec B. 4 Megabytes/sec
C. 8 Megabytes/sec D. 2 Megabytes/sec
Ans: D
52. Floating point representation is used to store ______.
A. Boolean values B. whole numbers
C. real integers D. integers
Ans: C
53. SIMD represents an organization that ______________.
A. refers to a computer system capable of processing several programs at the same time.
B. represents organization of single computer containing a control unit, processor unit and a memory unit.
C. includes many processing units under the supervision of a common control unit
D. none of the above.
Ans: C
54. In Reverse Polish notation, expression A*B+C*D is written as
A. AB*CD*+ B. A*BCD*+
C. AB*CD+* D. A*B*CD+
Ans: A

Posted 15th February 2013 by MCQ Help

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