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    Experiment No. 6: Aim: Write VHDL Code For 2:4 Decoder Using If Statement. Software:Xilinx ISE 14.7 Theory

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    Jaspreet Kaur
    The document describes writing VHDL code for a 2:4 decoder circuit. The decoder has 2 input lines and 4 output lines. The boolean functions for the outputs are defined in the truth table. The circuit diagram and VHDL code using if statements are provided to decode the inputs and activate one of the 4 outputs. The code was tested and the 2:4 decoder was successfully designed using if-else statements.

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    Experiment No. 6: Aim: Write VHDL Code For 2:4 Decoder Using If Statement. Software:Xilinx ISE 14.7 Theory

    Uploaded by

    Jaspreet Kaur
    46 views3 pages
    The document describes writing VHDL code for a 2:4 decoder circuit. The decoder has 2 input lines and 4 output lines. The boolean functions for the outputs are defined in the truth table. The circuit diagram and VHDL code using if statements are provided to decode the inputs and activate one of the 4 outputs. The code was tested and the 2:4 decoder was successfully designed using if-else statements.

    Original Description:

    Ripple adder in vhdl

    Original Title

    6jeet

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    The document describes writing VHDL code for a 2:4 decoder circuit. The decoder has 2 input lines and 4 output lines. The boolean functions for the outputs are defined in the truth table. The circuit diagram and VHDL code using if statements are provided to decode the inputs and activate one of the 4 outputs. The code was tested and the 2:4 decoder was successfully designed using if-else statements.

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    © All Rights Reserved
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    Download as docx, pdf, or txt
    46 views3 pages

    Experiment No. 6: Aim: Write VHDL Code For 2:4 Decoder Using If Statement. Software:Xilinx ISE 14.7 Theory

    Uploaded by

    Jaspreet Kaur
    The document describes writing VHDL code for a 2:4 decoder circuit. The decoder has 2 input lines and 4 output lines. The boolean functions for the outputs are defined in the truth table. The circuit diagram and VHDL code using if statements are provided to decode the inputs and activate one of the 4 outputs. The code was tested and the 2:4 decoder was successfully designed using if-else statements.

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    © All Rights Reserved
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    DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING

    EXPERIMENT No. 6

    Aim: Write VHDL code for 2:4 decoder using if statement.

    Software:Xilinx ISE 14.7.

    Theory:
    Decoder is a combinational circuit that has ‘n’ input lines and maximum of 2 n output lines. One of these outputs
    will be active High based on the combination of inputs present, when the decoder is enabled. That means decoder
    detects a particular code. The outputs of the decoder are nothing but the min terms of ‘n’ input
    variables lineslines, when it is enabled.

    Boolean functions for each output as


    D3=A.B,D2=A.B′,D1=A′.B,D0=A′.B′
    Truth Table:
    A B D3 D2 D1 D0

    0 0 0 0 0 1

    0 1 0 0 1 0

    1 0 0 1 0 0

    1 1 1 0 0 0

    Symbol:

    Manjeet Singh
    16BEC1046
    DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
    Circuit Diagram:

    VHDL Code:

    entity decoder2_4_16bec1046 is
    Port ( a : in STD_LOGIC_VECTOR (1 downto 0);
    c : out STD_LOGIC_VECTOR (3 downto 0));
    end decoder1;
    architecture Behavioral of decoder2_4_16bec1046 is
    begin
    process (a)
    begin
    if (a="00") then
    c <= "0001";
    elsif (a="01") then
    c <= "0010";
    elsif (a="10") then
    c <= "0100";
    else
    c <= "1000";
    end if;
    end process;
    end Behavioral;

    Manjeet Singh
    16BEC1046
    DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
    Output

    Result: The 2:4 decoder was designed using if-else, select and case statement.

    Manjeet Singh
    16BEC1046

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