VPMP Polytechnic, Gandhinagar: Department of Computer Engineering
VPMP Polytechnic, Gandhinagar: Department of Computer Engineering
VPMP Polytechnic, Gandhinagar: Department of Computer Engineering
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VPMP POLYTECHNIC,GANDHINAGAR
DEPARTMENT OF COMPUTER ENGINEERING
MCQ QUESTION BANK
(SUBJECT:COA SEMESTER:4TH)
UNIT:1
3. The register which contains the data to be written into or read out of the
addressed location is called
Memory address register
Memory data register
Program counter
Index register
5. Which of the following is used as storage locations both in the ALU and the
control section of a computer ?
Accumulator
Register
Adder
Decoder
Counter
Flip flop
Shift register
Push down stack
7. The main advantage of multiple bus organization over a single bus is _____
a) Reduction in the number of cycles for execution
b) Increase in size of the registers
c) Better Connectivity
d) None of the mentioned
12. When Performing a looping operation, the instruction gets stored in the
______
Registers
Cache
System Heap
System stack
13. In a normal n-bit adder, to find out if an overflow has occurred we make use
of ________
And gate
Nand gate
Nor gate
Xor gate
14. The return address from the interrupt-service routine is stored on the
___________
System heap
Processor register
Processor stack
Memory
15. In multiple Bus organisation, the registers are collectively placed and referred
as ______
Set registers
Register file
Register Block
Map registers
16. The instructions like MOV or ADD are called as:
OP-Code
Commands
Operators
None of the above
19. Data transfer between the main memory and the CPU register takes place
through two registers namely :
MAR and Accumulator
general purpose register and MDR
accumulator and program counter
MAR and MDR
20. In case of, Zero-address instruction method the operands are stored in ____.
Registers
Accumulators
Push down stack
Cache
28.The processor keeps track of the results of its operations using flags called
________
Conditional code flags
Test output flags
Type flags
None of the mentioned
36.To reduce the memory access time we generally make use of ______
Heaps
Higher capacity RAM’s
SDRAM’s
Cache’s
37. During the execution of the instructions, a copy of the instructions is placed in
the ______
Register
RAM
System heap
Cache
41. The memory transfers between two variable speed devices are always done at
the speed of the faster device.
a) True
b) False
47.The method of accessing the I/O devices by repeatedly checking the status
flags is
Program-controlled I/O
Memory-mapped I/O
I/O mapped
None
48.The method of synchronising the processor with the I/O device in which the
device sends a signal when it is ready is?
Exceptions
Signal handling
Interrupts
DMA
50.The I/O interface required to connect the I/O device to the bus consists of
______
Address decoder and registers
Control circuits
Address decoder, registers and Control circuits
Only Control circuits
51.SCSI stands for ___________
Signal Computer System Interface
Small Computer System Interface
Small Coding System Interface
Signal Coding System Interface