Unit 2 PDF

Digital Components Unit 2
UNIT 2: DIGITAL COMPONENTS

UNIT STRUCTURE
2.1 Learning Objectives
2.2 Introduction
2.3 Combinational Circuits
2.3.1 Half-Adder
2.3.2 Full-Adder
2.3.3 Half-Subtractor
2.3.4 Full-Subtractor
2.3.5 Multiplexer
2.3.6 Demultiplexer
2.3.7 Encoder
2.3.8 Decoder
2.3.9 Magnitude Comparator
2.4 Sequential Circuits
2.5 Flip-Flops
2.5.1 RS Flip-Flop
2.5.2 D Flip-Flop
2.5.3 JK Flip-Flop
2.5.4 MS Flip-Flop
2.6 Counters
2.6.1 Asynchronous Counter
2.6.2 Synchronous Counter
2.7 Register
2.7.1 Serial In – Serial Out Register
2.7.2 Serial In – Parallel Out Register
2.7.3 Parallel In- Serial Out Register
2.7.4 Parallel In- Parallel Out Register
2.8 Let Us Sum Up
2.9 Answers to Check Your Progress
2.10 Further Readings
2.11 Model Questions
Computer Organization 15
Unit 2 Digital Components
2.1 LEARNING OBJECTIVES
After going through this unit you will be able to:

• define combinational circuit and sequential circuit
• describe the working principle of Half-adder, Full-adder
• describe the working principle of Half-subtractor, Full-subtractor
• describe the working principle of Multiplexer, Demultiplexer
• describe the working principle of Encoder, Decoder
• describe the working principle of Flip-Flop, Register, Counter
2.2 INTRODUCTION
In the previous unit, we have discussed about the basic organization

of the computer. In this unit, we will discuss the various combinational and
sequential circuits to build your understanding on different digital components
that are used in digital applications. A sound knowledge on these components
will make you feel confident to understand the working principle of many
digital devices in general and the computer system in particular.
Combinational circuits, sequential circuits along with counters and registers
are covered in detail in this unit. In this next unit, we will explore different
data representation systems.
2.3 COMBINATIONAL CIRCUITS
To obtain a desired output according to a Boolean equation, various

logic gates are often interconnected. These circuits are called combinational
circuits. These are the combinations of different fundamental logic gates
and hence the name Combinational Circuit. Its main characteristic is that
the output is solely determined by the present inputs.
Inputs to a combinational circuit are given as either 0 or 1 and outputs
are also available as either 0 or 1. In the process of designing a combinational
circuit, first, a truth table is formed for the Boolean expression, that describes
the combinational circuit. Next, the function is simplified and then the
simplified function is implemented with gates to obtain the logic diagram of
the combinational circuit. We may also obtain the Boolean expression from
this logic diagram after determining the truth table.
16 Computer Organization
2.3.1 Half-Adder
Half-adder is a circuit that can add two binary bits. Its outputs are
SUM and CARRY. The following truth table shows the various combinations
of inputs and the corresponding outputs of a half-adder. X & Y denote inputs
and C & S denotes the two outputs CARRY & SUM.
Table 2.1: Truth Table for a Half-Adder
The minterms for Sum and CARRY are shown in the bracket. The
Sum-Of-Product equation for SUM is :
S = X Y + XY …………… (1)
= X ⊕ Y
Similarly, the SOP equation for the CARRY is:
C = XY ……………………….(2)
Combining the logic circuits for equation ( 1 ) & ( 2 ) we

get the circuit for Half-Adder as :
Figure 2.1: Half-Adder Circuit and Symbol
2.3.2 Full-Adder
Full-Adder is a logic circuit to add three binary bits. Its outputs are SUM
/ /
and CARRY. In the following truth table X,Y,Z are inputs and C and S
are CARRY & SUM.
Table 2.2: Truth Table for Full- Adder
X Y Z CARRY (Ć ) SUM (Ś)
0 0 0 0 0
0 0 1 0 1 ( X Y Z)
0 1 0 0 1 (X YZ )
0 1 1 1 ( X YZ ) 0
1 0 0 0 1 ( XY Z )
1 0 1 1 ( XY Z ) 0
1 1 0 1 (XY Z ) 0
1 1 1 1 (XYZ) 1 ( XYZ)
The minterms are written in the brackets for each 1 output in

the truth table. From these, the SOP equation for full summation can
be written as:
Ś = X Y Z + X Y Z + XY Z + XYZ
= X ( Y Z + Y Z ) + X ( Y Z + YZ )
= X S + XS ……………………. ( 3 )
Here, S is SUM of Half-Adder.

Again, SOP equation for/ Full–Adder CARRY is :
Ć = X YZ + XY Z + XY Z + XYZ
= X YZ + XYZ + X Y Z + XY Z
= ( X + X )YZ + X( Y Z + Y Z )
= YZ + XS
= C + XS …………………. ( 4 )
Here also, C means CARRY of half-adder and S means SUM

of half-adder.
Now, using two half-adder circuits and one OR gate we can

implement equation ( 3) and ( 4 ) to obtain a full-adder circuit as
follows.
C
C
X
Y
S
(a)
(b) (c)
Figure 2.2: Full-Adder Circuit
(a) logic diagram, (b) block diagram (c) Symbol
2.3.3 Half - Subtractor
A half-subtractor subtracts one bit from another bit. It has two outputs,
DIFFERENCE ( D) and BORROW ( B ).
Table 2.3: Truth Table for Half-Subtractor
X Y BORROW( B ) DIFFERENCE (D)

0 0 0 0
0 1 1 (XY ) 1 ( X Y)
1 0 0 1 ( XY)
1 1 0 0
The mean terms are written within parenthesis for output 1 in
each column. The SOP equations are :
D = XY + XY = X ⊕ Y
= S …………………….. ( 5 )
B = XY …………………….. ( 6 )
Figure 2.3: The Half-Subtractor circuit and symbol
2.3.4 Full-Subtractor
A full-subtractor circuit finds the Difference and Borrow on the

subtraction operation involving three binary bits.
Table 2.4: Truth Table of Full-Subtractor
The SOP equation for the DIFFERENCE is :
D´ = X YZ + XYZ + XY Z + XYZ
= XYZ + XY Z + XYZ + X YZ
= (X Y + XY ) Z + ( XY + X Y ) Z
= D Z + DZ …………………… ( 7 )
And SOP equation for BORROW is :
B´ = X YZ + XYZ + X YZ + XYZ
= X YZ + XYZ + XYZ + X YZ
= ( XY + XY ) Z + XY( Z + Z )
= DZ + XY …………………….. ( 8 )

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Digital Components Unit 2

UNIT 2: DIGITAL COMPONENTS

2.1 LEARNING OBJECTIVES

After going through this unit you will be able to:

In the previous unit, we have discussed about the basic organization

2.3 COMBINATIONAL CIRCUITS

To obtain a desired output according to a Boolean equation, various

Table 2.1: Truth Table for a Half-Adder

Combining the logic circuits for equation ( 1 ) & ( 2 ) we

Figure 2.1: Half-Adder Circuit and Symbol

The minterms are written in the brackets for each 1 output in

Here, S is SUM of Half-Adder.

Here also, C means CARRY of half-adder and S means SUM

Now, using two half-adder circuits and one OR gate we can

2.3.3 Half - Subtractor

X Y BORROW( B ) DIFFERENCE (D)

Figure 2.3: The Half-Subtractor circuit and symbol

A full-subtractor circuit finds the Difference and Borrow on the

Table 2.4: Truth Table of Full-Subtractor

The SOP equation for the DIFFERENCE is :

And SOP equation for BORROW is :

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