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Published in IET Power Electronics

Received on 4th August 2008
Revised on 12th November 2008
doi: 10.1049/iet-pel.2008.0253

ISSN 1755-4535

A DC –DC multilevel boost converter

J.C. Rosas-Caro1 J.M. Ramirez1 F.Z. Peng2 A. Valderrabano1
1
Cinvestav – Unidad Guadalajara, Av. Cientifica 1145, Colonia El Bajio, Zapopan, Jalisco 45015, Mexico
2
Michigan State University, East Lansing, MI, USA
E-mail: jramirez@gdl.cinvestav.mx

Abstract: A DC –DC converter topology is proposed. The DC – DC multilevel boost converter (MBC) is a pulse-width
modulation (PWM)-based DC – DC converter, which combines the boost converter and the switched capacitor
function to provide different output voltages and a self-balanced voltage using only one driven switch, one
inductor, 2N 2 1 diodes and 2N 2 1 capacitors for an Nx MBC. It is proposed to be used as DC link in
applications where several controlled voltage levels are required with self-balancing and unidirectional current
flow, such as photovoltaic (PV) or fuel cell generation systems with multilevel inverters; each device blocks
only one voltage level, achieving high-voltage converters with low-voltage devices. The major advantages of
this topology are: a continuous input current, a large conversion ratio without extreme duty cycle and without
transformer, which allow high switching frequency. It can be built in a modular way and more levels can be
added without modifying the main circuit. The proposed converter is simulated and prototyped; experimental
results prove the proposition’s principle.

1 Introduction into the grid. For telecom standard equipment for providing
internet services, the 48 V of the DC battery plant has to be
The transmission and distribution power systems have the boosted to a 380-V intermediate DC bus [3]. The high-
natural trend to increase the voltage rating which increase intensity discharge (HID) lamps for automobile head lamps
the efficiency, whereas microelectronics and digital systems during their start-up require the voltage increment from the
have the natural trend to decrease the voltage rating to battery’s 12 V to more than 100 V at 35 W [3].
reduce size, increase the efficiency and the speed of digital
systems. Such scenario represents interesting challenges in A transformer with a large voltage gain is undesirable because
buck-based power supply developments because of the it enhances the transformer non-idealities [4]. To reduce the
extremely low-voltage gain; the conventional buck converter DC–DC converters’ size, the use of high switching frequency
sacrifice the switching frequency and the system size results in small inductors and capacitors with an equivalent
because of the extremely low duty cycle or the transformer current and voltage ripple [1–4]. This is the motivation to
requirement [1 – 3]. A good example of this is the use several hundreds of kilohertz [1]. The natural switching
computers’ power supply where a microprocessor needs to delays in actual switches limit the switching frequency when
be fed with less than 3 V DC and the power supply is fed the duty ratio is too small; a solution to this is the
with 110 V/220 V AC. employment of transformers to reduce the voltage without
using small duty ratios. However, the transformer’s losses
On the other hand, for the boost converter supplies limit the switching frequency also; along with the
analogue challenges are emerging. There are applications development of high-speed MOSFETs the switching
where high voltage and low current are needed such as frequency limitation becomes a transformer’s issue [1–4].
TVCRTs, lasers, X-ray systems, ion pumps and electrostatic
systems [4]. Likewise, applications in renewable energy In the buck-type power supply, several topologies have
generation systems where the low voltage of a photovoltaic been proposed to avoid the above-mentioned limitations
(PV) panel or a fuel cell necessitates being boosted in order [1 – 3], achieving extremely low-voltage gains without
to feed a grid connected inverter that can push the power extremely low duty cycles.

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Figure 1 Conventional DC – DC converters

a Buck followed by a push – pull voltage multiplier
b QBC
c Switched capacitor converter with a boost stage

For the boost-type converters, there are several topologies they require high-voltage devices; this limitation leads to a
for implementing a high-efficiency transformer-less converter novel solution in the DC– AC conversion with multilevel
with high boost ratios (all of them with relatively high inverters [7, 8], where high-voltage converters can be built
complexity, compared with the conventional single switch with low-voltage rating devices, because of each device only
converter). For instance, (i) Fig. 1a illustrates a DC – DC blocks one voltage level. Multilevel converters have been
high-voltage converter with a buck converter followed by a studied in DC – DC applications with the topologies: diode
push – pull voltage multiplier. It may be extended to high- clamped, capacitor clamped and cascaded cells [9], and it
voltage applications with low-voltage devices by adding has been shown that, excluding the diode clamped
capacitors and diodes, without modifying the power stage. topology, they are suitable for such purposes. (ii) The
However, it requires two stages including three switches second big limitation is that they cannot provide a voltage
and a complex control system; the input current is balancing for the DC link in the DCMLC; the use of an
discontinuous [4]. (ii) Fig. 1b shows the cascade boost, also external balancing circuit is necessary [6].
named quadratic boost converter (QBC). It may be
extended to attain a higher boost ratio using only one The utilisation of combined boost converters with
switch. The input current is continuous. However, the switched capacitors has been studied in [5, 10]. However,
switch is rated to the total output voltage, which avoids the the output voltage is limited by the voltage rating devices.
use of high voltage. It requires several inductors, which is A topology that can be extended to high voltage is
the bulkiest part and it is hard to encapsulate. Furthermore, presented in [4]; the disadvantage is that the output voltage
novel topologies have been recently proposed to overcome is negative with respect to the input.
the mentioned challenge; for example, (iii) in [5] (see
Fig. 1c), a converter is proposed based on the switched
capacitor, which charge N capacitors to the input voltage, With the growing of distributed generation based on PV
and connect them in series to feed a boost stage. The systems, and the advent of new sources of distributed
switched capacitor stage can operate with high efficiency generation DC based such as fuel cells, DC–DC converters
since it does not regulate the output voltage, which is with high-voltage boost ratios are desirable to use those
regulated with the boost stage. However, it requires a high renewable sources in order to feed multilevel inverters and
number of switches and the output switch is rated to the push the power into the utility for some hundreds of volts.
output voltage. All these topologies and others [1– 3, 5]
achieve high-voltage gain without an extremely high duty This paper proposes a novel DC – DC converter topology,
ratio and transformer-less, except (i), Fig. 1a, which uses a initially introduced in [11]. The DC – DC multilevel boost
transformer. converter (MBC) is a converter that combines the boost
converter and the switched capacitor function to provide an
The use of the diode clamped multilevel converters output of several capacitors in series with the same voltage
(DCMLC) for renewable energy micro generation brings and self-balanced voltage, which is important for some
the promise to build compact converters made with small applications such as feeding a diode clamped multilevel
power MOSFETS, with a minimum ESR connected inverter that cannot balance the voltage by itself. It can
transformer-less to the utility grid. There exists the control the voltage by pulse-width modulation (PWM) in
challenge to couple the low DC voltage from the renewable all the output levels with only one driven switch, one
energy source to the high DC-link voltage of the multilevel inductor, 2N 2 1 diodes and 2N 2 1 capacitors for an Nx
converter. The DCMLC needs external balance of the DC MBC, The number of levels can be increased by adding
link for proper operation [6]. The former topologies have capacitors and diodes, then it is possible to achieve modular
limitations for this purposes: (i) For high-voltage applications, implementations.

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It is proposed to be used as DC link in applications where The lowest part of the converter, Fig. 3, is the conventional
several controlled voltage levels are wanted with self- DC – DC boost converter. Thus, the voltage gain holds by
balancing and unidirectional current flow, such as PV or the well-known boost converter equations. The difference
fuel cell generation systems with multilevel inverters. The between the MBC and the conventional one is that in the
major advantages of this topology are: (i) continuous input MBC, the output is Vc times N, where N þ 1 is the
current and (ii) a large conversion ratio with low duty cycle converter’s number of levels taking into account the zero
and without a transformer. It can be built in a modular way level, Fig. 2. This behaviour is achieved, thanks to the
and more levels can be added without changing the main voltage multiplier in the boost converter’s output that is
circuit; it provides several self-balanced voltage levels and driven by the only switch in the converter.
only one switch is necessary. The converter’s principle is
proven by simulation and experimental results. During the switch-on state, the inductor is connected to
Vin voltage, Fig. 3a. If C6’s voltage is smaller than C7’s
voltage then C7 clamps C6’s voltage through D6 and the
2 DC–DC multilevel boost switch S, Fig. 3b. Simultaneously, if the voltage across
converter C4 þ C6 is smaller than the voltage across C5 þ C7 , then C5
Fig. 2 depicts the proposed topology. It is a Nx DC – DC and C7 clamp the voltage across C4 and C6 through D4 and
converter based on one driven switch, 2N 2 1 diodes and S, Fig. 3c. In a similar way, C3 , C5 and C7 clamp the
2N 2 1 capacitors. One advantage of the topology is that voltage across C2 , C4 and C6 , Fig. 3d.
the number of levels can be extended by only adding
capacitors and diodes and the main circuit does not need to When the switch turns off, the inductor current closes D7 ,
be modified. and switches all diodes. During the switch-off state, the
inductor current closes D7 charging C7 , Fig. 4a. When D7
closes, C6 and the voltage in Vin plus the inductor’s voltage
clamp the voltage across C5 and C7 through D5 , Fig. 4b.
Similarly, the voltage across the inductor plus Vin , C4 and
C6 clamp the voltage across C3 , C5 and C7 through D3 .
Finally, the voltage across C1 , C3 , C5 and C7 is clamped by
C2 , C4 , C6 , Vin and the inductor’s voltage, Fig. 4c.

It is noteworthy that D1 , D3 , D5 and D7 switch in a

synchronously way, complemented with D2 , D4 , D6 and S,
Figs. 3 and 4.

3 Effect of the equivalent series

resistance (ESR) (ResrL) on the
boost ratio
Similarly to the conventional boost converter, and all
Figure 2 DC – DC MBC for Nx or N þ 1 levels converters with boost capability, the ideal maximum boost

Figure 3 Switch-on state

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Figure 4 Switch-off state

ratio is infinite. In actual applications, it is limited by From (4) it can be noticed that the input current can be
the parasitic resistance in the passive components; in the controlled with D in the PWM, which is important in
boost converter case the main limitation is given by the some applications such as renewable energy-based
ESR in the input inductor. This effect is caused by the fact distributed generation systems, where is highly desirable to
that the input current is the output current times the track the maximum power point by controlling the input
boost ratio. current.

It is important to emphasise that the use of high switching The following expressions can be derived from the first
frequency allows using a smaller input inductance with a level: (1) and (2) just like the conventional boost converter.
smaller ESR. This limitation, which appears in all Taking into account the relationship between the capacitors
converters with an input inductor, is also reduced in a voltage against the output voltage and (4), (5) can be
converter designed to work with a high switching frequency. derived by the following procedure in which the inductors
power losses are considered.
As aforesaid, the first level is a usual boost converter which
equations and behaviour are well known, but the total output The average voltage in the inductor VL is zero at steady
voltage is N times VC . Equations (1) and (2) express the boost state, and is equal to the voltage in both switching states
ratio and the inductor current in the boost converter, Fig. 2 times the time that each switching state holds. In the
continuous mode, including the inductor’s ESR (ResrL)
VC 1
¼ (1)
Vin 1  D VL ¼ D(Vin  IL ResrL ) þ (1  D)(Vin  VC  IL ResrL ) ¼ 0
VC DVin  DIL ResrL þ (1  D)Vin  (1  D)VC
IL ¼ (2)
(1  D)RO  (1  D)IL ResrL ¼ 0
Vin (D þ 1  D) þ IL ResrL (D  1 þ D) ¼ (1  D)VC
being RO the load resistance, considering the ideal 1x or Vin ¼ (1  D)VC þ IL ResrL
conventional boost converter.
Vout NVout
Vin ¼ (1  D) þ R
Thus, the new voltage gain can be expressed by N (1  D)RO esrL
(5)
VC 1 Vout N
¼ then ¼ (3)
Vin 1  D Vin 1D
From (5), the boost ratio for the novel topology may be
The input DC current can be expressed in terms of the expressed as (6)
output current and input – output voltage by
Vin 1
2
¼ (6)
V NVC N VC2 Vout ((1  D)=N ) þ (NResrL =(1  D)RO )
Vin IL ¼ Vout Iout ¼ Vout out ¼ NVC ¼
RO RO RO
It is noteworthy that (6) is actually a general expression that
V N 2 VC N 2 VC includes the conventional boost converter if N ¼ 1. In the
IL ¼ C ¼ (4)
Vin RO (1  D)RO ideal model, when ResrL ¼ 0 the infinite boost ratio results.

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Figure 5 Voltage gain against duty cycle for different values of ESR/RO in the novel MBC (N ¼ 4)

Fig. 5 exhibits the case when N ¼ 4 for different cases of that the actual voltage across C6 becomes
ResrL/RO . The boost ratio is plotted against the duty cycle.
It can be noticed that the graphic shows a quasi-linear
region larger than the traditional boost converter, which VC6 ¼ VC7  Vswitch  VDiode
(7)
becomes highly non-linear when the duty cycle is near VC6 ¼ VC7  2Vd
1. Thus, the MBC can operate in the high boost ratio
region, this region is around D ¼ 0.5 which is the best
point to operate the multilevel strategy. Observe that

Likewise, the maximum boost ratio is farther than D ¼ 1, VC5 ¼ VC7  4Vd (8)
which is an operative point difficult to implement with non-
ideal switches.
It is worth noting that the current charging C5 does not go
4 Switches’ and diode’s voltage across D7 , it actually goes across the input inductor and the
input voltage source, but D7 is closed during D5 is closed
drop as it is above mentioned, then the voltage across C5 can be
In actual implementations the switches’ and diodes’ voltage expressed as (8). In Fig. 7, it can be seen that the voltage
drop must be taken into account since it avoids capacitors across C7 and C5 clamps the voltage across C6 and C4 with
to be charged to VC (the voltage in the lower capacitor); two diodes voltage drop. The voltage drop in the voltage
this effect is studied in the present section. multiplier does not depend on the level after the second
level, and all capacitors after the second level are charged to
The voltage drop in conventional IGBTs and power VC7 2 4Vd .
diodes can be around 2 V (in low power is much smaller),
and it can be ignored in medium- and high-voltage
applications with several hundred volts, but in low-voltage
applications must be considered. For simplicity, the voltage
drop in switches and diodes is assumed to be equal to Vd .
From the circuit in Figs. 3 and 4, in Fig. 6 can be noticed

Figure 6 Charging C6 with diode’s and switch’s voltage drop Figure 7 Charging C4 with diode’s and switch’s voltage drop

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The expression of the output voltage for the circuit in current in semiconductors is higher in the lower levels.
Figs. 3 and 4 can be obtained as (4x converter) This is a disadvantage for many of the DC – DC multilevel
converters. For instance, if a capacitor clamped multilevel
Vout ¼ 4VC7  12Vd (9) converter is used as a DC – DC converter the lower device
would dissipate more power than the higher one. By
Finally, the output voltage general expression in an Nx MBC utilising the medium source variation, this disadvantage can
is (10). This one must be considered to design a multilevel be reduced.
voltage multiplier
Fig. 8 displays the topology variation with the input source
Vout ¼ NVC  (N  1)4Vd (10) voltage at the medium position. Similarly to Fig. 2, the
topology can be easily extended to any number of levels by
where VC is the voltage of the lower capacitor, and follows the adding diodes and capacitors.
traditional boost converter equation. The efficiency of the
switched capacitor multiplier stage is given by (11) as in all It is noteworthy that the multilevel operation holds and the
step-up switched capacitor converters [12] capacitor’s voltage are balanced, regardless on the load and
configuration, non-medium, or a medium source. Thus, the
Vout NVC  (N  1)4Vd (N  1)4Vd DC – DC MBC is an important alternative to feed
h¼ ¼ ¼1 (11)
NVC NVC NVC multilevel inverters.

From (11) it can be seen that the converter is ideal for

application with several hundred volts where Vd is negligible 6 Design and discussion
compared with VC; the power losses in the switch can be The output voltage will have a small ripple which can be
calculated as in the traditional boost converter. It is important minimised to a desired value by selecting correct values for
to notice that the switching losses are proportional to the the capacitors, a design analysis is done with a 2x MBC,
voltage that the switch has to block which is reduced in this Figs. 9a and 9b show the possible switching states, Fig. 9c
topology compared with other solutions. shows a zoom in the voltage ripple of the capacitors V1 is
the voltage across c1 and so on, the duty cycle is 0.5,
starting the analysis when the switch is open c2 just
5 Central source transferred energy to c3 , and c1 has been charging during
A variation of the proposed topology is discussed in this the last half a cycle, c1 has a higher voltage than c2 , right
section. As a natural extension of the voltage multiplier the after the switch closes c1 charges c2 through d2 and they get
negative part of the output voltage can be added and then the same voltage expressed as
the converter shown in Fig. 8 can be realised. One of the
disadvantages of the proposed topology, Fig. 2, is that the V1bc c1 þ V2bc c2
V1ac ¼ V2ac ¼ (12)
c1 þ c2

Where V1ac is V1 after closing the switch, V1bc is V1 before

closing the switch and so on. After this happen c2 does not
transfer energy to the load and its voltage keeps constant
during all the next half a cycle, c1 and c3 get a voltage drop
because the are feeding the load, this voltage drop is Dv1 in
Fig. 9c and can be expressed as (assuming all capacitors
have the same capacitance)

1 1
Dv1 ¼ Dv12 ¼ I D ¼ I D (13)
c1 out t1 c2 out t1

During Dt1 , c1 and c3 in series feed the load, and c2 just store
charge to be transferred to c3 during Dt3 , the time when the
switch is open D t2 can be divided into two, Dt3 and Dt4 , right
after the switch opens c2 has a voltage higher than c3 and c2
discharges whereas c3 charges until they get the same
voltage, the voltage drop in c2 can be expressed as

1
Dv4 ¼ I D (14)
Figure 8 Topology variation with medium source c2 L t3

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Figure 9 2x MBC
a Switch-on state
b Switch-off state
c Voltage ripple in capacitors

And the ripple Dv2 in c3 can be expressed as Table 1 summarises a comparison between the proposed
topology (x ¼ 2), the QBC (Fig. 1c), and the switched
1 capacitor with the boost stage (SCBS) for n ¼ 2 (Fig. 1b).
Dv4 ¼ (I  Iout )Dt3 (15)
c2 L
Table 1 offers a general idea about the topological
comparison, although each converter presents advantages
After that, both capacitors in parallel fed the load in series for specific applications. Some comments about individual
with c1; it is important to note that during Dt2 c1 keeps characteristics are as follows. The SCBS has the advantage
charging with IL 2 Iout , this is clear considering the KCL that the switched capacitor stage only multiplies the voltage
in the reference node. Finally the voltage drop Dv3 in c2 that is regulated by the boost stage, which makes possible
and c3 can be expressed as for the switched capacitor stage to operate in high
efficiency but it is the more complex in terms of number of
    components and control. It has two control variables (x and
1 Iout 1 Iout
Dv3 ¼ Dt4 ¼ Dt4 (16) D). Additionally, it has the highest voltage gain when D
c2 2 c3 2
and x ¼ 0.5, which is the optimum point for working at
high frequency. One more advantage is that, similarly to all
And Dv5 can be expressed as switched capacitor converters, the switched capacitor stage
can be encapsulated in an IC creating a small design.
1 1
Dv5 ¼ (IL  Iout )Dt2 ¼ (IL  Iout )(Dt3 þ Dt4 ) (17) The QBC is the least complex in terms of number of
c1 c1
components, but it needs at least two inductors that are the
bulkiest components. The gain is highly non-linear, which
The output voltage is V1 plus V3 then the ripple in the output makes the controller design an important challenge. The 2x
voltage can be expressed as the ripple in c1 plus the ripple in MBC has the lower voltage gain, but it also has the lower
c3 , by using (12) – (17) the capacitors and switching frequency voltage stress in the switches and the voltage stress does
can be selected to fit the application and the input inductor not increase when more levels are added for increasing the
can be calculated as in the traditional boost converter to fit voltage gain. A major advantage of the converter arises
the desired input ripple current with the first level voltage. when feeding a DCMLC. It automatically balances the
This analysis can be extended to more levels. multilevel DC link. A disadvantage of such topology is that

Table 1 Comparison of topologies

Converter Inductors Capacitors Switches Diodes Voltage gain Switch stress

SCBS 1 3 4 5 (3 2 2xD)/(1 2 D) Vout
2
QBC 2 2 1 3 1/(1 2 D) Vout
2x MBC 1 3 1 3 2/(1 2 D) Vout/2

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the capacitors are used to transfer the energy in the voltage

multiplier while feeding the load according to (12) – (17).
This emphasises the traditional tradeoff between the output
voltage ripple and the size in the capacitor selection. Again,
for feeding a DCMLC the inverter control can alleviate
this fact by utilising the feed-forward control, which allows
having an AC output voltage free of distortion coming
from the voltage ripple in the DC link.

7 Experimental results
A low-power prototype is built to experimentally show the
operating principle of this novel converter. A Freescale 8-
Figure 12 Actual signals from the prototype
bit microcontroller is employed to provide the PWM signal
in an open-loop structure with a switching frequency of a Switch voltage
b Lower capacitor voltage
100 kHz, the duty cycle is 0.5 (measured in the IGBT c Input voltage
terminals), the input voltage is 50V and then the output
voltage is 300 V. Fig. 10 displays the prototype schematic
of a 3x (four levels) MBC. Fig. 11 exhibits the test bench.
The switch is the IGBT-12N60A4D and the fast recovery
diodes are BY229X-800. The inductor has a value of
1.33 mH, and all capacitors are 100 mF – 250 V (aluminium
electrolytic) in parallel with 2 mF – 250 V (polyester). The
inductor is added externally to the PBC prototype. Several
tests are carried out with resistive load. Figs. 12 depict
the resultant waveforms. The results are within the
expectations, with waveforms and values close to those

Figure 13 Efficiency against output power

estimated by equations and Fig. 13 shows the measured

efficiency against output power.

8 Conclusions
This paper proposes a DC – DC converter topology. The
DC – DC MBC is based on only one driven switch, one
inductor, 2N 2 1 diodes and 2 N 2 1 capacitors for an Nx
MBC. It is proposed to be used as DC link in applications
where several controlled voltage levels are needed with self-
balancing and unidirectional current flow, such as PV or
Figure 10 Prototype schematic: L ¼ 1.33 mH, C¼ 100 mF
fuel cell generation systems with multilevel inverters.

The main advantages of this topology are:

† A continuous input current.

† A big conversion ratio without extreme duty cycle.

† Transformer-less.

† Allow high switching frequency.

† It can be built in a modular way and more levels can be

Figure 11 3x MBC prototype added without changing the main circuit.

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† It provides several self-balanced voltage levels and only one [5] ABUTBUL O., GHERLITZ A., BERKOVICH Y., IOINOVICI A.: ‘Step-up
driven switch, which make it ideal for feeding a diode switching-mode converter with high voltage gain using a
clamped multilevel inverter. switched-capacitor circuit’, IEEE Trans. Circuits Syst. I:
Fundam. Theory Appl., 2003, 50, (8), pp. 1098– 1102
The proposed circuit is based on the multilevel converters’
principle, where each device blocks only one voltage level [6] YONETANI S. , KONDO Y., AKAGI H., FUJITA H.: ‘A 6.6-kV
achieving high-voltage converters with low-voltage devices. transformerless STATCOM based on a five-level diode-
The proposed converter is simulated and prototyped; clamped PWM converter: system design and
experimental results prove the proposition’s principle. experimentation of a 200-V 10-kVA laboratory model’,
IEEE Trans. Ind. Appl., 44, (2), pp. 672– 680
Future work will be done in the use of the MBC for
balancing the DC link in the diode clamped multilevel [7] RODRIGUEZ J., LAI J.-S., PENG F.Z. : ‘Multilevel inverters:
inverter, especially for distributed generation applications a survey of topologies, controls, and applications’, IEEE
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[8] LAI J.-S., PENG F.Z.: ‘Multilevel converters – a new breed

of power converters’, IEEE Trans. Ind. Appl., 1996, 32, (3),
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