MOSFET Small Signal Analysy and Biasing

MOSFET: SMALL-SIGNAL ANALYSIS
Once the Q-point is established and the small-signal parameters are determined, we can
find the small signal parameters of the amplifiers (see Fig. 1) in response to a small-signal
voltage vgs.
Figure 1. Small-signal vgs superimposed
For a small AC signal, the DC supply offers zero impedance; VDD and VGS can be short-
circuited. That is, one side of RD is connected to the ground. The small-signal AC equivalent
circuit of the amplifier is shown in Fig. 2a. Replacing the transistor by its transconductance
model, the small-signal AC equivalent circuit is shown in Fig. 2b.
a) AC circuit b) Small-signal equivalent circuit
c) Equivalent voltage amplifier d) Equivalent transconductance amplifier
Figure 2. Small-signal AC equivalent circuits of the amplifier in Fig.1

The following steps are involved in analyzing an amplifier circuit:
1. DC biasing analysis of the transistor circuit
2. Determination of the small-signal parameters gm and ro of the transistor
3. Determination of the AC equivalent circuit of the amplifier
4. Performing the small-signal analysis for finding Ri, Avo, and Ro
From Fig. 2b, the small-signal input resistance can be found from
(1)
Thevenin’s equivalent output resistance of the circuit, looking from the output side for the
condition vgs = 0, can be found from
(2)
The transconductance of the amplifier Gmo, which is the same as the transconductance of
the transistor, is
(3)
We can write the small-signal output voltage vo as
(4)
which gives the small-signal voltage gain Avo as
(5)
If we substitue ro = VM / ID, Eq. (5) becomes
(6)
Therefore, for obtaining a large voltage gain, the gmRD product must be made large and the
DC biasing drain current ID should be small. This will require both a large DC supply voltage
VDD and a large value of resistance RD. Figure 2[c and d] shows the equivalent voltage and
transconductance amplifiers of the circuit in Fig. 2a.
DC BIASING OF MOSFETS
It is necessary to bias a MOSFET at a stable operating point so that the biasing point does
not change significantly with changes in the transistor parameters. Once the gate-to-source
voltage vGS has been set at a specified value, the MOS drain current iD is then fixed. The
drain-to-source voltage vDS is dependent on iD. Table 1 shows the parameters if their values
are positive (+) or negative (-) quantities, and transfer characteristics for various types of
MOSFETs.
Table 1. Biasing conditions of MOSFETs
In the ohmic (or triode) region, iD = Kn[2(vGS - Vt )vDS - vDS2], where vDS < (vGS - Vt )
for n-channel and vDS > (vGS - Vt) for p-channel.
In the saturation region, iD = Kn(vGS - Vt )2, where vDS ≥ (vGS - Vt) for n-channel and
vDS ≤ (vGS - Vt ) for p-channel. Note: Vp ≈ Vt.
Since the input gate is isolated electrically from the drain or source terminals, the gate
voltage vG can be set to any specified desired value independently of iD, vDS and vSR. The
drain current depends on the gate-to-source voltage vGS, which is the difference between
the gate voltage vG and the source (or substrate) voltage vSR. That is, vGS = vG - vSR. We can
also write vGS = vG for vSR = 0, and vGS = - vSR for vG = 0. Therefore, we can bias a MOSFET at
a specific vGS by different biasing arrangements as shown in Fig. 3. Although there are many
types of biasing circuits, we will consider the following types, which are most commonly
used (see Fig.3):
• Zero source resistance biasing

• Grounded gate terminal biasing
• Source resistance only biasing
• Source and drain resistance biasing
a) vSR = 0 b) vG = 0 biasing c) vG - vSR biasing with d) vG - vSR biasing with
biasing RSR RSR and RD
Figure 3. Arrangements for vGS bias
NOTE: In the derivations of the drain currents for these biasing circuits, we will assume that
MOSFETs operate in the saturation region and follow the relationship between iD and vGS:
iD = Kn(vGS - Vt)2.
MOSFET Biasing Circuit
The most common biasing circuit, which can implement the four arrangements in Fig. 3 if
we select appropriate values of R1, R2, RD, RSR, VDD and VSS, is shown in Fig. 4a. The value of
vGS can be adjusted by using a potential divider consisting of R1 and R2 as given by
(7)
Using KVL in the gate-to-source loop, and the same drain current iD flows through the source
terminal, we get
(8)
which gives the biasing load line as given by
(9)
The intersection of the biasing load line described by Eq. (9) with the transfer characteristic
gives the operating point as shown in Fig. 4b. Figure 4b also describes the input-output
relationship. vGS relates to iD which in turn relates to vDS (output voltage) of the MOSFET.
a) Biasing circuit for n-channel MOSFET b) Biasing load line for n-channel MOSFET
Figure 4. Biasing circuits for MOSFETs
Design of MOSFET Biasing Circuit
Using KVL in the drain and the source loop in Fig. 4a, we can write
(10)
This gives the drain-to-source load line as
(11)
This is the equation of a straight line and represents the load line, as shown in Fig.5a. The
intersection of the drain-to-source load line described by Eq. 11 with the MOS characteristic
gives the operating point, defined by (VGS, VDS, ID).
a) Drain-to-source load line b) Effect of Q-point location
Figure 5. Drain-to-source load line and effects of operating point

The given design parameters are Kn, Vt, VM, and ID(max) of a MOSFET, along with VDD and VSS.
Select suitable values of the DC biasing drain current IDQ and the drain-to-source voltage VDS
so that iD and vDS can have the maximum swings in both positive and negative directions: iD
= ID ± id(peak) and vDS = VDS ± vds(peak). Otherwise, the small-signal output will be distorted as
shown in Fig. 5b. To minimize distortion, ID must therefore be less than ID(max)/2, and the DC
supply VDD should be shared equally by all elements in the drain and the source loop. The
guidelines for determining the biasing resistances in Fig. 4a for the different configurations
shown in Fig. 3 are given in Table 2.
Table 2. Guidelines for determining the biasing resistances

MOSFET Small Signal Analysy and Biasing

Uploaded by

Copyright:

Available Formats

MOSFET Small Signal Analysy and Biasing

Uploaded by

Document Information

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

MOSFET Small Signal Analysy and Biasing

Uploaded by

Copyright:

Available Formats

MOSFET: SMALL-SIGNAL ANALYSIS

Figure 1. Small-signal vgs superimposed

a) AC circuit b) Small-signal equivalent circuit

c) Equivalent voltage amplifier d) Equivalent transconductance amplifier

Figure 2. Small-signal AC equivalent circuits of the amplifier in Fig.1

which gives the small-signal voltage gain Avo as

If we substitue ro = VM / ID, Eq. (5) becomes

Table 1. Biasing conditions of MOSFETs

• Zero source resistance biasing

Figure 3. Arrangements for vGS bias

MOSFET Biasing Circuit

Figure 4. Biasing circuits for MOSFETs

Design of MOSFET Biasing Circuit

This gives the drain-to-source load line as

a) Drain-to-source load line b) Effect of Q-point location

Figure 5. Drain-to-source load line and effects of operating point

Table 2. Guidelines for determining the biasing resistances

You might also like