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To Design and Simulate Priority Encoder

The document describes simulating and designing a priority encoder using an online circuit simulator. A priority encoder encodes the position of the highest priority active input among multiple inputs. It was demonstrated for a 4-to-2 priority encoder and an 8-to-3 priority encoder. The truth tables and logic expressions are provided. The simulation outputs are shown and validate that the priority encoder works as intended by encoding the highest priority active input and indicating an invalid output when no inputs are active.

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Shubham Garg
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© © All Rights Reserved
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Download as DOCX, PDF, TXT or read online on Scribd
221 views

To Design and Simulate Priority Encoder

The document describes simulating and designing a priority encoder using an online circuit simulator. A priority encoder encodes the position of the highest priority active input among multiple inputs. It was demonstrated for a 4-to-2 priority encoder and an 8-to-3 priority encoder. The truth tables and logic expressions are provided. The simulation outputs are shown and validate that the priority encoder works as intended by encoding the highest priority active input and indicating an invalid output when no inputs are active.

Uploaded by

Shubham Garg
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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EXPERIMENT-10

AIM:
To simulate and design Priority Encoder.

PLATFORM/TOOLS USED: Circuitverse.org Simulator

THEORY:
A priority encoder provides n bits of binary coded output representing the
position of the highest order active input of 2n inputs. If two or more inputs are
high at the same time, the input having the highest priority will take precedence.
So, when an input with a higher priority is present, all other inputs with a lower
priority will be ignored.
A valid indicator, V, is included to indicate whether or not the output is valid.
Output is invalid when no inputs are active i.e. V = 0 and Output is valid when
at least one input is active i.e. V = 1.

Its applications include:

 It is used to control interrupt requests by acting on the highest priority


request.
 To encode the output of a flash analog to digital converter.

Figure 1: A 4:2 Priority Encoder.


WORKING:
4 to 2 Priority Encoder:

A 4 to 2 priority encoder has four inputs Y3, Y2, Y1 & Y0 and two outputs A1
& A0. Here, the input, Y3 has the highest priority, whereas the input, Y0 has the
lowest priority. In this case, even if more than one input is ‘1’ at the same time,
the output will be the binary code corresponding to the input, which is having
higher priority.

We considered one more output, V in order to know, whether the code


available at outputs is valid or not.

 If at least one input of the encoder is ‘1’, then the code available at
outputs is a valid one. In this case, the output, V will be equal to 1.
 If all the inputs of encoder are ‘0’, then the code available at outputs is
not a valid one. In this case, the output, V will be equal to 0.

The Truth table of 4 to 2 priority encoder is shown below.

TRUTH TABLE:

INPUTS OUTPUTS

Y3 Y2 Y1 Y0 A1 A0 V

0 0 0 0 0 0 0

0 0 0 1 0 0 1

0 0 1 X 0 1 1

0 1 X X 1 0 1

1 X X X 1 1 1

The simplified Boolean functions are:


A1=Y3+Y2

A0=Y3+Y2′Y1

Similarly, we will get the Boolean function of output, V as

V=Y3+Y2+Y1+Y0

We can implement the above Boolean functions using logic gates. The circuit
diagram of 4 to 2 priority encoder is shown in the following figure.

Figure 2: Circuit diagram for 4:2 Priority Encoder.

8 to 3 Priority Encoder:

Output Expression for 8:3 Priority Encoder:

A0 = E6’ (E4’E2’E1 + E4’E3 + E5) + E7)

A1 = E5’E4’ (E2 + E3) + E6 + E7

A2 = E4 + E5 + E6 + E7

V = E0 + E1 + E2 + E3 + E4 + E5 + E6 + E7
SIMULATED OUTPUT:

A 4 to 2 Priority Encoder:

Figure 3: Output is invalid when all inputs = 0 and V = 0.

Figure 4: Highest priority input is Y0 so output is 0 0 (i.e. 0 in decimal).

Figure 5: Highest priority input is Y2 so output is 1 0 (i.e. 2 in decimal).


An 8 to 3 Priority Encoder:

Figure 6: Output is invalid when all inputs = 0 and V = 0.

Figure 7: Highest priority input is E4 so output is 1 0 0 (i.e. 4 in decimal).


RESULT: The Priority Encoder was simulated and studied using online
simulator and verified using the waveforms.

Simulated Wave Outputs:

A 4 to 2 Priority Encoder:

Figure 8: As we can see as soon as all the inputs signal are 0, there is break in waveform
i.e. it shows high impedance.

An 8 to 3 Priority Encoder:

Figure 9: As we can see as soon as all the inputs signal are 0, there is break in waveform
i.e. it shows high impedance.

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