8086 Interrupts and Interrupt Responses
8086 Interrupts and Interrupt Responses
8086 Interrupts and Interrupt Responses
INTERRUPTS -8086
Contents
Sometimes it is necessary to have the computer automatically execute one of a collection of special routines
whenever certain conditions exist within a program or in the microcomputer system.
For example,, it is necessary that microcomputer system should give response to devices such as keyboard,
sensor and other components when they request for service.
The most common methods for servicing such device are
Polling Method
Interrupt method
Polling Method:
In this method the processor must test each device in sequence and in effect ‘ask’ each one if it needs
communication with the processor.
It easy to see that a large portion of the main program is looping through this continuous polling cycle.
Such a method would have a serious and decrementing effect on system throughput.
Interrupt Method:
Another method would be the one that allows the microprocessor to execute its main program and only stop
to service peripheral devices when it is told to do so by the device itself.
In this method the processor would provide an external asynchronous input that would inform the processor
that it should complete whatever instruction that currently being executed and fetch a new routine that will
service the requesting device.
Once this servicing is completed, the processor would resume exactly where it left off.
This method is called Interrupt Method.
This method increases the system throughput
When a microprocessor is interrupted, it stops executing its current program and calls special routine which
services the interrupt.
The event that causes the interruption is call interrupt and the special routine executed to service the
interrupt is called interrupt service routine (ISR) / Procedures.
The interrupt can came from any of the three sources
A condition interrupts or interrupts caused by special instructions are called software interrupts.
The interrupts which are having fixed address location for ISR are called vectored interrupts.
The interrupts which are not having fixed address location for ISR are called non vectored
interrupts.
The interrupts which cannot be ignored are called non maskable interrupts.
An 8086 interrupt can come from any one the three sources:
1. Exernal signal: An 8086 can get interrupt from an external signal applied to the nonmaskable interrut
(NMI) input pin, or the interrupt (INTR) input pin.
2. Special instruction: An execution of the Interrupt instruction (INT). This is referred as software
interrupt.
4. For example divide by zero: program execution will automatically be interrupted if you attempt to
divided an operand by zero.
At the end of each instruction cycle, 8086 checks to see if any interrupts have been requested.
If an interrupt has been requested, the 8086 responds to interrupt by stepping through the following series of
major steps:
1. It decrements the stack pointer by 2 pushes the flag register on the stack.
2. It disables the 8086 INTR interrupt input by clearing the interrupt flag(IF) in the flag register.
4. It decrements the stack pointer by 2 and pushes the current code segment register contents on the stack.
5. It decrements the stack pointer again by 2 and pushes the current instruction pointer contents on the
stack.
6. It does an indirect far jump to start of the procedure by loading the CS and IP values for the start of the
interrupt service routine.
The 8086 gets the new values of CS and IP register from four memory addresses.
When it responds to an interrupt, the 8086 goes to memory locations to get the CS an IP values to start of the
interrupt service routine.
In an 8086 system the first 1 Kb of memory from 00000H to 003FFH is reserved for storing the starting
addresses of interrupt service routines.
This block of memory is often called the INTERRUPT VECTOR TABLE or the INTERRUPT POINTER TABLE.
Since 4 bytes are required to store the CS and IP values for each interrupt service procedure, the table can
hold the starting addresses for 256 interrupt service routines.
The next 27 interrupt types, from 5 to 31, are reserved by Intel for use in future microprocessors.
The upper 224 interrupt types, from 32 to 255, available for user for hardware or software interrupts.
When 8086 responds to an interrupt, it automatically goes to specified location in the interrupt vector table to
get the starting address of interrupt service routine.
When the quotient from either a DIV or IDIV instruction is too large to fit in the result register; 8086 will
automatically execute type 0 interrupt.
The type 1 interrupt is single step trap. In the single step mode, system will execute one instruction and wait for
further direction from user. The user can examine the contents of registers and memory locations and if they are
correct, user can tell the system to execute the next instruction. This feature is useful for debugging assembly
language programs.
As the name suggests, this interrupt cannot be disabled by any software instruction. This interrupt is activated by
low to high transition on 8086 NMI input pin. In response, 8086 will do a type 2 interrupt.
The type 3 interrupt is used to implement breakpoint function in the system. The type 3 interrupt is produced by
execution of the INT 3 instruction. Breakpoint function is often used as debugging aids in cases where single
stepping provides more details than wanted.
The type 4 interrupt is used to check overflow condition after any signed arithmetic operation in the system. The
8086 overflow flag, OF, will be represented in the destination register or memory location.
The 8086 INT instruction can be used to cause 8086 to do one of the 256 possible interrupt types.
You can use an INT 2 instruction to send execution to NMI interrupt service routine.
This allows you to test the NMI routine without needing to apply an external signal to the NMI input of the
8086.
In IBM PC, part of the operating system is located in the permanent memory (ROM) and part is loaded during
power up.
The part located in ROM is referred to as ROM-BIOS (Basic Input/ Output System).
The other part which is loaded in RAM during power-up from hard disk is known as DOS(Disk Operating
System).
BIOS is located in a 8 Kbyte ROM at the top of memory, the address range being from FE000H to FFFFFH.
The programs with ROM-BIOS provide the most direct, lowest level interaction with the various devices in the
system.
4. Print screen
a. Asynchronous communication
b. Keyboard
c. Printer
d. Display
Most of these programs are accessible to ALP through software interrupt instruction (INT).
The design goal for the ROM-BIOS programs is to provide a device-independent interface to the various
physical devices in the system.
Using ROM-BIOS one can output characters to various physical devices like the printer or display, one can read
character from keyboard.
3. ROM-BIOS have no command-interpreter to allow copying files, print files, deleting files.
We expect to be able to look at the diskette directory to see what data files or programs the diskette contains.
We want to copy programs from one diskette to another, print programs and delete programs.
1. DOS is loaded from the bootable diskette. BIOS is located in an 8 Kbyte ROM.
DOS has ability to load and execute ROM-BIOS does not have ability to load and execute
3.
programs directly. programs directly.
DOS can store data on the diskette ROM-BIOS cannot store data on the diskette organized as a
4.
organized as a logical files. logical files.
DOS has command interpreter to allow us to ROM-BIOS have no command interpreter to allow us to
5.
copy files, print files and delete files. copy files, print files and delete files.
The MS-DOS API is an API which originated with 86-DOS and is used in MS-DOS/PC DOS and other DOS-
compatible operating systems. Most calls to the DOS API are invoked using software interrupt 21H (INT 21H).
By calling INT 21h with a sub function number in the AH processor register and other parameters in other
registers, one invokes various DOS services.
DOS services include keyboard input, video output, disk file access, executing programs, memory allocation,
and various other things.
07 Direct char read (STDIN), no echo 08 Char read from STDIN, no echo