Shark Bay:: For 1A Modify or Change
Shark Bay:: For 1A Modify or Change
Shark Bay:: For 1A Modify or Change
16
17
18
PCH (PCIE/USB/CLK)
PCH (DMI/FDI/PM )
PCH ( LPC/SPI/SMB/THERRMA )
76
77
78
GPU (4/5): GPIO/STRAP
GPU (5/5): PWR/GND
VRAM1 (1/4)
GPU:(G)
19
20
PCH ( RTC/AUDIO/SATA/JTAG )
PCH ( STRAPS)
79
80
VRAM1 (2/4)
VRAM1 (3/4)
Hynix RAM:(H)
21
22
PCH ( POWER1)
PCH ( POWER2 )
81
82
VRAM1 (4/4)
GPU PWR_NVVDD(NCP81172) Micron RAM:(M)
23
24
25
PCH(VSS)
SIO ITE8732F_CX
Flash (KBC+PCH)/ RTC
83
86
97
DISCRETE VGA POWER
Stand off&EMI Cap&DUMMY BOM
RESET Flow CHART
UMA: (U)
26
27
Scalar-RTD2486VRD
Audio Codec_ALC269
99
100
SYSTEM & GPU POWER SEQUENCE
POWER DELIVERY CHART
AMP:(A)
28
29
30
Audio_AMP
HDMI IN
LAN RTL8111GA
103
104
105
GPIO TABLE
CLOCK MAP
SMBUS table
SCALAR: (S)
31 RJ45+Transformer 106 POWER MAP
32 Card reader RTS5143
B
33
34
CARD Reader CONN
Rear USB/TOU/Dongle/Web Cam
Shark Bay : B
35
36
37
CHARGER
DCIN JACK
Processor : HASWELL(rPGA 946B/947 Socket)
38
39
Run Power & Sequence Chipset : LYNX POINT HM86
40
41
42
Scalar Power
GPU: nVIDIA N15P-GT-AIO-A1
43
44
BATT CONN
DC to DC_12V(NCP1589A)
LAN :RTL8111GA Giga lan
45
46
47
DC to DC_5V/3D3V(TPS51225)
Power/CPU Vcore1
Power/CPU Vcore_2
AUDIO :Realtek 269 VC
48
49
DC to DC_1D05V(RT8237)
DC to DC_1D35V/0D675V
SIO :ITE 8732F-CX
50
51
52
DC to DC_1D5V(51363/5930)
ADAPTER OCP / S3 reduction
USB2.0 Power SW
Card reader :RTS5170
USB 3.0 Port
Scalar :RTD2487HTD
A A
53 LCD/Inverter Connector
54 HDMI OUT <Core Design>
55
56 HDD/ODD Wistron Corporation
57 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
58 Mini PCIE Card WLAN and BT Title
59 Mini PCIE Card TV Tuner Cover Page
60 Mini PCIE Card Size
C
Document Number Rev
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 1 of 103
5 4 3 2 1
5 4 3 2 1
SYSTEM DC/DC
Florence Block Diagram (GPU) INPUTS
TPS51225
OUTPUTS
59
5V_AUX_S5
3D3V_AUX_S5
DDRIII 1333/1600 Channel A DDRIII DCBATOUT 5V_Charger
Slot 1 3D3V_A
1066/1333/1600 MT/s 16
VRAM-DDR3L
2GB CPU DC/DC
D 32,33,34,35 DDRIII 1333/1600 Channel B DDRIII Slot 2 ISL95812HRTZ 63~64 D
1066/1333/1600 MT/s 17
HDMI IN INPUTS OUTPUTS
Intel CPU DCBATOUT VCC_CORE
DDR3
900MHz Shark Bay Mobile HDMI OUT SYSTEM DC/DC
DDI DDIB
Haswell CPU RT8207LGQW 61
rPGA 946B/947 pin 49 INPUTS OUTPUTS
37.5mm*37.5mm DCBATOUT 1D05V_S0
PCIe x 16(Gen3_8Gb/s)
(Synergy) SYSTEM DC/DC
Nvidia N15P-GT TPS51363 62
10,11,12,13,14,15 INPUTS OUTPUTS
Scalar IC
eDP LVDS LCD DCBATOUT 1D5V_VGA_S0
41
27,28,29,30,31 CONN LDO
DMI2.0 x4 APL5930KAI 62
FDIx2
(FDI Port for legacy VGA 2.5GT/S INPUTS OUTPUTS
support on PCH) COMBO JACK 3D3V_S0 1D5V_S0
C C
SYSTEM DC/DC
TPS51116 60
SW Amp
39
INPUTS OUTPUTS
HP
USB3.0 charger CONNx 1 Intel DCBATOUT
1D35V_S3
USB3.0 CONNX1 45
USB3.0 X 2/USB2.0 X 2 Mic in 0D675V_S0
PCH
26
LYNX POINT(HM86) AZALIA
ALC269 VGA
FCBGA 695P NCP81172 65
20mm*20mm 38
Int Digital MIC IN INPUTS OUTPUTS
From Webcam DCBATOUT VGA_CORE
Web cam CONN55 USB2.0 X 1 USB2.0 X 8
USB 3.0(4/2) / USB 2.0(14)/1.1 ports
Real side USB ETHERNET (10/100/1000Mb) RJ45
USB2.0 X 3 Flash ROM SPI PCIE x 1 MDI x 1 TRANSFORMER MDI x 1 Switches 66
CONN X 3 55 High Definition Audio RTL8111GA CONN 37
8MB 19 SATA3.0 ports (2) 37 37
INPUTS OUTPUTS
3D3V_S0 3D3V_VGA_S0
RF CONN SATA2.0 ports (2)
B
1D05V_S0 1D05V_VGA_S0 B
PCIE x 1,USB x 1 26
PCIE ports (8/6) Mini-Card CONN 1D5V_S0 1D5V_VGA_S0
LPC I/F Wireless Lan+ Bluetooth
Touch CONN ACPI 1.1 PCB LAYER
19,20,21,22,23,24,25,26 PCIE x 1,USB x 1 TV Tuner CONN
L1:Top L5:VCC
L2:GND L6:Signal
L3:Signal L7:GND
mSATA CONN L4:Signal L8:Bottom
Card Reader CONN SATA 3.0 X 2/SATA 2.0 X 1
LPC Bus
(SATA3_6Gb/s)
ODD CONN
LPC debug port
56
A
SIO ITE8732 Temp Ctrl A
<Core Design>
www.vinafix.com
Title
SSID = CPU
P_CPU_VCCIOA
1
R699
24D9R2F-L-GP
2
D D
CPU1A 1 OF 9
HASWELL PEG_RCOMP
E23 CPU_PEG_COMP
PEG_RXN[0..15] 27
M29 PEG_RXN15
DMI_TX0_N D21 PEG_RXN_0 K28 PEG_RXN14
20 DMI_TX0_N DMI_RXN_0 PEG_RXN_1
DMI_TX1_N C21 M31 PEG_RXN13
20 DMI_TX1_N DMI_RXN_1 PEG_RXN_2
DMI_TX2_N B21 L30 PEG_RXN12
20 DMI_TX2_N DMI_RXN_2 PEG_RXN_3
DMI_TX3_N A21 M33 PEG_RXN11
20 DMI_TX3_N DMI_RXN_3 PEG_RXN_4 L32 PEG_RXN10
DMI_TX0_P D20 PEG_RXN_5 M35 PEG_RXN9
20 DMI_TX0_P DMI_RXP_0 PEG_RXN_6
DMI_TX1_P C20 L34 PEG_RXN8
20 DMI_TX1_P DMI_RXP_1 PEG_RXN_7
DMI_TX2_P B20 E29 PEG_RXN7
20 DMI_TX2_P DMI_RXP_2 PEG_RXN_8
DMI_TX3_P A20 D28 PEG_RXN6
20 DMI_TX3_P
DMI
DMI_RXP_3 PEG_RXN_9
PEG
E31 PEG_RXN5
DMI_RX0_N D18 PEG_RXN_10 D30 PEG_RXN4
20 DMI_RX0_N DMI_TXN_0 PEG_RXN_11
DMI_RX1_N C17 E35 PEG_RXN3
20 DMI_RX1_N DMI_TXN_1 PEG_RXN_12
DMI_RX2_N B17 D34 PEG_RXN2
20 DMI_RX2_N DMI_TXN_2 PEG_RXN_13
DMI_RX3_N A17 E33 PEG_RXN1
20 DMI_RX3_N DMI_TXN_3 PEG_RXN_14 E32 PEG_RXN0
DMI_RX0_P PEG_RXN_15 PEG_RXP15 PEG_RXP[0..15] 27
20 DMI_RX0_P D17 L29
DMI_RX1_P C18 DMI_TXP_0 PEG_RXP_0 L28 PEG_RXP14
20 DMI_RX1_P DMI_TXP_1 PEG_RXP_1
DMI_RX2_P B18 L31 PEG_RXP13
20 DMI_RX2_P DMI_TXP_2 PEG_RXP_2
DMI_RX3_P A18 K30 PEG_RXP12
C 20 DMI_RX3_P DMI_TXP_3 PEG_RXP_3 C
L33 PEG_RXP11
PEG_RXP_4 K32 PEG_RXP10
PEG_RXP_5 L35 PEG_RXP9
PEG_RXP_6 K34 PEG_RXP8
PEG_RXP_7 F29 PEG_RXP7
PCH_FDI_CSYNC H29 PEG_RXP_8 E28 PEG_RXP6
20 PCH_FDI_CSYNC
FDI
A A
HASWE-U1
(62.10040.981) Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU (DMI/PCIE)
Size Document Number Rev
B
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 3 of 103
5 4 3 2 1
5
SSID = CPU 4 3 2 1
D D
1D05V_S0 P_CPU_VCCIO P_1.05V_CPU_VCCST
1D35V_S3
1
1
DDR3 COMPENSATION SIGNALS
1
R709 R712 C5 C6 CPU1B 2 OF 9
62R2J-GP SCD1U16V2KX-3GP SC22U6D3V5MX-2GP R1420
1KR2J-1-GP
AP32 MISC
HASWELL AP3 SM_RCOMP_0 R711 1 2 100R2F-L1-GP-U 1KR2F-3-GP
2
SKTOCC# SM_RCOMP_0 AR3 SM_RCOMP_1 R714 1 2 75R2F-2-GP (R) R1422
2
2 SM_RCOMP_1
DDR3
AN32 AP2 SM_RCOMP_2 R707 1 2
THERMAL
R722 100R2F-L1-GP-U 1KR2F-3-GP
2
1 2 0R0402-PAD CPU_PECI AR27 CATERR# SM_RCOMP_2 AN3 CPU_DRAMRST_N R1421 1 2 0R0402-PAD CPU_DRAMRST_N_R 2 1
21,36 H_PECI PECI SM_DRAMRST# SM_DRAMRST# 52
P_1.05V_CPU_VCCST AK31
R708 1 2 56R2F-1-GP CPU_PROCHOT_N AM30 FC_AK31 AR29 XDP_PRDY_N XDP5
57,63 H_PROCHOT_N PROCHOT# PRDY#
CPU_THERMTRIP_N AM35 AT29 XDP_PREQ_N XDP3
21,30 CPU_THERMTRIP_N THERMTRIP# PREQ# AM34 XDP_TCK
TCK AN33 XDP_TMS XDP58
TMS AM33 XDP_TRST_N
JTAG
R720 1 2 0R0402-PAD CPU_PM_SYNC AT28 TRST# AM31 XDP_TDI_R XDP56
20 PCH_PM_SYNC
PWR
R723 1 2 0R0402-PAD CPU_PWRGOOD AL34 PM_SYNC TDI AL33 XDP_TDO_R XDP52
21 PCH_CPU_PWRGOOD PWRGOOD TDO
R713 1 2 10KR2F-2-GP VDDPWRGOOD AC10 AP33 XDP_DBRESET_N XDP48
AT26 SM_DRAMPWROK DBR#
52 VDDPWRGOOD PLTRSTIN#
21 PCH_CPU_PLTRST_N R721 1 2 0R0402-PAD CPU_PLTRST_N AR30 XDP_BPM0_R XDP21
BPM_N_0 AN31 XDP_BPM1_R XDP23
CK_DP_NONSSC_N G28 BPM_N_1 AN29 XDP_BPM2_R TP1
C 22 CK_DP_NONSSC_N DPLL_REF_CLKN BPM_N_2 C
CLOCK
CK_DP_NONSSC_P H28 AP31 XDP_BPM3_R TP2
22 CK_DP_NONSSC_P DPLL_REF_CLKP BPM_N_3
CK_DP_SSC_N F27 AP30 XDP_BPM4_R TP3
22 CK_DP_SSC_N SSC_DPLL_REF_CLKN BPM_N_4
CK_DP_SSC_P E27 AN28 XDP_BPM5_R TP4
22 CK_DP_SSC_P SSC_DPLL_REF_CLKP BPM_N_5
CK_OUT_DMI_N D26 AP29 XDP_BPM6_R TP5
22 CK_OUT_DMI_N BCLKN BPM_N_6
CK_OUT_DMI_P E26 AP28 XDP_BPM7_R TP6
22 CK_OUT_DMI_P BCLKP BPM_N_7
HASWE-U1
(62.10040.981)
P_CPU_VCCIO
1
R715
10KR2F-2-GP
(R)
2
CK_DP_SSC_P
CK_DP_SSC_N
1
(DP) NO USE
2
PCH_PM_SYNC
A CC3 1 2 (R) SC100P50V2JN-3GP
Wistron Corporation A
CPU_DRAMRST_N CC22 1 2 (R) SC100P50V2JN-3GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU (MISC/JTAG/CLK/eDP/FD )
Size Document Number Rev
B
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 4 of 103
5 4 3 2 1
5 4 3 2 1
CPU1C 3 OF 9 CPU1D 4 OF 9
AC7 HASWELL AR15 M_A_DQ0 M_A_DQ[63:0] 16 AG8 HASWELL AR18 M_B_DQ0 M_B_DQ[63:0] 17
D M_A_DIM0_CLK_DDR#0 U4 RSVD#AC7 SA_DQ_0 AT14 M_A_DQ1 M_B_DIM0_CLK_DDR#0 Y4 RSVD#AG8 SB_DQ_0 AT18 M_B_DQ1 D
16 M_A_DIM0_CLK_DDR#0 SA_CK_N_0 SA_DQ_1 17 M_B_DIM0_CLK_DDR#0 SB_CKN0 SB_DQ_1
M_A_DIM0_CLK_DDR0 V4 AM14 M_A_DQ2 M_B_DIM0_CLK_DDR0 AA4 AM17 M_B_DQ2
16 M_A_DIM0_CLK_DDR0 M_A_DIM0_CKE0 SA_CK_P_0 SA_DQ_2 M_A_DQ3 17 M_B_DIM0_CLK_DDR0 M_B_DIM0_CKE0 SB_CK0 SB_DQ_2 M_B_DQ3
AD9 AN14 AF10 AM18
16 M_A_DIM0_CKE0 M_A_DIM0_CLK_DDR#1 SA_CKE_0 SA_DQ_3 M_A_DQ4 17 M_B_DIM0_CKE0 M_B_DIM0_CLK_DDR#1 SB_CKE_0 SB_DQ_3 M_B_DQ4
U3 AT15 Y3 AR17
16 M_A_DIM0_CLK_DDR#1 M_A_DIM0_CLK_DDR1 SA_CK_N_1 SA_DQ_4 M_A_DQ5 17 M_B_DIM0_CLK_DDR#1 M_B_DIM0_CLK_DDR1 SB_CKN1 SB_DQ_4 M_B_DQ5
V3 AR14 AA3 AT17
16 M_A_DIM0_CLK_DDR1 SA_CK_P_1 SA_DQ_5 17 M_B_DIM0_CLK_DDR1 SB_CK1 SB_DQ_5
M_A_DIM0_CKE1 AC9 AN15 M_A_DQ6 M_B_DIM0_CKE1 AG10 AN17 M_B_DQ6
16 M_A_DIM0_CKE1 SA_CKE_1 SA_DQ_6 17 M_B_DIM0_CKE1 SB_CKE_1 SB_DQ_6
U2 AM15 M_A_DQ7 Y2 AN18 M_B_DQ7
V2 SA_CK_N_2 SA_DQ_7 AM9 M_A_DQ8 AA2 SB_CKN2 SB_DQ_7 AT12 M_B_DQ8
AD8 SA_CK_P_2 SA_DQ_8 AN9 M_A_DQ9 AG9 SB_CK2 SB_DQ_8 AR12 M_B_DQ9
U1 SA_CKE_2 SA_DQ_9 AM8 M_A_DQ10 Y1 SB_CKE_2 SB_DQ_9 AN12 M_B_DQ10
V1 SA_CK_N_3 SA_DQ_10 AN8 M_A_DQ11 AA1 SB_CKN3 SB_DQ_10 AM11 M_B_DQ11
AC8 SA_CK_P_3 SA_DQ_11 AR9 M_A_DQ12 AF9 SB_CK3 SB_DQ_11 AT11 M_B_DQ12
SA_CKE_3 SA_DQ_12 AT9 M_A_DQ13 SB_CKE_3 SB_DQ_12 AR11 M_B_DQ13
M_A_DIM0_CS#0 M7 SA_DQ_13 AR8 M_A_DQ14 M_B_DIM0_CS#0 P4 SB_DQ_13 AM12 M_B_DQ14
16 M_A_DIM0_CS#0 M_A_DIM0_CS#1 SA_CS_N_0 SA_DQ_14 M_A_DQ15 17 M_B_DIM0_CS#0 M_B_DIM0_CS#1 SB_CS_N_0 SB_DQ_14 M_B_DQ15
16 M_A_DIM0_CS#1 L9 AT8 17 M_B_DIM0_CS#1 R2 AN11
M9 SA_CS_N_1 SA_DQ_15 AJ9 M_A_DQ16 P3 SB_CS_N_1 SB_DQ_15 AR5 M_B_DQ16
M10 SA_CS_N_2 SA_DQ_16 AK9 M_A_DQ17 P1 SB_CS_N_2 SB_DQ_16 AR6 M_B_DQ17
M_A_DIM0_ODT0 M8 SA_CS_N_3 SA_DQ_17 AJ6 M_A_DQ18 SB_CS_N_3 SB_DQ_17 AM5 M_B_DQ18
16 M_A_DIM0_ODT0 M_A_DIM0_ODT1 SA_ODT_0 SA_DQ_18 M_A_DQ19 M_B_DIM0_ODT0 SB_DQ_18 M_B_DQ19
L7 AK6 R4 AM6
16 M_A_DIM0_ODT1 SA_ODT_1 SA_DQ_19 M_A_DQ20 17 M_B_DIM0_ODT0 M_B_DIM0_ODT1 SB_ODT_0 SB_DQ_19 M_B_DQ20
L8 AJ10 17 M_B_DIM0_ODT1 R3 AT5
L10 SA_ODT_2 SA_DQ_20 AK10 M_A_DQ21 R1 SB_ODT_1 SB_DQ_20 AT6 M_B_DQ21
M_A_BS0 V5 SA_ODT_3 SA_DQ_21 AJ7 M_A_DQ22 P2 SB_ODT_2 SB_DQ_21 AN5 M_B_DQ22
16 M_A_BS0 M_A_BS1 SA_BS_0 SA_DQ_22 M_A_DQ23 M_B_BS0 SB_ODT_3 SB_DQ_22 M_B_DQ23
16 M_A_BS1 U5 AK7 17 M_B_BS0 R7 AN6
M_A_BS2 AD1 SA_BS_1 SA_DQ_23 AF4 M_A_DQ24 M_B_BS1 P8 SB_BS_0 SB_DQ_23 AJ4 M_B_DQ24
C 16 M_A_BS2 SA_BS_2 SA_DQ_24 M_A_DQ25 17 M_B_BS1 M_B_BS2 SB_BS_1 SB_DQ_24 M_B_DQ25 C
AF5 AA9 AK4
SA_DQ_25 17 M_B_BS2 SB_BS_2 SB_DQ_25
V10 AF1 M_A_DQ26 AJ1 M_B_DQ26
M_A_RAS# U6 VSS SA_DQ_26 AF2 M_A_DQ27 R10 SB_DQ_26 AJ2 M_B_DQ27
16 M_A_RAS# M_A_WE# SA_RAS# SA_DQ_27 M_A_DQ28 M_B_RAS# VSS SB_DQ_27 M_B_DQ28
16 M_A_WE# U7 AG4 17 M_B_RAS# R6 AM1
M_A_CAS# U8 SA_WE# SA_DQ_28 AG5 M_A_DQ29 M_B_WE# P6 SB_RAS# SB_DQ_28 AN1 M_B_DQ29
16 M_A_CAS# SA_CAS# SA_DQ_29 17 M_B_WE# SB_WE# SB_DQ_29
AG1 M_A_DQ30 M_B_CAS# P7 AK2 M_B_DQ30
16 M_A_A[15:0] SA_DQ_30 17 M_B_CAS# SB_CAS# SB_DQ_30
M_A_A0 V8 AG2 M_A_DQ31 AK1 M_B_DQ31
SA_MA_0 SA_DQ_31 17 M_B_A[15:0] SB_DQ_31
M_A_A1 AC6 J1 M_A_DQ32 M_B_A0 R8 L2 M_B_DQ32
M_A_A2 V9 SA_MA_1 SA_DQ_32 J2 M_A_DQ33 M_B_A1 Y5 SB_MA_0 SB_DQ_32 M2 M_B_DQ33
M_A_A3 U9 SA_MA_2 SA_DQ_33 J5 M_A_DQ34 M_B_A2 Y10 SB_MA_1 SB_DQ_33 L4 M_B_DQ34
M_A_A4 AC5 SA_MA_3 SA_DQ_34 H5 M_A_DQ35 M_B_A3 AA5 SB_MA_2 SB_DQ_34 M4 M_B_DQ35
M_A_A5 AC4 SA_MA_4 SA_DQ_35 H2 M_A_DQ36 M_B_A4 Y7 SB_MA_3 SB_DQ_35 L1 M_B_DQ36
M_A_A6 AD6 SA_MA_5 SA_DQ_36 H1 M_A_DQ37 M_B_A5 AA6 SB_MA_4 SB_DQ_36 M1 M_B_DQ37
M_A_A7 AC3 SA_MA_6 SA_DQ_37 J4 M_A_DQ38 M_B_A6 Y6 SB_MA_5 SB_DQ_37 L5 M_B_DQ38
M_A_A8 AD5 SA_MA_7 SA_DQ_38 H4 M_A_DQ39 M_B_A7 AA7 SB_MA_6 SB_DQ_38 M5 M_B_DQ39
M_A_A9 AC2 SA_MA_8 SA_DQ_39 F2 M_A_DQ40 M_B_A8 Y8 SB_MA_7 SB_DQ_39 G7 M_B_DQ40
M_A_A10 V6 SA_MA_9 SA_DQ_40 F1 M_A_DQ41 M_B_A9 AA10 SB_MA_8 SB_DQ_40 J8 M_B_DQ41
M_A_A11 AC1 SA_MA_10 SA_DQ_41 D2 M_A_DQ42 M_B_A10 R9 SB_MA_9 SB_DQ_41 G8 M_B_DQ42
M_A_A12 AD4 SA_MA_11 SA_DQ_42 D3 M_A_DQ43 M_B_A11 Y9 SB_MA_10 SB_DQ_42 G9 M_B_DQ43
M_A_A13 V7 SA_MA_12 SA_DQ_43 D1 M_A_DQ44 M_B_A12 AF7 SB_MA_11 SB_DQ_43 J7 M_B_DQ44
M_A_A14 AD3 SA_MA_13 SA_DQ_44 F3 M_A_DQ45 M_B_A13 P9 SB_MA_12 SB_DQ_44 J9 M_B_DQ45
M_A_A15 AD2 SA_MA_14 SA_DQ_45 C3 M_A_DQ46 M_B_A14 AA8 SB_MA_13 SB_DQ_45 G10 M_B_DQ46
SA_MA_15 SA_DQ_46 B3 M_A_DQ47 M_B_A15 AG7 SB_MA_14 SB_DQ_46 J10 M_B_DQ47
SA_DQ_47 B5 M_A_DQ48 SB_MA_15 SB_DQ_47 A8 M_B_DQ48
B 16 M_A_DQS#[7:0] B
M_A_DQS#0 AP15 SA_DQ_48 E6 M_A_DQ49 SB_DQ_48 B8 M_B_DQ49
M_A_DQS#1 SA_DQS_N_0 SA_DQ_49 M_A_DQ50 17 M_B_DQS#[7:0] M_B_DQS#0 SB_DQ_49 M_B_DQ50
AP8 A5 AP18 A9
M_A_DQS#2 AJ8 SA_DQS_N_1 SA_DQ_50 D6 M_A_DQ51 M_B_DQS#1 AP11 SB_DQS_N_0 SB_DQ_50 B9 M_B_DQ51
M_A_DQS#3 AF3 SA_DQS_N_2 SA_DQ_51 D5 M_A_DQ52 M_B_DQS#2 AP5 SB_DQS_N_1 SB_DQ_51 D8 M_B_DQ52
M_A_DQS#4 J3 SA_DQS_N_3 SA_DQ_52 E5 M_A_DQ53 M_B_DQS#3 AJ3 SB_DQS_N_2 SB_DQ_52 E8 M_B_DQ53
M_A_DQS#5 E2 SA_DQS_N_4 SA_DQ_53 B6 M_A_DQ54 M_B_DQS#4 L3 SB_DQS_N_3 SB_DQ_53 D9 M_B_DQ54
M_A_DQS#6 C5 SA_DQS_N_5 SA_DQ_54 A6 M_A_DQ55 M_B_DQS#5 H9 SB_DQS_N_4 SB_DQ_54 E9 M_B_DQ55
M_A_DQS#7 C11 SA_DQS_N_6 SA_DQ_55 E12 M_A_DQ56 M_B_DQS#6 C8 SB_DQS_N_5 SB_DQ_55 E15 M_B_DQ56
16 M_A_DQS[7:0] SA_DQS_N_7 SA_DQ_56 SB_DQS_N_6 SB_DQ_56
M_A_DQS0 AP14 D12 M_A_DQ57 M_B_DQS#7 C14 D15 M_B_DQ57
M_A_DQS1 SA_DQS_P_0 SA_DQ_57 M_A_DQ58 17 M_B_DQS[7:0] M_B_DQS0 SB_DQS_N_7 SB_DQ_57 M_B_DQ58
AP9 B11 AP17 A15
M_A_DQS2 AK8 SA_DQS_P_1 SA_DQ_58 A11 M_A_DQ59 M_B_DQS1 AP12 SB_DQS_P_0 SB_DQ_58 B15 M_B_DQ59
M_A_DQS3 AG3 SA_DQS_P_2 SA_DQ_59 E11 M_A_DQ60 M_B_DQS2 AP6 SB_DQS_P_1 SB_DQ_59 E14 M_B_DQ60
M_A_DQS4 H3 SA_DQS_P_3 SA_DQ_60 D11 M_A_DQ61 M_B_DQS3 AK3 SB_DQS_P_2 SB_DQ_60 D14 M_B_DQ61
M_A_DQS5 E3 SA_DQS_P_4 SA_DQ_61 B12 M_A_DQ62 M_B_DQS4 M3 SB_DQS_P_3 SB_DQ_61 A14 M_B_DQ62
M_A_DQS6 C6 SA_DQS_P_5 SA_DQ_62 A12 M_A_DQ63 M_B_DQS5 H8 SB_DQS_P_4 SB_DQ_62 B14 M_B_DQ63
M_A_DQS7 C12 SA_DQS_P_6 SA_DQ_63 AM3 P_CPU_DDR_SM_VREF M_B_DQS6 C9 SB_DQS_P_5 SB_DQ_63
SA_DQS_P_7 SM_VREF P_CPU_DDR_SM_VREF 16,52 SB_DQS_P_6
F16 P_CPU_DDR_SA_VREFDQ M_B_DQS7 C15
SA_DIMM_VREFDQ P_CPU_DDR_SA_VREFDQ 16,52 SB_DQS_P_7
F13 P_CPU_DDR_SB_VREFDQ
SB_DIMM_VREFDQ P_CPU_DDR_SB_VREFDQ 17,52
HASWE-U1
(62.10040.981)
<Core Design>
HASWE-U1
(62.10040.981)
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU (DDR)
Size Document Number Rev
Custom
PIM86L/Florence 1
Date: Tuesday, February 25, 2014 Sheet 5 of 103
5 4 3 2 1
5 4 3 2 1
HASWELL
AT1
AT2 RSVD_TP#AT1 C23
AD10 RSVD_TP#AT2 RSVD_TP#C23 B23
RSVD#AD10 RSVD_TP#B23 D24
A34 RSVD_TP#D24 D23
A35 RSVD_TP#A34 RSVD_TP#D23
D D
RSVD_TP#A35
W29 R741
W28 RSVD_TP#W29 AT31 CPU_CFG_RCOMP 1 2 49D9R2F-GP
R742 1 2 49D9R2F-GP CPU_TESTLO_G26 G26 RSVD_TP#W28 CFG_RCOMP AR21 CPU_CFG16 XDP6
W33 TESTLO_G26 CFG_16 AR23 CPU_CFG18 XDP24
AL30 VSS CFG_18 AP21 CPU_CFG17 XDP4
AL29 RSVD#AL30 CFG_17 AP23 CPU_CFG19 XDP22
F25 RSVD#AL29 CFG_19
VCC_CORE VCC
C35 AR33
B35 RSVD_TP#C35 RSVD#AR33 G6 CPU_FC_G6 3D3V_S0 Revserve circuit for 2014
RSVD_TP#B35 FC_G6 AM27
AL25 RSVD#AM27 AM26
RSVD_TP#AL25 RSVD#AM26
1
F5
W30 RSVD#F5 AM2 R1511
W31 RSVD_TP#W30 RSVD#AM2 K6 6K04R2F-GP
R744 1 2 49D9R2F-GP CPU_TESTLO_W34 W34 RSVD_TP#W31 RSVD#K6 (R) 3D3V_S5
TESTLO_W34 E18
2
XDP9 CPU_CFG0 AT20 RSVD#E18
CFG_0
1
XDP11 CPU_CFG1 AR20 U10
CFG_1 RSVD#U10
1
XDP15 CPU_CFG2 AP20 P10 R1418
XDP17 CPU_CFG3 AP22 CFG_2 RSVD#P10 R1510 10KR2F-2-GP
CFG_3 3
C XDP27 CPU_CFG4 AT22 B1 2K67R2F-2-GP Q122B (R) C
XDP29 CPU_CFG5 AN22 CFG_4 NC#B1 A2 (R) 2N7002KDW-GP
2
XDP33 CPU_CFG6 AT25 CFG_5 RSVD#A2 AR1 (R)
2
XDP35 CPU_CFG7 AN23 CFG_6 RSVD_TP#AR1 5 CPU_FC_G6_R1
XDP10 CPU_CFG8 AR24 CFG_7 E21
XDP12 CPU_CFG9 AT23 CFG_8 RSVD_TP#E21 E20
XDP16 CPU_CFG10 AN20 CFG_9 RSVD_TP#E20 4
CFG_10 6
XDP18 CPU_CFG11 AP24 AP27 Q122A
XDP28 CPU_CFG12 AP26 CFG_11 VSS AR26 2N7002KDW-GP
XDP30 CPU_CFG13 AN25 CFG_12 VSS (R)
XDP34 CPU_CFG14 AN26 CFG_13 AL31 2
CFG_14 VSS S0_PWR_GOOD 20,36,51,57
XDP36 CPU_CFG15 AP25 AL32
CFG_15 VSS
1
HASWE-U1
(62.10040.981)
0:Lane Reversed
PEG DEFER TRAINING
11: Device 1 function 1 disabled ; Device 1 function 2 disabled R747 1 2 1KR2J-1-GP CPU_CFG5
A CFG[6:5]
(R)
Wistron Corporation A
SSID = CPU
CPU1E 5 OF 9 VCC_CORE
D HASWELL AA26 D
VCC AA28
K27 VCC AA34
L27 RSVD#K27 VCC AA30
T27 RSVD#L27 VCC AA32
V27 RSVD#T27 VCC AB26
RSVD#V27 VCC AB29
1D35V_S3 VCC AB25
VCC AB27
VCC AB28
AB11 VCC AB30
AB2 VDDQ VCC AB31
AB5 VDDQ VCC AB33
AB8 VDDQ VCC AB34
AE11 VDDQ VCC AB32
AE2 VDDQ VCC AC26
AE5 VDDQ VCC AB35
AE8 VDDQ VCC AC28
AH11 VDDQ VCC AD25
K11 VDDQ VCC AC30
N11 VDDQ VCC AD28
N8 VDDQ VCC AC32
T11 VDDQ VCC AD31
T2 VDDQ VCC AC34
T5 VDDQ VCC AD34
T8 VDDQ VCC AD26
W11 VDDQ VCC AD27
W2 VDDQ VCC AD29
W5 VDDQ VCC AD30
W8 VDDQ VCC AD32
VDDQ VCC AD33
N26 VCC AD35
K26 RSVD#N26 VCC AE26
VCC_CORE VCC VCC
AL27 AE32
AK27 RSVD#AL27 VCC AE28
RSVD#AK27 VCC AE30
C58 for EMC--Kai 0515 VCC AG28
VCC AG34
C C
C58 1 2 SC220P50V2KX-3GP VCC AE34
VCC AF25
VCC AF26
R729 1 2 0R0402-PAD CPU_VCC_SENSE AL35 VCC AF27
63 VCC_SENSE VCC_SENSE VCC
E17 AF28
R727 1 2 0R0402-PAD P_CPU_VCCIO_OUT AN35 RSVD#E17 VCC AF29
P_CPU_VCCIO P_CPU_VCCIO2PCH_OUT VCCIO_OUT VCC
P_1.05V_CPU_VCCST R726 1 (R) 2 0R2J-2-GP A23 AF30
R728 1 2 0R0603-PAD P_CPU_VCCIOA_OUT F22 FC_A23 VCC AF31
P_CPU_VCCIOA VCOMP_OUT VCC
W32 AF32
AL16 RSVD#W32 VCC AF33
TP8 CPU_RSVD_AL6 J27 RSVD#AL16 VCC AF34
AL13 RSVD#J27 VCC AF35
RSVD#AL13 VCC AG26
VCC AH26
H_CPU_SVID_ALERT_N AM28 VCC AH29
H_CPU_SVID_CLK AM29 VIDALERT# VCC AG30
H_CPU_SVID_DAT AL28 VIDSCLK VCC AG32
VIDSOUT VCC AH32
AP35 VCC AH35
XDP_PWR_DEBUG H27 VSS VCC AH25
AP34 PWR_DEBUG# VCC AH27
AT35 VSS VCC AH28
@ Close to CPU AR35 RSVD_TP#AT35 VCC AH30
AR32 RSVD_TP#AR35 VCC AH31
P_CPU_VCCIO TP9 PCH_IST_TRIGGER AL26 RSVD_TP#AR32 VCC AH33
AT34 RSVD_TP#AL26 VCC AH34
AL22 VSS VCC AJ25
AT33 VSS VCC AJ26
VSS VCC
1
AM21 AJ27
R730 AM25 VSS VCC AJ28
130R2F-1-GP AM22 VSS VCC AJ29
AM20 VSS VCC AJ30
AM24 VSS VCC AJ31
2
R736
1 (R) 2 10KR2F-2-GP
1D05V_S0 P_CPU_VCCIO
C59
SCD01U50V2KX-1GP
2
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU (Power)
Size Document Number Rev
C
PIM86L/Florence 1
Date: Tuesday, February 25, 2014 Sheet 7 of 103
5 4 3 2 1
5 4 3 2 1
P_CPU_VCCIO 3D3V_S0
1
P_CPU_VCCIO
R724 R725
10KR2F-2-GP 10KR2F-2-GP
1
(R) (R)
D R719 D
2
10KR2F-2-GP
CPU1H 8 OF 9 CPU_DP_UTIL_CTL
HASWELL
2
T28 M27 CPU_DP_AUXN
DDIB_TXBN_0 EDP_AUXN CPU_DP_AUXN 41
U28 N27 CPU_DP_AUXP Q37
DDIB_TXBP_0 EDP_AUXP CPU_DP_AUXP 41
1
T30 P27 DP_HPD_N PMBS3904-1-GP
DDIB_TXBN_1 EDP_HPD DP_HPD_N 41
U30 eDP E24 DP_COMP R718 1 2 24D9R2F-L-GP (R)
DDIB_TXBP_1 EDP_RCOMP P_CPU_VCCIOA
U29 R27 CPU_DP_UTIL 2 3
Note:How to Disable DDI Port? No Connect V29 DDIB_TXBN_2 EDP_DISP_UTIL DP_UTIL 54
U31 DDIB_TXBP_2
V31 DDIB_TXBN_3
DDIB_TXBP_3 P35 CPU_DP_TXN0
EDP_TXN_0 CPU_DP_TXN0 41
DDPC_DATA2# T34 R35 CPU_DP_TXP0
49 DDPC_DATA2# DDIC_TXCN_0 EDP_TXP_0 CPU_DP_TXP0 41
DDPC_DATA2 U34 N34 CPU_DP_TXN1
49 DDPC_DATA2 DDIC_TXCP_0 EDP_TXN_1 CPU_DP_TXN1 41
DDPC_DATA1# U35 P34 CPU_DP_TXP1
49 DDPC_DATA1# DDIC_TXCN_1 EDP_TXP_1 CPU_DP_TXP1 41
DDPC_DATA1 V35 P33 FDI_TXN0
49 DDPC_DATA1 DDIC_TXCP_1 FDI_TXN_0 FDI_TXN0 20
DDPC_DATA0# U32 R33 FDI_TXP0
49 DDPC_DATA0# DDIC_TXCN_2 FDI_TXP_0 FDI_TXP0 20
DDPC_DATA0 T32 N32 FDI_TXN1
49 DDPC_DATA0 DDIC_TXCP_2 FDI_TXN_1 FDI_TXN1 20
DDPC_CLK# U33 P32 FDI_TXP1
49 DDPC_CLK# DDIC_TXCN_3 FDI_TXP_1 FDI_TXP1 20
DDPC_CLK V33
49 DDPC_CLK DDIC_TXCP_3
P29
R29 DDID_TXDN_0
C DDID_TXDP_0 C
N28
P28 DDID_TXDN_1 DDI
P31 DDID_TXDP_1
R31 DDID_TXDN_2
N30 DDID_TXDP_2
P30 DDID_TXDN_3
DDID_TXDP_3
HASWE-U1
(62.10040.981)
B B
<Core Design>
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU(DDI/EDP)
Size Document Number Rev
B
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 8 of 103
5 4 3 2 1
5 4 3 2 1
SSID = CPU
CPU1F 6 OF 9 CPU1G 7 OF 9
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU (VSS)
Size Document Number Rev
A3
PIM86L/Florence 1
Date: Tuesday, February 25, 2014 Sheet 9 of 103
5 4 3 2 1
D
A
Wistron Corporation
1
Rev
103
CPU (RESERVED/STRAPS/XDP)
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
of
PIM86L/Florence
10
1
1
Sheet
Tuesday, February 25, 2014
Document Number
<Core Design>
Date:
Size
Title
B
1D35V_S3
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP SC22U6D3V5MX-2GP
C25
C48
2
SC22U6D3V5MX-2GP
VCC_CORE
C14
C18
1 2 1 2
1 2 1 2 SC10U6D3V3MX-GP
SC10U6D3V3MX-GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP
C47
C57
C9
SC22U6D3V5MX-2GP
C13
C38
1 2 1 2 1 2
1 2 1 2 SC10U6D3V3MX-GP
SC10U6D3V3MX-GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP
C46
C56
C8
SC22U6D3V5MX-2GP
C30
C37
1 2 1 2 1 2
1 2 1 2 SC10U6D3V3MX-GP
SC10U6D3V3MX-GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP
C24
C45
C55
SC22U6D3V5MX-2GP
C12
C17
1 2 1 2 1 2
1 2 1 2 SC10U6D3V3MX-GP
SC10U6D3V3MX-GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP
C23
C44
C54
SC22U6D3V5MX-2GP
C29
C36
1 2 1 2 1 2
1 2 1 2 SC10U6D3V3MX-GP
SC10U6D3V3MX-GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP
C22
C43
C53
SC22U6D3V5MX-2GP
C11
C35
1 2 1 2 1 2
1 2 1 2 SC10U6D3V3MX-GP
SC10U6D3V3MX-GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP
C42
C52
3
3
C7
SC22U6D3V5MX-2GP
C28
C34
1 2 1 2 1 2
1 2 1 2 SC10U6D3V3MX-GP
SC10U6D3V3MX-GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP
C21
C41
C51
SC22U6D3V5MX-2GP
C10
C16
1 2 1 2 1 2
1 2 1 2 SC10U6D3V3MX-GP
SC10U6D3V3MX-GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP
C20
C40
C50
SC22U6D3V5MX-2GP
C27
C33
1 2 1 2 1 2
1 2 1 2 SC10U6D3V3MX-GP SC10U6D3V3MX-GP
SC10U6D3V3MX-GP SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP
C19
C15
C39
C49
SC22U6D3V5MX-2GP
C26
C32
1 2 1 2 1 2 1 2
1 2 1 2
SC22U6D3V5MX-2GP
C31
1 2
4
4
Quantity
2/11
2/10
1/1
Quantity
11
10
19/19
11/11
2
5/8
19
11
2
330uF
330uF
Value
22uF
10uF
22uF
10uF
470uF
470uF
Value
22uF
10uF
22uF
10uF
PPDG
CRB
PPDG
CRB
1D35V_S3
5
5
Signal
VCC_CORE
Signal
D
A
5 4 3 2 1
1D05V_S0
1
10uF 1/1 C143 C140 C141 C142
SC10U6D3V3MX-GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
CRB 1D05V_S0 R874 P_1.05V_VCC_EXP
1uF 3/3
2
0R0805-PAD
10uF 1 1 2
D D
PCH_VCC PPDG
1
1uF 3 C156 C157 C158 C159 C160 C161
SC10U6D3V3MX-GP SC1U10V2KX-1GP SC1U10V2KX-1GP SC1U10V2KX-1GP SC1U10V2KX-1GP SC1U10V2KX-1GP
2
@Near AN34/AN35
1D05V_S0
1
22uF 1/1 C145 C146 C147
SC22U6D3V5MX-2GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
CRB
1uF 2/2
2
22uF 1
PCH_VCCASW PPDG
1uF 2
C C
1D05V_S0
1D5V_S0 3D3V_S5 3D3V_S0 R879 P_3.3V_VCCPCORE 3D3V_S5 R881 P_3.3V_S0_VCCPSPI RTC_AUX_S5
R886 P_1.05V_VCCAUSB 0R0603-PAD 0R0402-PAD-1-GP
0R0402-PAD-1-GP 1 2 2 1
R885 P_3.3V_S5_VCCPUSB 2 1
1
1
C164 0R0805-PAD C169 C165 C170 C171 C172
1
SC10U6D3V3MX-GP 1 2 C177 C180 SCD01U50V2KX-1GP SC1U10V2KX-1GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SC1U10V2KX-1GP
SCD1U16V2KX-3GP SC1U10V2KX-1GP
2
2
1
C176
2
SCD1U16V2KX-3GP
2
R883 P_3.3V_VCCAUBG
@ Close to PCH AF34 0R0402-PAD-1-GP
2 1
R896 P_3.3V_S5_VCCPRTCSUS 1D05V_S0 P_1.05V_CPU_VCCST
1
0R0402-PAD-1-GP C173
2 1 SCD1U16V2KX-3GP
R735 1 2 0R0402-PAD
2
1
C185
SC1U10V2KX-1GP
1
C166 C167
2
2
0R0402-PAD-1-GP 2 1
R884 P_3.3V_S5_HDA 2 1
1
0R0603-PAD C187
1
1 2 C183 SCD1U16V2KX-3GP
SC1U10V2KX-1GP
2
1
B B
C174
2
SCD1U16V2KX-3GP
2
R898 P_3.3V_VCCPFUSE
R894 P_1.05V_VCC_SSCFF 0R0603-PAD
0R0402-PAD-1-GP 1 2
2 1
1
C188
1
C186 SC1U10V2KX-1GP
SC1U10V2KX-1GP
2
2
R939 P_3.3V_ASEPCI
R941 P_1.05V_VCCCLKF135 0R0402-PAD-1-GP
0R0402-PAD-1-GP 2 1
2 1
1
C336 C178 C181 C184
1
2
R888
2
0R0402-PAD-1-GP
2 1 @ Close to PCH U32/V32@ Close to PCH M29 @ Close to PCH L29 @ Close to PCH L26/M26
1
C338
SC1U10V2KX-1GP
2
R983 P_1.05V_VCCSSCF100
0R0402-PAD-1-GP
2 1
A A
1
C339
SC1U10V2KX-1GP
2
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU (RESERVED/STRAPS/XDP)
Size Document Number Rev
C
PIM86L/Florence 1
Date: Tuesday, February 25, 2014 Sheet 11 of 103
5 4 3 2 1
5 4 3 2 1
DIMM1
SSID = MEMORY 12 M_A_A[15:0] M_A_A0 98
A0 NP1
NP1
M_A_A1 97 NP2
M_A_A2 96 A1 NP2
M_A_A3 95 A2 110
M_A_A4 A3 RAS# M_A_RAS# 12
92 113
M_A_A5 A4 WE# M_A_W E# 12
91 115
M_A_A6 A5 CAS# M_A_CAS# 12
90 Note:
M_A_A7 86 A6 114
M_A_A8 A7 CS0# M_A_DIM0_CS#0 12 If SA0 DIM0 = 0, SA1_DIM0 = 0
89 121
A8 CS1# M_A_DIM0_CS#1 12
M_A_A9 85
A9
SO-DIMMA SPD Address is 0xA0
M_A_A10 107 73
M_A_A11 84 A10/AP CKE0 74
M_A_DIM0_CKE0 12 SO-DIMMA TS Address is 0x30
M_A_A12 A11 CKE1 M_A_DIM0_CKE1 12
D
83 D
A12
M_A_A13 119
A13 CK0
101
M_A_DIM0_CLK_DDR0 12 If SA0 DIM0 = 1, SA1_DIM0 = 0
M_A_A14 80 103
M_A_A15 78 A14 CK0# M_A_DIM0_CLK_DDR#0 12 SO-DIMMA SPD Address is 0xA2
79 A15 102 SO-DIMMA TS Address is 0x32
12 M_A_BS2 A16/BA2 CK1 M_A_DIM0_CLK_DDR1 12
104
CK1# M_A_DIM0_CLK_DDR#1 12
109
12 M_A_BS0 108 BA0 11
12 M_A_BS1 BA1 DM0 28
12 M_A_DQ[63:0] M_A_DQ0 5 DM1 46
M_A_DQ1 7 DQ0 DM2 63
M_A_DQ2 15 DQ1 DM3 136
M_A_DQ3 17 DQ2 DM4 153
M_A_DQ4
M_A_DQ5
4 DQ3
DQ4
DM5
DM6
170 Thermal EVENT
6 187
M_A_DQ6 16 DQ5 DM7 3D3V_S0
M_A_DQ7 18 DQ6 200
M_A_DQ8 21 DQ7 SDA 202 SMB_DATA 17,19,30,41,46,47,48 TS#_DIMM0_1 1R1403 2
M_A_DQ9 23 DQ8 SCL SMB_CLK 17,19,30,41,46,47,48 10KR2J-3-GP
M_A_DQ10 33 DQ9 198 3D3V_S0
M_A_DQ11 DQ10 EVENT# TS#_DIMM0_1 17
35
M_A_DQ12 22 DQ11 199
M_A_DQ13 24 DQ12 VDDSPD
M_A_DQ14 34 DQ13 197 C1401
DQ14 SA0
1
M_A_DQ15 36 201
SCD1U10V2KX-5GP
M_A_DQ16 39 DQ15 SA1
M_A_DQ17 41 DQ16 77 1D35V_S3
2
M_A_DQ18 51 DQ17 NC#1 122
M_A_DQ19 53 DQ18 NC#2 125 1D35V_S3
M_A_DQ20 40 DQ19 NC#/TEST SODIMM A DECOUPLING
M_A_DQ21 42 DQ20 75
M_A_DQ22 50 DQ21 VDD1 76
C DQ22 VDD2 C
M_A_DQ23 52 81
C1403
C1404
C1405
C1406
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
DQ23 VDD3
1
M_A_DQ24 57 82
M_A_DQ25 59 DQ24 VDD4 87
M_A_DQ26 67 DQ25 VDD5 88
2
M_A_DQ27 69 DQ26 VDD6 93 (R)
M_A_DQ28 56 DQ27 VDD7 94
M_A_DQ29 58 DQ28 VDD8 99
M_A_DQ30 68 DQ29 VDD9 100
M_A_DQ31 70 DQ30 VDD10 105
M_A_DQ32 129 DQ31 VDD11 106
DDR_VREF_S3 M_A_DQ33 131 DQ32 VDD12 111
CPU AM3 M_A_DQ34 141 DQ33 VDD13 112
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
M_A_DQ35 143 DQ34 VDD14 117
C1416
C1417
DQ35 VDD15 Layout Note:
1
M_A_DQ36 130 118
R778 2 1 2R2F-GP M_A_DQ37 132 DQ36 VDD16 123 Place these Caps near
P_CPU_DDR_SM_VREF 12,52 DQ37 VDD17
M_A_DQ38 140 124 SO-DIMMA.
2
DQ38 VDD18
1
M_A_DQ44 146 13
R784 M_A_DQ45 148 DQ44 VSS 14
24D9R2F-L-GP M_A_DQ46 158 DQ45 VSS 19
M_A_DQ47 160 DQ46 VSS 20
M_A_DQ48 163 DQ47 VSS 25
2
SCD1U10V2KX-5GP
2
M_A_DQS#3 62 133
R767 M_A_DQS#4 135 DQS3# VSS 134
24D9R2F-L-GP M_A_DQS#5 152 DQS4# VSS 138
M_A_DQS#6 169 DQS5# VSS 139
M_A_DQS#7 186 DQS6# VSS 144
2
SC1U10V2KX-1GP
M_B_A0 98 NP1
M_B_A1 97 A0 NP1 NP2
M_B_A2 96 A1 NP2
M_B_A3 95 A2 110
M_B_A4 A3 RAS# M_B_RAS# 12
92 113
M_B_A5 A4 WE# M_B_W E# 12
91 115
M_B_A6 A5 CAS# M_B_CAS# 12
90
M_B_A7 86 A6 114
M_B_A8 A7 CS0# M_B_DIM0_CS#0 12
89 121
M_B_A9 A8 CS1# M_B_DIM0_CS#1 12
85
M_B_A10 107 A9 73
M_B_A11 A10/AP CKE0 M_B_DIM0_CKE0 12
84 74
D
M_B_A12 A11 CKE1 M_B_DIM0_CKE1 12 D
83
M_B_A13 119 A12 101
M_B_A14 A13 CK0 M_B_DIM0_CLK_DDR0 12
80 103 Note:
M_B_A15 A14 CK0# M_B_DIM0_CLK_DDR#0 12
78
79 A15 102 SO-DIMMB SPD Address is 0xA4
12 M_B_BS2 A16/BA2 CK1 M_B_DIM0_CLK_DDR1 12
CK1#
104
M_B_DIM0_CLK_DDR#1 12 SO-DIMMB TS Address is 0x34
109
12 M_B_BS0 108 BA0 11
12 M_B_BS1 BA1 DM0 28
12 M_B_DQ[63:0] M_B_DQ0 5 DM1 46
M_B_DQ1 7 DQ0 DM2 63
SO-DIMMB is placed farther from
M_B_DQ2 15 DQ1 DM3 136 the Processor than SO-DIMMA
M_B_DQ3 17 DQ2 DM4 153
M_B_DQ4 4 DQ3 DM5 170
M_B_DQ5 6 DQ4 DM6 187
M_B_DQ6 16 DQ5 DM7
M_B_DQ7 18 DQ6 200
M_B_DQ8 21 DQ7 SDA 202 SMB_DATA 16,19,30,41,46,47,48
M_B_DQ9 23 DQ8 SCL SMB_CLK 16,19,30,41,46,47,48
M_B_DQ10 33 DQ9 198 3D3V_S0 1D35V_S3
M_B_DQ11 35 DQ10 EVENT# TS#_DIMM0_1 16 SODIMM B DECOUPLING
M_B_DQ12 22 DQ11 199
M_B_DQ13 24 DQ12 VDDSPD
DQ13
1
M_B_DQ14 34 197 C1501
M_B_DQ15 DQ14 SA0 SA1_DIM1
SCD1U10V2KX-5GP
36 201 2 1
C1505
C1506
C1507
C1503
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC56P50V2JN-2GP
DQ15 SA1
1
M_B_DQ16
SC5D6P50V2CN-1GP
39
C1504
2
M_B_DQ17 41 DQ16 77 R1501
M_B_DQ18 51 DQ17 NC#1 122 10KR2J-3-GP (R) (R)
2
M_B_DQ19 53 DQ18 NC#2 125 1D35V_S3
M_B_DQ20 40 DQ19 NC#/TEST
M_B_DQ21 42 DQ20 75
C DQ21 VDD1 C
M_B_DQ22 50 76
M_B_DQ23 52 DQ22 VDD2 81
M_B_DQ24 57 DQ23 VDD3 82
M_B_DQ25 59 DQ24 VDD4 87
M_B_DQ26 67 DQ25 VDD5 88
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
M_B_DQ27 69 DQ26 VDD6 93
C1513
C1514
DQ27 VDD7
1
M_B_DQ28 56 94
M_B_DQ29 58 DQ28 VDD8 99
Layout Note:
M_B_DQ30 68 DQ29 VDD9 100 Place these Caps near
2
DQ30 VDD10
M_B_DQ31 70
DQ31 VDD11
105 SO-DIMMB.
M_B_DQ32 129 106
M_B_DQ33 131 DQ32 VDD12 111
M_B_DQ34 141 DQ33 VDD13 112
M_B_DQ35 143 DQ34 VDD14 117
M_B_DQ36 130 DQ35 VDD15 118
M_B_DQ37 132 DQ36 VDD16 123
M_B_DQ38 140 DQ37 VDD17 124
M_B_DQ39 142 DQ38 VDD18
M_B_DQ40 147 DQ39 2
M_B_DQ41 149 DQ40 VSS 3
M_B_DQ42 157 DQ41 VSS 8
M_B_DQ43 159 DQ42 VSS 9
M_B_DQ44 146 DQ43 VSS 13
M_B_DQ45 148 DQ44 VSS 14
M_B_DQ46 158 DQ45 VSS 19
M_B_DQ47 160 DQ46 VSS 20
M_B_DQ48 163 DQ47 VSS 25
M_B_DQ49 165 DQ48 VSS 26
M_B_DQ50 175 DQ49 VSS 31
M_VREF_DQ_DIMM1 M_B_DQ51 177 DQ50 VSS 32
DDR_VREF_S3 M_B_DQ52 164 DQ51 VSS 37
B DQ52 VSS B
M_B_DQ53 166 38
R1502 R1503 M_B_DQ54 174 DQ53 VSS 43
1 2 1 2
DDR_W R_VREF01_D1 52
CPU F13 M_B_DQ55
M_B_DQ56
176 DQ54
DQ55
VSS
VSS
44
0R0603-PAD-1-GP-U 0R0603-PAD-1-GP-U 181 48
M_B_DQ57 183 DQ56 VSS 49
DQ57 VSS
1
SCD1U10V2KX-5GP
M_B_DQS#0 10 72
R777 M_B_DQS#1 27 DQS0# VSS 127
24D9R2F-L-GP M_B_DQS#2 45 DQS1# VSS 128
M_B_DQS#3 62 DQS2# VSS 133
M_B_DQS#4 135 DQS3# VSS 134
2
C1521
SC1U10V2KX-1GP
189
30 VSS 190 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
16,52 DDR3_DRAMRST# RESET# VSS 195 Taipei Hsien 221, Taiwan, R.O.C.
2
VSS 196
203 VSS 205 Title
0D675V_S0 VTT1 VSS
204 206
VTT2 VSS DDR3L-SODIMM2
Size Document Number Rev
Custom
H = 5.2mmDDR3-204P-104-GP
(62.10017.K11) PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 13 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
DDR3L-SODIMM2
Size Document Number Rev
A
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 14 of 103
5 4 3 2 1
5 4 3 2 1
CRT
8 1 INT_PIRQF# VGA_DDC_DATA DDPD_CTRLCLK
PCH_PCI_PIRQ_C_N RN9505
7 2 N42 N38
6 3 PCH_PCI_PIRQ_D_N VGA_HSYNC DDPD_CTRLDATA INT_PIRQG# 8 1
D 3D3V_S0 D
5 4 INT_PIRQE# N44 INT_PIRQH# 7 2
VGA_VSYNC H45 PCH_PCI_PIRQ_B_N 6 3
U40 DDPB_AUXN PCH_PCI_PIRQ_A_N 5 4
SRN8K2J-4-GP DAC_IREF K43
U39 DDPC_AUXN
VGA_IRTN J42 SRN8K2J-4-GP
DDPD_AUXN
DISPLAY
PCH_BKLT_PWM N36 H43
41 PCH_BKLT_PWM EDP_BKLTCTL DDPB_AUXP
LVDS
TPAD28-1-GP-U TP1708 1 PCH_BKLT_EN K36 K45
3D3V_S0 EDP_BKLTEN DDPC_AUXP
RN2203 TPAD28-1-GP-U TP1709 1 PCH_LCD_PW_EN G36 J44
SRN10KJ-5-GP EDP_VDDEN DDPD_AUXP
1 4 H_RCIN# K40
2 3 H_A20GATE PCH_PCI_PIRQ_A_N H20 DDPB_HPD
PIRQA# K38 HDMI_PCH_DET
PCH_PCI_PIRQ_B_N DDPC_HPD HDMI_PCH_DET 49
L20
PIRQB# H39
PCH_PCI_PIRQ_C_N K17 DDPD_HPD
PIRQC#
PCH_PCI_PIRQ_D_N M20
3D3V_S0 PIRQD# PCI G17 INT_PIRQE#
RN2201 PCH_GPIO50 A12 PIRQE#/GPIO2 3D3V_S0 3D3V_S0
SRN10KJ-6-GP GPIO50 F17 INT_PIRQF#
8 1 EC_SMI# PCH_GPIO51 C10 PIRQF#/GPIO3
7 2 PCH_PORTRAIT_SMI1# Straping Pin 23 PCH_GPIO51 GPIO51 L15 INT_PIRQG#
PIRQG#/GPIO4
1
6 3 EC_BRI_SMI1# PCH_GPIO52 B13
5 4 DGPU_PWROK GPIO52 M15 INT_PIRQH# R189 R191
PCH_GPIO53 A10 PIRQH#/GPIO5
Straping Pin 23 PCH_GPIO53 GPIO53 AD10
10KR2J-3-GP 10KR2J-3-GP
2
SRN10KJ-6-GP GPIO54 Y11 PLT_RST#
PLTRST# PLT_RST# 36,56
8 1 PCH_GPIO55 AL6 PCH_GPIO50 PCH_GPIO52
7 2
GPIO34
FP_DET# Straping Pin 23 PCH_GPIO55 GPIO55
6 3 SPK_HPD_C
1
5 4 PANEL_OFF_R LYNX-POINT-GP-U
(KI.G8601.HM2) R200 R202
10KR2J-3-GP 10KR2J-3-GP
(R) (R)
RN9504
2
SRN10KJ-6-GP
GFX_CRB_DET
Reserved PCH_GPIO--Kai 0315
8 1
7 2 PCH_GPIO0 PCH1F 6 OF 11
6 3 PCH_GPIO49
5 4 PCH_GPIO54 PCH_GPIO0 AT8 LYNX POINT
BMBUSY#/GPIO0
EC_SMI# F13
36 EC_SMI# TACH1/GPIO1
PCH_PORTRAIT_SMI1# A14
36 PCH_PORTRAIT_SMI1# TACH2/GPIO6
CPU/Misc 3D3V_S0
G15
20130910 Ryan 36 EC_BRI_SMI1# TACH3/GPIO7
1KR2F-3-GP 2 1 R1153 PCH_GPIO8 Y1
GPIO8
key test
1
USB_CHARGER_WAKE# OSD_UP 41,53
45 USB_CHARGER_WAKE#
K13 R453
3D3V_S5 LAN_PHY_PWR_CTRL/GPIO12 AN10 H_A20GATE 10KR2J-3-GP
3D3V_S0 TP14 H_A20GATE 36 KEY0_TEST
RN2204 R2202 36 EC_VOL_SMI1#
AB11 (63.10234.1DL)
SRN10KJ-5-GP 10KR2J-3-GP GPIO15 AY1 H_PECI_R R2203 1 20R2J-2-GP
H_PECI 11,36
2
1 4 USB3_PWR_ON 1 2 SATA4GP AN2 PECI (R) Q2201
SATA4GP/GPIO16
4
2 3 USB_CHARGER_WAKE# AT6 H_RCIN#
H_RCIN# 36
KEY0_TEST
C14 GPIO RCIN#
30,65,66 DGPU_PWROK TACH0/GPIO17 PCH_CPU_PWRGOOD 3D3V_S0
B AV3 PCH_CPU_PWRGOOD 11 2N7002KDW-GP B
PCH_GPIO22 BB4 PROCPWRGD
R2201 SCLOCK/GPIO22 PCH_THERMTRIP_N
AV1 R843 1 2 390R2F-2GP CPU_THERMTRIP_N 11,30
3
THRMTRIP#
2
2 1 EC_VOL_SMI1# Y10
GPIO24 AU4 PCH_CPU_PLTRST_N R455 KEY1_TEST
PCH_GPIO27 PLTRST_PROC# PCH_CPU_PLTRST_N 11
10KR2J-3-GP R11 10KR2J-3-GP
GPIO27 N10 (75.27002.E7C)
3D3V_A TPAD28-1-GP-U TP2204 1 PCH_GPIO28 AD11 VSS C127 C128 41,53 OSD_MENU
1
GPIO28
1
SC100P50V2JN-3GP SC100P50V2JN-3GP
GPIO34 AN6 (R) (R) KEY1_TEST 3D3V_S0
R1009 2 1 10KR2F-2-GP PCH_GPIO27 GPIO34
2
FP_DET# AP1
GPIO35/NMI#
1
AT3
Straping Pin 23 SATA2GP
SATA2GP
SATA2GP/GPIO36
R454
10KR2J-3-GP
AK1
Straping Pin 23 SATA3GP
SATA3GP
SATA3GP/GPIO37
(R63.10234.1DL)
2
SPK_HPD_C AT7 KEY2_TEST
SLOAD/GPIO38
GFX_CRB_DET AM3 A2 Q2202
D
SDATAOUT0/GPIO39 VSS A41 2N7002-11-GP
KEY1_TEST AN4 VSS A43 (R84.2N702.J31)
3D3V_S0 Pull high: GPU SDATAOUT1/GPIO48 VSS
VSS
A44
PCH_GPIO49 AK3 B1 G
Pull low :UMA SATA5GP/GPIO49 VSS B2
41,53 OSD_DN
TPAD28-1-GP-U TP2210 1 USB3_PWR_ON U12 VSS B44
S
GPIO57 VSS
1
B45
R2218 SMBUS_ISP C16 VSS BA1
10KR2J-3-GP 41 SMBUS_ISP TACH4/GPIO68 VSS BC1
(G) KEY2_TEST D13 VSS BD1
TACH5/GPIO69 VSS BD2
2
BE41 E1
R2219 BE5 VSS NCTF VSS E45 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
10KR2J-3-GP C45 VSS VSS A4 Taipei Hsien 221, Taiwan, R.O.C.
(U) A5 VSS VSS
VSS Title
2
PCIe
AW36 USB2N12 F26
PERN_5 USB2P12 USB_PP12 55
AV36 F24 13 X
PERP_5 USB2N13 G24
USB
BD37 USB2P13
BB37 PETN_5
PETP_5 AR26 USB_XH1_RX_N
USB3RN1 USB_XH1_RX_P USB30_RN1 45
AY38 AP26
37 PCIE_RXN6 PERN_6 USB3RP1 USB_XH1_TX_N USB30_RP1 45
AW38 BE24
37 PCIE_RXP6 PERP_6 USB3TN1 USB_XH1_TX_P USB30_TN1 45 USBXHCI port 1 _AUSB1
LAN C2015 1 2 SCD1U10V2KX-5GP PCIE_TXN6_C BC38 USB3TP1
BD23
AW26 USB_XH2_RX_N USB30_TP1 45
37 PCIE_TXN6 PCIE_TXP6_C PETN_6 USB3RN2 USB_XH2_RX_P USB30_RN2 45
C2016 1 2 SCD1U10V2KX-5GP BE38 AV26 USB30_RP2 45
37 PCIE_TXP6 PETP_6 USB3RP2 BD25 USB_XH2_TX_N
AT40 USB3TN2 BC24 USB_XH2_TX_P USB30_TN2 45 USBXHCI port 2 _AUSB2
PERN_7 USB3TP2 USB30_TP2 45
AT39 AW29
PERP_7 USB3RN5 AV29
BE40 USB3RP5 BE26
BC40 PETN_7 USB3TN5 BC26
PETP_7 USB3TP5 AR29
AN38 USB3RN6 AP29
AN39 PERN_8 USB3RP6 BD27
PERP_8 USB3TN6 BE28
BD42 USB3TP6
BD41 PETN_8 K24 PCH_USB_COMP R845 1 2 22D6R2F-L1-GP
PETP_8 USBRBIAS# K26
USBRBIAS
R846 1 2 0R0402-PAD PCH_PCIE_IREF BE30 L33
1D5V_S0 PCIE_IREF TP23 M33
TP24
C BB29 P3 USB_OC_018_N 55 C
TP6 OC0#/GPIO59 V1 OC_2#
OC1#/GPIO40 W3_DISABLE_N OC_2# 45 3D3V_S5
U2 W3_DISABLE_N 46
BC30 OC2#/GPIO41 P1 W1_DISABLE_N 3D3V_S5
TP11 OC3#/GPIO42 W1_DISABLE_N 46
1
M3 R2010
OC4#/GPIO43 20131003 Ryan
1
T1 EC_LANDSCAPE_SMI1# 24 R79256 10KR2J-3-GP
R847 1 2 7K5R2F-1-GP PCH_PCIE_RCOMP BD29 OC5#/GPIO9 N2 10KR2J-3-GP
1D5V_S0 PCIE_RCOMP OC6#/GPIO10 Wake#_PCIE 20
M1 Wake#_LOM 20
OC7#/GPIO14
2
PEG_B_CLKRQ#
2
LYNX-POINT-GP-U EC_LANDSCAPE_SMI1#
1
(KI.G8601.HM2) R2015
1
R79257 10KR2J-3-GP
3D3V_S5 10KR2J-3-GP (R)
(R)
2
1
2
PCH1C 3 OF 11 R2014
10KR2J-3-GP
LYNX POINT
48 CLK_PCIE_TV# Y43 AB35 CLK_PCIE_VGA# 27
2
CLKOUT_PCIE_N_0 CLKOUT_PEG_A_N
1
AD38
A40 TP18 AD39 (R) C2013
CLKOUT_33MHZ4 TP19 C2010 SC10P50V2JN-4GP
2
AN44 PCH_XCLK_BIASREF R854 2 1 7K5R2F-1-GP SC15P50V2JN-2-GP
DIFFCLK_BIASREF 1D5V_S0
CLOCK SIGNAL
A XTAL25_IN 1 2 A
LYNX-POINT-GP-U
(KI.G8601.HM2)
<Core Design>
3
@Place near PCH Pin AL44/AM43
2
X2001
R2006 XTAL-25MHZ-181-GP
1MR3F-GP Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
1
2 Title
PCH1B 2 OF 11
SSID = PCH 10 DMI_RX0_N
DMI_RX0_N AW22
DMI_RXN_0
LYNX POINT
DMI_RX1_N AR20
10 DMI_RX1_N DMI_RXN_1 AJ35 FDI_TXN0
FDI_RXN_0 FDI_TXN0 11
DMI_RX2_N AP17
10 DMI_RX2_N DMI_RXN_2
DMI_RX3_N AV20 AL35 FDI_TXN1
10 DMI_RX3_N DMI_RXN_3 FDI_RXN_1 FDI_TXN1 11
DMI_RX0_P AY22 AJ36 FDI_TXP0
10 DMI_RX0_P DMI_RXP_0 FDI_RXP_0 FDI_TXP0 11
DMI_RX1_P AP20
10 DMI_RX1_P DMI_RXP_1 FDI AL36 FDI_TXP1
FDI_RXP_1 FDI_TXP1 11
DMI_RX2_P AR17
10 DMI_RX2_P DMI_RXP_2
D DMI_RX3_P AW20 DMI AY45 D
10 DMI_RX3_P DMI_RXP_3 TP5
DMI_TX0_N BD21 AW44
10 DMI_TX0_N DMI_TXN_0 TP10
DMI_TX1_N BE20
10 DMI_TX1_N DMI_TXN_1 AV45
DMI_TX2_N BD17 TP15
10 DMI_TX2_N DMI_TXN_2
DMI_TX3_N BE18 AV43
10 DMI_TX3_N DMI_TXN_3 TP16
DMI_TX0_P BB21 AL39 PCH_FDI_CSYNC
10 DMI_TX0_P DMI_TXP_0 FDI_CSYNC PCH_FDI_CSYNC 10
DMI_TX1_P BC20
10 DMI_TX1_P DMI_TXP_1 AL40 PCH_FDI_INT
FDI_INT PCH_FDI_INT 10
DMI_TX2_P BB17
10 DMI_TX2_P DMI_TXP_2
DMI_TX3_P BC18 AT45 PCH_FDI_IREF R785 1 2 0R0603-PAD-2-GP-U 1D5V_S0
10 DMI_TX3_P DMI_TXP_3 FDI_IREF
R786 1 2 0R0603-PAD PCH_DMI_IREF BE16 AU44
1D5V_S0 DMI_IREF TP13 soldering Mask-- 20140115
AV17 AU42
TP7 TP17
AW17 AR44 PCH_FDI_RCOMP R827 2 1 7K5R2F-1-GP
TP12 FDI_RCOMP 1D5V_S0
R828 1 2 7K5R2F-1-GP PCH_DMI_RCOMP AY17
1D5V_S0 DMI_RCOMP
R1910
PCH_DSW _VR_EN 23 Straping Pin
TP47 SUS_PW R_ACK# R6 C8 PCH_DSW _VR_EN 0R0402-PAD
SUSACK# DSWVRMEN 1 2 PM_RSMRST#
SYS_RESET# AM1 System Power L13 PCH_DPW ROK 1 2
SYS_RESET# Management DPWROK RTC_AUX_S5
(R) R1911
SYS_PW ROK AD7 K3 PCIE_W AKE# 10KR2J-3-GP
51 SYS_PW ROK SYS_PWROK WAKE#
C C
S0_PW R_GOOD F10 AN7 PCH_CLKRUN_N
13,36,51,57 S0_PW R_GOOD PWROK CLKRUN#
AB7 U7 GPIO61_R
APWROK SUS_STAT#/GPIO61
PM_DRAM_PW RGD H3 Y6 PCH_SUS_CLK
52 PM_DRAM_PW RGD DRAMPWROK SUSCLK/GPIO62 PCH_SUS_CLK 23 Straping Pin
PM_RSMRST# J2 Y7 GPIO63_R
RSMRST# SLP_S5#/GPIO63
TP49 SUS_PW R_ACK J4 H1 PM_SLP_S3#
SUSWARN#/SUSPWRNACK/GPIO30 SLP_S3# PM_SLP_S3# 36,41,51,52,58,61,62
PM_PW RBTN# K1 C6 PM_SLP_S4# 3D3V_S5 3D3V_S5
36 PM_PW RBTN# PWRBTN# SLP_S4# PM_SLP_S4# 36,44,60
AC_PRESENT E6 F3
ACPRESENT/GPIO31 SLP_A#
1
BATLOW # K7 F1 SLP_SUS# TP50
BATLOW#/GPIO72 SLP_SUS# R193 R194
PM_RI# N4 AY3 PCH_PM_SYNC 10KR2J-3-GP 10KR2J-3-GP
RI# PMSYNCH PCH_PM_SYNC 11
(R) (R)
AB10 G5
2
TP21 SLP_LAN#
PCH_SLP_W LAN_N D2 GPIO61_R GPIO63_R
46 PCH_SLP_W LAN_N SLP_WLAN#/GPIO29
1
LYNX-POINT-GP-U
3D3V_A (KI.G8601.HM2) R204 R205
10KR2J-3-GP 10KR2J-3-GP
2
B 10KR2F-2-GP 1 2 R994 BATLOW # B
3D3V_S5
3D3V_S0
1
R108
R1134 1 2
10KR2J-3-GP (R) 0R2J-2-GP
4K7R2J-2-GP 1 2 R928 SYS_RESET#
2
2
Q41
2N7002A-7-GP R861
G
(84.2N702.J31) 10KR2J-3-GP
W ake#_LOM (R) PM_RSMRST# R1912 1 2 0R0402-PAD
3D3V_S5 22 W ake#_LOM RSMRST#_SIO 36
1
1
C1901
SC1U6D3V2KX-GP
W ake#_PCIE PCIE_W AKE#
PM_RI# 22 W ake#_PCIE
10KR2F-2-GP 1 2 R993 (R)
2
Q42
10KR2F-2-GP 1 2 R999 SUS_PW R_ACK 2N7002A-7-GP
G
(84.2N702.J31)
Title
(R)
3D3V_S5 PCH (DM I/FDI/PM)
Size Document Number Rev
A3
PIM86L/Florence 1
Date: Tuesday, February 25, 2014 Sheet 17 of 103
5 4 3 2 1
5 4 3 2 1
PCH1D 4 OF 11
LPC_PME# (PCH)
SSID = PCH LYNX POINT
Default High : Normal
N7 LPC_PME#
LPC_AD0 A20 SMBALERT#/GPIO11 LPC_PME# 36,41 Low : PME event from SIO
36,56 LPC_AD0 LAD_0
SMBus R10 SMB_CLK_R
LPC_AD1 C20 SMBCLK
36,56 LPC_AD1 LAD_1 U11 SMB_DATA_R
LPC_AD2 A18 SMBDATA
LPC
36,56 LPC_AD2 LAD_2 N8 DRAMRST_CNTRL_PCH
3D3V_S0 SML0ALERT#/GPIO60 DRAMRST_CNTRL_PCH 52
LPC_AD3 C18
36,56 LPC_AD3 LAD_3 SML0_CLK
D U8 D
LPC_FRAME# B21 SML0CLK
36,56 LPC_FRAME# LFRAME# SML0_DATA
R7
TP46 LPC_DRQ_N D21 SML0DATA 3D3V_S5
LDRQ0# H6
R946 2 1 10KR2F-2-GP G20 SML1ALERT#/PCHHOT#/GPIO74
LDRQ1#/GPIO23 K6 SML1_CLK SMB_CLK_R 4 1 RN2003
INT_SERIRQ SML1CLK/GPIO58 SML1_CLK 36 SMB_DATA_R
AL11 3 2 SRN2K2J-1-GP
36 INT_SERIRQ SERIRQ N11 SML1_DATA
SML1DATA/GPIO75 SML1_DATA 36
SML0_DATA 3 2 RN2004
SML0_CLK 4 1 SRN2K2J-1-GP
AF11
SPI_CLK AJ11 CL_CLK SML1_CLK 2 3 RN2005
SPI
SPI_CLK AF10 SML1_DATA 1 4 SRN2K2J-1-GP
SPI_CS0_N AJ7 C-Link CL_DATA
SPI_CS0# AF7 LPC_PME# R942 2 1 10KR2F-2-GP
AL7 CL_RST#
SPI_CS1#
AJ10
SPI_CS2# BA45 R2009
SPI_MOSI AH1 TP1 DRAMRST_CNTRL_PCH 1 2
SPI_MOSI BC45 1KR2J-1-GP
SPI_MOSO AH3 Thermal TP2
SPI_MISO BE44 3D3V_S0 RN2007
SPI_SPIO2 AJ4 TP3 SRN2K2J-1-GP
SPI_IO2 BE43 1 4
SPI_SPIO3 AJ2 TP4 2 3
SPI_IO3 AY43 PCH_TD_IREF_AY43
TD_IREF
C C
1
R814
LYNX-POINT-GP-U 8K2R2F-1-GP
(KI.G8601.HM2)
SMB_DATA_R 6 1
SYSTEM SPI ROM SMB_DATA 16,17,30,41,46,47,48
2
5 2
Q2001
2N7002KDW-GP 4 3
SPI ROM Equal length need to less than 500mil 84.2N702.A3F
2nd = 84.DM601.03F
3D3V_S5 P_3.3V_SPI (75.27002.E7C)
P_3.3V_SPI
SMB_CLK 16,17,30,41,46,47,48
1 2 SMB_CLK_R
R815
1
1
0R0402-PAD-1-GP C125
R816 SCD1U16V2KX-3GP
1KR2F-3-GP
2
U6001
2
RM6 SPI_CS0_N 1 8
SPI_MOSO 1 8 SPI_MOSO_SPI1 2 CS# VCC 7 SPI_CLIP_SPI1
SPI_CLK 2 7 SPI_CLK_SPI1 3 SO/SIO1 HOLD# 6 SPI_CLK_SPI1
SPI_SPIO3 3 6 SPI_CLIP_SPI1 4 WP# SCLK 5 SPI_MOSI_SPI1 R820 1 2 15R2F-2-GP SPI_MOSI
SPI_SPIO2 4 5 SPI_WP# GND SI/SIO0 2N7002-11-GP Q6002
8Mb (84.2N702.J31)
B D S B
SRN15J-GP MX25L8006EM2I-12G-GP
(72.25Q64.G01)
R817
SPI_WP#_R
P_3.3V_SPI 1 2
G
SPI_WP_R_N
1KR2F-3-GP SPI_WP_R_N 18
1
R6009
0R0402-PAD
4M SPI ROM
2
72.25Q32.E01 WINBOND W25Q32BVSSIG SPI_WP#
1M SPI ROM
72.25Q80.001 WINBOND W25Q80BVSSIG
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
PCH (LPC/SPI/SMB/THERRMA)
Size Document Number Rev
Custom
PIM86L/Florence 1
Date: Tuesday, February 25, 2014 Sheet 18 of 103
5 4 3 2 1
5 4 3 2 1
RTCX2
SATA_RXP_0
SATA_TXN_0
AW8
AY8
SATA_TX0_N
SATA_TX0_P
SATA_RX0_P 43
SATA_TX0_N 43
ODD
RTC
SATA_TXP_0 SATA_TX0_P 43
PCH_SRTCRST_N
Follow London --Kai 0302 B9
SRTCRST# BC10
PCH_RTCX1 PCH_INTRUDER_N A8 SATA_RXN_1 BE10
INTRUDER# SATA_RXP_1
PCH_RTCX2 PCH_INTVRM_EN G10 AV10
D R2101 Straping Pin 23 PCH_INTVRM_EN INTVRMEN SATA_TXN_1 AW10
D
1 2 RTC_RST# D9 SATA_TXP_1
RTCRST#
SATA
BB9
10MR3F-GP R796 SATA_RXN_2 BD9
PCH_HDA_BITCLK_R 1 2 PCH_HDA_BITCLK B25 SATA_RXP_2
1 4 HDA_BCLK AY13
33R2F-3-GP PCH_HDA_SYNC A22 SATA_TXN_2 AW13
X2101 XTAL-32D768KHZ-64-GP HDA_SYNC SATA_TXP_2
HDA_SPKR AL10 BC12
2 3 Straping Pin 23,38 HDA_SPKR SPKR SATA_RXN_3 BE12
PCH_HDA_RST_N C24 SATA_RXP_3
HDA_RST#
2
AZALIA
38 HDA_SDIN0 L22 AT13
HDA_SDI0 SATA_TXP_3
SC6D8P50V2CN-GP
SC6D8P50V2CN-GP
1
K22
3D3V_S5 HDA_SDI1 BD13 SATA_RX4_N
SATA_RXN4/PERN1 SATA_RX4_P SATA_RX4_N 43
G22 BB13
HDA_SDI2 SATA_RXP4/PERP1 SATA_RX4_P 43
HDD1
1
F22 AV15 SATA_TX4_N
HDA_SDI3 SATA_TXN4/PETN1 SATA_TX4_P SATA_TX4_N 43
R907 AW15 SATA_TX4_P 43
PCH_HDA_SDOUT A24 SATA_TXP4/PETP1
10KR2F-2-GP HDA_SDO BC14
PCH_GPIO33 B17 SATA_RXN5/PERN2 BE14
Straping Pin 23 PCH_GPIO33
M-SATA
2
DOCKEN#/GPIO33 SATA_RXP5/PERP2
19 SPI_WP_R_N
SPI_WP_R_N C22 AP15 20131003 Ryan
HDA_DOCK_RST#/GPIO13 SATA_TXN5/PETN2 AR15
SATA_TXP5/PETP2
RM2
C HDA_CODEC_RST# 1 8 PCH_HDA_RST_N AY5 PCH_SATA_COMP R802 1 2 7K5R2F-1-GP C
38,39 HDA_CODEC_RST# SATA_RCOMP 1D5V_S0
HDA_CODEC_SDOUT 1 2 PCH_HDA_SDOUT_R2 7 PCH_HDA_SDOUT
38 HDA_CODEC_SDOUT HDA_CODEC_SYNC R805 PCH_HDA_SYNC PCH_SATA_LED_N
38 HDA_CODEC_SYNC 0R0402-PAD 3 6 AP3 R990 1 2 10KR2F-2-GP 3D3V_S0
HDA_CODEC_BITCLK 4 5 PCH_HDA_BITCLK_R SATALED#
38 HDA_CODEC_BITCLK
TP10 PCH_TCK AB3 AT1 SATA_DET#0 R991 1 2 10KR2F-2-GP
JTAG_TCK SATA0GP/GPIO21 3D3V_S0
SRN33J-7-GP-U 1
C356 TP11 PCH_TMS AD1 AU2 SATA1GP
SC10P50V2JN-4GP JTAG_TMS SATA1GP/GPIO19 SATA1GP 23 Straping Pin
(R) TP12 PCH_TDI AE2 BD4 PCH_SATA_IREF R782 1 2 0R0603-PAD
JTAG
1D5V_S0
2
JTAG_TDI SATA_IREF
TP13 PCH_TDO AD3 BB2
3D3V_S5 JTAG_TDO TP8
AB6 BA2
TP20 TP9
PCH_SATA_LED_N 61
ME_CNTL R806 C26
TP22
2
0R2J-2-GP
R2116 2 (R) 1 PCH_XDP_RST_N F8
High : ME disable TP25
1KR2J-1-GP
Default Low : Normal
E ME_CNTL21
LYNX-POINT-GP-U
need resume GPIO (KI.G8601.HM2)
1KR2J-1-GP
PCH_HDA_SDOUT
23 PCH_HDA_SDOUT
CMOS Circuit
+RTC_VCC
R6002
RTC_AUX_S5 Q6001
1KR2J-1-GP
2 RTC_PWR 1 2
20130910 Ryan
2
Clear CMOS
+
3 Width=20mils C6005
SCD1U16V2KX-3GP
(R) BTT1
13D3V_AUX_S5_C BAT-T15-0013-BA10-0-GP
1
2
(22.70034.011)
2
(75.00040.C7D) R6006 1
RTC_AUX_S5 1 2
R6007 1 2 20KR2F-L-GP RTC_RST# 2
A
PCH_RTCRST_DOWN 3 <Core Design> A
0R0402-PAD
1
C6004
R808 1 2 20KR2F-L-GP PCH_SRTCRST_N SC1U10V2KX-1GP
Wistron Corporation
1
2
1
C121 1 NC R6008 PIN-CON3-S-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1
(R) Title
2
3 GND
R811 1 2 1MR3F-GP PCH_INTRUDER_N PCH (RTC/AUDIO/SATA/JTAG)
Size Document Number Rev
Custom
PIM86L/Florence 1
Date: Monday, March 03, 2014 Sheet 19 of 103
5 4 3 2 1
5 4 3 2 1
LPC 0 0
SPKR
SPI 1 1
DESIGN NOTE:
WEAK INTERNAL PULLUPS ON GP51. DEFAULT SPI BOOT DEVICE.
PCH_GPIO53 R297 1 (R) 2 1KR2J-1-GP
B B
DESIGN NOTE:
LOW:TLS CIPHER SUITE WITH NO CONFIDENTIALITY.
HIGH:TLS CIPHER SUITE WITH CONFIDENTIALITY.
DESIGN NOTE:
DMI TX TERMINATION Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
R305 1 (R) 2 1KR2J-1-GP PCH_GPIO33
3D3V_S0
DOCKEN#/GPIO33 Title
R306 1 2 10KR2J-3-GP
(R)
PCH (STRAPS)
Size Document Number Rev
Custom
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 20 of 103
5 4 3 2 1
5 4 3 2 1
SSID = PCH
PCH1G 7 OF 11
D D
1D05V_S0 LYNX POINT P45
VCCADAC1_5
AA24 P43
AA26 VCC CRT DAC VSS
AD20 VCC M31
AD22 VCC VCCADACBG3_3
AD24 VCC
AD26 VCC BB44
VCC VCCVRM 1D5V_S0
AD28
AE18 VCC FDI AN34
VCC VCCIO P_1.05V_VCC_EXP
AE20
AE22 VCC AN35
AE24 VCC VCCIO
AE26 VCC R30
VCC HVCMOS VCC3_3_R30 P_3.3V_VCC_GIO
AG18 R32
AG20 VCC VCC3_3_R32
AG22 VCC Y12
AG24 VCC DCPSUS1
Y26 VCC AJ30
VCC VCCSUS3_3 P_3.3V_S5_VCCPSUS
Core
AJ32
C144 R863 VCCSUS3_3
SC1U10V2KX-1GP 5D11R2F-GP AJ26
2 1 PCH_VCCDSW_RC 2 1 P_VCCDSW U14 USB3 DCPSUS3#AJ26 AJ28
AA18 DCPSUSBYP DCPSUS3#AJ28 AK20
VCCASW VCCIO P_1.05V_VCC_EXP
U18 AK26
U20 VCCASW VCCVRM AK28
VCCASW VCCVRM 1D5V_S0
U22
U24 VCCASW BE22
C V18 VCCASW VCCVRM C
1D05V_S0 PCIe/DMI
V20 VCCASW AK18
VCCASW VCCIO P_1.05V_VCC_EXP
V22
V24 VCCASW AN11
Y18 VCCASW VCCVRM
Y20 VCCASW SATA AK22
VCCASW VCCIO P_1.05V_VCC_EXP
Y22
VCCASW AM18
VCCIO AM20
VCCIO AM22
VCCMPHY VCCIO AP22
VCCIO AR22
VCCIO AT22
VCCIO
LYNX-POINT-GP-U
(KI.G8601.HM2)
B B
1
C148
SCD1U16V2KX-3GP
2
3D3V_S5 R872 P_3.3V_S5_VCCPSUS
0R0402-PAD-1-GP
2 1
1
C154
SCD1U16V2KX-3GP
2
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
PCH (POWER1)
Size Document Number Rev
A3
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 21 of 103
5 4 3 2 1
5 4 3 2 1
USB
VCC3_3 P_3.3V_VCCPCORE
P_3.3V_VCCAUBG L24 AF12
VCC3_3 VCC3_3 AG14
U30 VCC3_3 R875
D P_1.05V_VCCAUSB VCCIO D
V28 0R0402-PAD-1-GP
V30 VCCIO U36 P_1.05V_VCCAUX 2 1
VCCIO VCCIO 1D05V_S0
Y30
VCCIO
Y35 Azalia
DCPSUS2 A26
VCCSUSHDA P_3.3V_S5_HDA
AF34
1D5V_S0 VCCVRM
AP45 K8
P_1.05V_VCC_AXCK_DCB VCC VCCSUS3_3 P_3.3V_S5_VCCPRTCSUS
A6
VCCRTC RTC_AUX_S5
C163
RTC
P_3.3V_ASEPCI M29 P14 PCH_VCCRTCEXT 1 2 SCD1U16V2KX-3GP
VCCCLK3_3 DCPRTC#P14 P16
L29 DCPRTC#P16
VCCCLK3_3
L26 AJ12
VCCCLK3_3 V_PROC_IO#AJ12 P_1.05V_CPU_VCCST
M26 CPU AJ14
VCCCLK3_3 V_PROC_IO#AJ14
U32
V32 VCCCLK3_3 AD12
ICC
VCCCLK3_3 SPI VCCSPI P_3.3V_S0_VCCPSPI
P_1.05V_VCCCLKF135 AD34
VCCCLK P18
VCC P_3.3V_VCCPFUSE
P_1.05V_VCC_SSCFF AA30 P20
AA32 VCCCLK VCC
VCCCLK L17
Fuse VCCASW 1D05V_S0
P_1.05V_VCCCLKF100 AD35
VCCCLK R18
AG30 VCCASW
P_1.05V_VCCSSCF100 VCCCLK
AG32
VCCCLK AW40
VCCVRM 1D5V_S0
AD36
VCCCLK AK30
AE30 VCC3_3
Thermal
AE32 VCCCLK AK32
VCCCLK VCC3_3 P_3.3V_VCCPTS
C P_1.05V_VCC_SSCFF Y32 C
VCCCLK
LYNX-POINT-GP-U
(KI.G8601.HM2)
B B
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
PCH (POWER2)
Size Document Number Rev
C
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 22 of 103
5 4 3 2 1
5 4 3 2 1
Title
PCH (VSS)
Size Document Number Rev
A
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 23 of 103
5 4 3 2 1
5 4 3 2 1
AMP
AMP_PDN# 3D3V_S0
39 AMP_PDN#
EC_AMP_RST 3D3V_S5
39 EC_AMP_RST SIO_VREF SIO_VREF SIO_VREF RN9507
PWROK3_2_R 1 4
2
LDRQ# 2 3
VRD R7997
10KR2F-2-GP
PCH R7996
10KR2F-2-GP
GPU R7909
10KR2F-2-GP
(G) SRN10KJ-11-GP-U
RN7909
1
R7968 5V_S5 REMOTE1+ DIMM_TMPIN2 GPU_PIN3 PCIRST2# 1 4
PCIRST1# 2 3
HW Monitor 17K8R2F-GP
1
SIO_VIN3 1 2 RT7901 RT7902 RT7903 (R)
If without use these pins, Please pull-up to 3.3V. SRN10KJ-11-GP-U
NTC-10K-27-GP-U NTC-10K-27-GP-U NTC-10K-27-GP-U
1
Don't let it floating
(G)
LPC groups need ex
1
C7914 R7969 C7925 C7926 C7927 1.Pin 19:ATXPG
SCD1U16V2ZY-2GP 10KR2F-2-GP (G) 2.Pin 71:SUSB#
3.Pin 77:SUSC# pull high--Kai 0319
2
4.Power On Strapping Options pin RN7909 change to
2
2
1D35V_S3
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP 3D3V_S0--Kai 0328
VCC_CORE Layout Note: place it Layout Note: place it Layout Note: place it
near CPU VORE MOS near PCH near GPU
D SIO_AGND SIO_AGND SIO_AGND D
3D3V_S5
R7958 3D3V_S0
1
6K49R2F-1-GP IT8731 Power On Strapping Options RN7905
G7901
COPPER-CLOSE-GP-U
SIO_VIN4
(64.66515.6DL)
1 2 REMINE LAYOUT Symbol value Description SUSLED_R_N0R0402-PAD 1 SUSLED_N
SIO_PSON_N
RSMRST#_SIO
1 4
2 R7910 2 3
1
LPC R7954 JP6 1 Disabled SVID Output pin
1
19,56 LPC_AD0 C7912 R7959 1 2
AMD SVID_EN SRN10KJ-11-GP-U
19,56 LPC_AD1 HM_VCCP
SCD1U16V2ZY-2GP 10KR2F-2-GP Pin 29 0 Enable SVD(Pin3)/SVC(Pin31) output pins
19,56 LPC_AD2 0R0402-PAD
2
3D3V_S5
19,56 LPC_AD3 JP4 1 K8 power sequence function is disabled
2
3D3V_S5
19,56 LPC_FRAME#
SIO_AGND K8PWR_EN
1
Pin 126 0 K8 power sequence function is enabled
R7946 R79292 R7963 5V_S0
19,41 LPC_PME#
10KR2F-2-GP 10KR2F-2-GP SIO_AGND 17K8R2F-GP JP3 1 The default value of EC Index 15h/16h/17h is 80h
SIO_VIN5 H_PECI PECI_SIO_R FAN_CTL_SEL LPC_PME#
1 2 R7932 1 2 43R2J-GP Pin 124 0 The default value of EC Index 15h/16h/17h is 00h(Fan full speed )
2
2
Power Manager
1
HM_VCCP_R SIO_VIN1
PECI follow design guide--Kai 0319
1
2 1 R7933
21,56 PLT_RST# C7913
SCD1U16V2ZY-2GP
R7964 100KR2J-1-GP
Add RN7911--Kai 0508
10KR2F-2-GP EC_SMI# RN7902
(R)
2
1
1
C7908 C11396 SIO_DAT_DB 1 4
2
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD047U10V2KX-2DLGP 1 2 C7928 SIO_CLK_DB 2 3
R7906 1 2 1KR2J-1-GP
2
2
R7952 12V_S0 R7904 2 1 10KR2J-3-GP SIO_UART2_TX
(R) 3D3V_S0 SRN10KJ-11-GP-U
SIO_AGND 56KR2F-GP (R)
RN7906
SIO_AGND SIO_AGND SIO_VIN2 1 2 R79291 2 1 10KR2J-3-GP SIO_UART2_RX SW_ON_N_SIO 1 4
EC_SMI# 2 3
Reset signals SM Bus PH
1
1
13,20,51,57 S0_PWR_GOOD
20 RSMRST#_SIO
C7911
SCD1U16V2ZY-2GP
R7953
10KR2F-2-GP
PLT_RST# R7939 2 1 33R2J-2-GP PLTRST*_SIO R7903 2 1 10KR2J-3-GP SIO_K8PWR_EN SMB_DATA/CLK 5V_S5 SRN10KJ-11-GP-U
2
3D3V_A
20,36,41,51,52,58,61,62 PM_SLP_S3#
2
PLT_TV_RST# R7940 2 1 33R2J-2-GP PCIRST2#
20,44,60 PM_SLP_S4#
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
PLTRST_GPU# R7923 1 2 33R2J-2-GP PCIRST1#
U7901 (R)
PLTRST_LAN R7924 1 2 33R2J-2-GP 3D3V_S5 SRN10KJ-11-GP-U
RI1#
DCD1#
DTR1#
SIN1/D_RX1
SOUT1/D_TX1
DSR1#
RTS1#
FAN_CTL4
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
STB#
AFD#
ERR#
INIT#
SLIN#
ACK#
SLCT
BUSY
PE
HSCK
RN7908
EC_BRI_SMI1# R79271 1 2 10KR2J-3-GP SMBCLK2_SIO 1 4
CLOCK 22 CLK_48M_SIO
SMBDAT2_SIO 2 3
1005
22 CLK_PCI_SIO 1 102 SIO_AVCC3 SRN10KJ-11-GP-U
2 CTS1# HMOSI 101 PWRBTN_IN_CR7987 1 2 3D3V_S5
16 EC_LANDSCAPE_SMI1# SIO_PCIRSTIN# 3 5VSB_CTRL#/CIRRX2/GP16 HMISO 100 L7901
10KR2J-3-GP
For AC OFF SEQUENCE 3D3V_A
LDRQ#
4
5
PCIRSTIN#/CIRTX2/GP15/CPU_PG
3VSB
HSCE#
A3VSB
99
98 HM_VCCP_R
1 2
(68.00335.141)
3D3V_A
R7988 1 2
EC_VOL_SMI1# 6 LDRQ# VIN0 97 SIO_VIN1
SLP_SUS#/VLDT_EN/GP63 VIN1 For Power monitor function MHC1608S181NBP-GP 10KR2J-3-GP
(R)
1
DCBATOUT 3D3V_S0 C7906 7 96 SIO_VIN2 C7907 C7905 Note:
3D3V_S5 SCD1U16V2ZY-2GP CPU_FANTACH1 8 GNDD VIN2 95 SIO_VIN3 SC1U10V2KX-1GP SC22U6D3V5MX-2GP Place C887,C884 close
R7993 1 2 4K7R2F-GP PWRGD_PS_L1 CPU_FANCTL1 9 FAN_TAC1 VIN3 94 SIO_VIN4 to IT8731
SMBUS (78.10623.51L)
2
FAN_CTL1 VIN4/VLDT_12
1
2
EC_SMI# 10 93 SIO_VIN5 R7950 1 2 1KR2J-1-GP P3P3V 3D3V_A
CPU_FANTACH1 SUSLED_R_N FAN_TAC2/GP52 VIN5/5VDUAL SIO_MAIN_VCC3 3D3V_S0
R7992 (63.47234.1DL) R7995 11 92
100KR2J-1-GP 10KR2J-3-GP (A) 2 R8015 1EC_AMP_RST 12 FAN_CTL2/GP51 VCC3 91 SIO_VREF C7901 1 2 SC1U10V2KX-1GP EUP_DSW_SEL
Q7905 10KR2F-2-GP P3P3V FAN_TAC3/GP37 VREF SIO_AGND Reserved EUP_DSW_SEL
6
2
C EC_BRI_SMI1# C
C7910 13 90 REMOTE1+
19 SML1_CLK R7994 (63.10334.1DL)
19 SML1_DATA
SC100P50V2JN-3GP USB_CHARGER_CTL1 14 FAN_CTL3/GP36 TMPIN1 89 DIMM_TMPIN2
Note JP1=1 EUP R8000 R8004
2
1
FAN_TAC4/GP35 TMPIN2
1
PWRGD_PS_L PWRGD_PS_L2 2 1 SIO_ATXPG USB_CHARGER_CTL3 15 88 GPU_PIN3
VREF follow Moussy JP1=0 DSW 10KR2J-3-GP 10KR2J-3-GP
2
CTRL0 for EUP function CTRL0 16 SUSWARN#/GP34 TMPIN3 87
39 SMBCLK2_SIO_R
2N7002KDW-GP
SUSACK#/GP33 TSD- mount R7978--Kai 0313 --Kai 0315
R203
1
1
R7991 C7924 SIO_PWR_LED 18 DPWROK/GP32 GNDA 85 ICH_RSMRST_N_R R7978 1 2 0R0402-PAD RSMRST#_SIO (R)
20KR2J-L2-GP SCD1U16V2ZY-2GP
SIO_ATXPG 19 PWMOUT/GP31 RSMRST#/CIRRX1/GP55 84 SIO_CIRRX1_R R792061 2 0R0402-PAD SIO_CIRRX1 Add pull down--Kai 0319
1
2
SIO_UART1_RX 20 ATXPG/GP30 PCIRST3#/GP10 83
PECI 11,21 H_PECI
(R)
For OSD
36,41 SIO_UART1_RX
communication 36,41 SIO_UART1_TX SIO_UART1_TX 21 SIN2/GP27 MCLK/GP56 82 EUP_DSW_SEL
2
1
3D3V_A C7916 38 65 SMBDAT2_SIO C7917 USB_CHARGER_CTL2 R8006 1 2 10KR2J-3-GP
GNDD D_TX0/SMDAT2/GP47 Note: COPEN# should be connected to GND
1
SCD1U16V2ZY-2GP C7919 C7918 SC22U6D3V5MX-2GP when this function is not be used.
PCH_D1/SST/AMDTSI_D
IO_SCI#/GP85/SMDAT0
SCD1U16V2ZY-2GP SC2D2U6D3V2MX-GP C7915 (78.10623.51L)
53 SIO_HDD_LED
2
(R) SCD1U16V2ZY-2GP
53 SIO_PWR_LED
2
Note: Note Note:
36,53 SUSLED_N
PECI/AMDTSI_C
*Place C866, C898,C890 close to IT8732 *Place C869,C883 close to IT8731 3D3V_A
From PCH SMB Link1
GP86/SMCLK0
2
KRST#/GP62
GP77/KSO5
GP76/KSO4
GP75/KSO3
GP74/KSO2
GP73/KSO1
GP72/KSO0
GP71/KSI1
GP70/KSI0
R7965 R7966 R7967 R7947 R7948 R7949
LFRAME#
LRESET#
SO/GP50
SMDAT1
SMCLK1
SERIRQ
PCICLK
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP
WRST#
RN7904
GA20
LAD0
LAD1
LAD2
LAD3
SRN10KJ-6-GP
1
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
SIO_CE_N 1 8 3D3V_A (71.08732.A0E) SIO_UART1_TX 3 6
51 SIO_AUDIO_MUTE SIO_SO 2 CS# VCC 7 SIO_HOLD# SIO_UART1_RX 4 5
SO NC#7
1
SIO_WP# 3 6 SIO_SCK R7938 1 2 SIO_WRST# SMBDAT2_SIO R7931 1 2 0R0402-PADSMBDAT2_SIO_R
4 WP# SCLK 5 SIO_SI R190
GND SI 100KR2J-1-GP 10KR2J-3-GP
28 INT_SERIRQ
1
C7903 INT_SERIRQ
1. layout trace is as far as possible short MX25L5121EMC-20G-GP SC1U16V3KX-2GP LPC_FRAME#
38 SIO_PSON_N
2
1
C7909 LPC_AD0
(72.25010.R01) For EC domain,
2
2. Pull-up resistor 1Kohm near SPI Flash SCD1U16V2ZY-2GP (R) LPC_AD1 SIO_GPIO
reset after power up LPC_AD2 DET_HDMI
LPC I/F
2
LPC_AD3 SCALAR_EN
1
H_RCIN# EUP_DSW_SEL
SIO_UART1_RX H_A20GATE SIO_AUDIO_MUTE R201
36,41 SIO_UART1_RX SIO_UART1_TX CLK_PCI_SIO SIO_HDD_LED 10KR2J-3-GP
36,41 SIO_UART1_TX SIO_SO SIO_GPIO (R)
PLTRST*_SIO EC_PORTRAIT_SMI1# 3D3V_A
Delete SIO_PANEL_ON/OFF pull high--Kai
2
SIO_WRST# PECI_SIO_R 3D3V_S5
20130910 Ryan SCALAR_EN R7934 1 2 10KR2J-3-GP 0514
SML1_DATA
SIO_AUDIO_MUTE R79212 1 2 10KR2J-3-GP
GPIO1
GPIO for GPU/UMA--Ryan 20131205
5V_S0_FAN 1 SIO_CLK_DB 20130910 Ryan
2 SIO_DAT_DB
B R79300 (R) U9619 (R) B
42 SCALAR_EN
SCD1U16V2ZY-2GP
APL5606AKI-TRG-GP
1
3D3V_A
SC22U6D3V3MX-1-GP
1
R7961 R7916
Normal Low
(U)
10KR2J-3-GP 100KR2J-1-GP
CTRL0_EUP (U) PB_IN_N_1 C7921 2 1 SCD1U16V2ZY-2GP
51 CTRL0_EUP
R79303
0R2J-2-GP
(U)
Need 15 mil trace width 3D3V_A
1
2
FAN5V_OUT 1 2 12V_S0_FAN R7974 DET_HDMI
PLTRST_GPU# CTRL0 1 2 CTRL0_EUP R7976 2 1 0R0402-PADPWRBTN_IN
27,30 PLTRST_GPU#
1
1
2
PLTRST_LAN C11407 0R0402-PAD R7918
37 PLTRST_LAN
SC4D7U6D3V3KX-GP Connect Low 10KR2J-3-GP
D
PLT_TV_RST# (R) R7977 (R)
48 PLT_TV_RST# Normal High
2
2
C7920 R7975
1
PLT_WLAN_RST# SCD1U16V2ZY-2GP SW_ON_N_SIO 1 2 0R0402-PADPM_PWRBTN# DET_HDMI# G (84.2N702.J31)
46 PLT_WLAN_RST#
2
1
S
C7923 2N7002-7F-GP
PR9988 1 2 0R5J-5-GP SC10U25V5KX-GP
2
SIO_CIRRX1 (G)
55 SIO_CIRRX1 HDMI_IN_DET#_R
(G) R79302 R7979
4K7R2J-2-GP 4K7R2J-2-GP
FAN CTRL
1
3D3V_S0 (U) (G)
CHARGER CTRL R7980 R7917
2
20KR2J-L2-GP 100KR2J-1-GP
CPU_FANTACH1_1 1 2 CPU_FANTACH1 3D3V_S0 0.8VCC3-> S0_PWR_GOOD
Power Good 3V (63.10234.1DL)
1
USB_CHARGER_CTL1
45 USB_CHARGER_CTL1 SIO delay:
K
2
1
2 R7928
2
A
CPU_FANCTL1 1 2 CPU_FANCTL1_CONN 4
6
SUSLED_N PWROK3_1_R 2 R7929 1 0R0402-PAD PWRGD_3V_LL S0_PWR_GOOD
36,53 SUSLED_N
1
C7922 CLX-CON4-9-GP
SC1U25V5ZY-4GP 3D3V_S5
(R)
2
R7944
1KR2J-1-GP PM_SLP_S3#
20,36,41,51,52,58,61,62 PM_SLP_S3#
1
(R)
2
1
PWRGD_3V_B_1 C7904 R7943
SC100P50V2JN-3GP 20KR2J-L2-GP
2
2
6
3D3V_S0
PCIE_WLAN_WAKE# Q7906
A 46 PCIE_WLAN_WAKE# PWROK3_2_R RSMRST*_R A
R7942 1 2 1KR2J-1-GP (R)
2N7002KDW-GP
2
PWRBTN_IN_C (R)
55 PWRBTN_IN_C
1
R7962
10KR2J-3-GP
1
EC_SMI1_EN
16 PCH_PORTRAIT_SMI1#
3D3V_S5
6
Q7907
2
R79272 2N7002KDW-GP
10KR2J-3-GP (75.27002.E7C)
<Core Design>
1
3
1
SIO ITE8732F-CX
Size Document Number Rev
Custom
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 24 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Flash(KBC+PCH)/RTC
Size Document Number Rev
C
PIM86L-Florence
Tuesday, February 25, 2014
SA
Date: Sheet 25 of 103
5 4 3 2 1
5 4 3 2 1
1
L9504
2 1
L9523
2
Main EEPROM
(S68.00335.141) (S68.00335.141)
BEAD 要 30ohm@100MHz(1A) MHC1608S181NBP-GP MHC1608S181NBP-GP EEPROM for OSD
SSID = Scalar
1
PVCC_3V3 PVCC_3V3
C9514 (S) 2009/12/08
1
SC4D7U6D3V3KX-GP R9507
1
10KR2J-3-GP (S)
(R) C9502 PVCC_3V3
SCD1U16V2ZY-2GP 72.24C16.Y01, ATMEL
2
P3P3V PVCC_3V3 TMDS_3V3 P3P3V PVCC_3V3_SDRAM U9501
Shielding 72.02416.B01, ST LCD ON/OFF
2
(S) R9501
L9505 L9502 L9503
8
7
6
5
CE R9504 1 2 22R2J-2-GPCE#_1 1 8 22R2J-2-GP (S)
1 2 1 2 1 2 SDOUT R9506 1 2 22R2J-2-GP SO_1 2 CE# VCC 7 (S) PVCC_3V3 RN9503
FLASH_WP 1 2 WP#_1 3 SO HOLD# 6 CLK_1 1 2
Audio Out (S68.00335.141) (S68.00335.141) (S68.00335.141)
WP# SCK
CLK SRN4K7J-10-GP
1
(S) C11370 R9509 (S) 0R0402-PAD 4 5 U9502
MHC1608S181NBP-GP GND SIO
1
MHC1608S181NBP-GP MHC1608S181NBP-GP C9518 SC10U6D3V3MX-GP SB Modify
C9516 (S) SCD1U16V2ZY-2GP (R) R9508 SDIN_1 1 2 SDIN 1 8 PVCC_3V3
23,24 SCALAR_OUT_R_C
1
2
3
4
SC4D7U6D3V3KX-GP 10KR2J-3-GP PM25LD020C-SCE-GP 2 NC#1 VCC 7 WP_PRO
23,24 SCALAR_OUT_L_C
2
(S) (S) R9502 3 NC#2 WP 6 EESCL
22R2J-2-GP 4 NC#3 SCL 5 EESDA
Need Check
2
GND SDA
2
(S) (S)
D 20130930 vender suggest R9545 D
1
AT24C16C-SSHM-T-GP (S) 10KR2J-3-GP
(S) C9504
SCD1U16V2ZY-2GP
LVDS-OUT 如 如 如 使 使 OD,
, 建 建 使 建 建 建 10uF(MLCC)
1
TXE3+
39
39
TXE3+
TXE3-
TXE3-
TXEC+
Michael 2012/2/6 LCDVDD_EN1
SCALAR_VDD_EN 39
39 TXEC+ TXEC-
39 TXEC- TXE2+
39 TXE2+ TXE2-
39 TXE2- TXE1+
39 TXE1+ TXE1-
39 TXE1- TXE0+
39 TXE0+ TXE0-
39 TXE0-
TXO0-
39 TXO0- TXO0+
39 TXO0+ TXO1-
39 TXO1- TXO1+
39 TXO1+ Pin 118 PVCC_3V3
TXO2-
39 TXO2- TXO2+
功功功功:
PW ON Latch功
39 TXO2+ TXOC- Internal MCU :Pull High 20130930 vender suggest
39 TXOC- C9505
39 TXOC+
TXOC+ External MCU :Pull Low (S)
39
39
TXO3-
TXO3+
TXO3-
TXO3+ PVCC_3V3 B-EVEN 1 2
A-ODD SCALAR_HP_OUT_R
C9535 SC10U6D3V3MX-GP
SCALAR_HP_OUT_R_2
SCD1U16V2ZY-2GP 1 2
PVCC_3V3 TXE3+ TXO0-
2
(S) TXE3- TXO0+ (S)
2
1
1 2 RTD_PIN105
DHMI-IN Interlace Mode Selection TXE1+ TXOC-
1
1
CE TXE1- TXOC+
0R0402-PAD TXE0+ TXO3- R9559 R9560
1
2
(R) (R) TXE0- TXO3+ 1KR2J-1-GP 1KR2J-1-GP
41 HDMI_HDCP_READY R9505 R79237 (R)
41 HDMI1_SDA (R)
10KR2J-3-GP 10KR2J-3-GP C9512
2
41 HDMI1_SCL VCCK_1V2 SCD1U16V2ZY-2GP
41 DDC_WP Remove
52 Interlace Mode Selection
2
2
1 2
4K7R2J-2-GP
4K7R2J-2-GP
4K7R2J-2-GP
4K7R2J-2-GP
4K7R2J-2-GP
(S)
R9517
R9528
R9521
R9524
R9544
41 HDMI1_D0-
AGND
41 HDMI1_D0+
(R) (R) (R) (S) (S)
41 HDMI1_D1-
1
41 HDMI1_D1+
41 HDMI1_D2- HDMI_5V PANEL_ON
41 HDMI1_D2+
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
41 HDMI1_CK+
1
SCA1 R9510 PANEL_OFF
41 HDMI1_CK-
10KR2J-3-GP
GPIO/PWM0/SD3/SPDIF3
GPIO/PWM5
GPIO/PWM4
GPIO#99/PWM3
GPIO/PWM2
GPIO/PWM1
GPIO/PWM0
TXE0-_8B
TXE0+_8B
TXE1-_8B
TXE1+_8B
TXE2-_8B
TXE2+_8B
TXEC-_8B
TXEC+_8B
TXE3-_8B
TXE3+_8B
PGND
PVCC
GPIO/TXO0-_8B
GPIO/TXO0+_8B
GPIO/TXO1-_8B
GPIO/TXO1+_8B
GPIO/TXO2-_8B/IIS_WS/SPDIF3
GPIO/TXO2+_8B/IIS_SCK/SPDIF2
GPIO/TXOC-_8B
GPIO/TXOC+_8B
GPIO/TXO3-_8B/IIS_MCK/SPDIF1
GPIO/TXO3+_8B/IIS_SD0/SPDIF0
VCCK
GPIO#72/PWM3
GPIO/SPDIF3/SD3/PWM1/PWM5
GPIO/SPDIF2/SD2/IICSDA
GPIO/SPDIF1/SD1/IICSCL
GPIO/SPDIF0/SD0
GPIO/MCK
GPIO/SCK
GPIO/PWM1/T2EX/WS
(R) PC_MONITOR_SW 24,56
41,52 DET_HDMI# PVCC_3V3
2
CONRTOL
2
HDMI_DET1
BLON_EN# 39,56
(R)
1
39,56 SCALAR_BKLT_CTRL R9529
4K7R2J-2-GP R9511 SHDN_MUTE_AP_CTL 24,56
20KR2J-L2-GP
39,56 BLON_EN#
1
(R)
C C
24,56 SHDN_MUTE_AP_CTL
2
39,56 SCALAR_BKLT_CTRL 103 64 HP_MUTE
PC_MONITOR_SW 104 GPIO/PWM1/SD2/SPDIF2/IICSCL/DVI_CTRL_OUT2 INT1/T2/SD0/SPDIF0/PWM0/PWM3/GPIO 63 C9513 2 1 SCD1U16V2ZY-2GP
RTD_PIN105 105 GPIO/SD1/SPDIF1/IRQB/IICSDA DVI_CTRL_OUT1/INT0/PWM2/GPIO 62 (S)
GPIO/SD0/SPDIF0/AUX_TXDATA PVCC PVCC_3V3_SDRAM
106 61 (S) C9525 2 1 SCD1U16V2ZY-2GP
PVCC_3V3_SDRAM PVCC PGND
2 1 107 60
FLASH_WP PGND VCCK SIO_UART1_RX_R SIO_UART1_RX VCCK_1V2
C9517 SCD1U16V2ZY-2GP 108 59 R9553 1 2 0R0402-PAD-2-GP
(S) 109 GPIO/MCK/AUX_OE TXD/DDCSDA1/GPIO 58 SIO_UART1_TX_R R9555 1 2 0R0402-PAD-2-GP SIO_UART1_TX
DP_HPD_SCALAR 110 GPIO/PWM2/INT0/SCK/AUX_D1 RXD/DDCSCL1/GPIO 57 EESDA
111 GPIO/INT1/WS/SD1 IICSDA/GPIO 56 EESCL
PANEL_ON 112 GPIO/T0/SD0/SPDIF0 IICSCL/GPIO 55 LCDVDD_EN1
SB add PANEL_OFF 113 GPIO/T1/SD1/WS/SPDIF1
GPIO/SD2/SCK/SPDIF2/AUX_D2
PWM1/PWM5/GPIO_USB
PWM4/GPIO
54 PWM_SW_EN
HDMI_HDCP_READY 114 53 HDMI_DET1
CLK 115 GPIO/PWM4/SD3/MCK/SPDIF3 USB_DDCSDA1/A-ADC3/GPIO 52 OSD_MENU
SDIN 116 SPI_SCLK/SDIO USB_DDCSCL1/A-ADC2/GPIO 51 OSD_UP
SDOUT 117 SI/MCU_SCLK A-ADC1/GPIO 50 OSD_DN
CE 118 SO/SCSB A-ADC0/GPIO 49
VCCK_1V2 RTD_PIN119 CEB/IRQB LS_ADC_VDD SCALAR_HP_OUT_R PVCC_3V3
C9506 2 1 SCD1U16V2ZY-2GP 119 48
(S) 120 GPO/PWM1/PWM5/SPDIF1
VCCK
PWM0/AUDIO_HOUTR/GPIO
AUDIO_HOUTL/SD0/GPIO
47 SCALAR_HP_OUT_L (S78.10523.5FL) Panel ID Selectiong
DP_AUXP_C R9527 1 2 0R0402-PAD RTD_PIN121 121 46 SCALAR_OUT_R C11368 2 1 SCD1U16V2ZY-2GP SCALAR_OUT_R_C
20121018 Ryan GPIO/DDCSCL3/AUX_CH_P1 AUDIO_SOUTR/MCK/GPIO
1
DP_AUXN_C R9530 1 2 0R0402-PAD RTD_PIN122 122 45 SCALAR_OUT_L C11369 2 1 SCD1U16V2ZY-2GP SCALAR_OUT_L_C C9524
HDMI1_SDA R9536 1 2 0R0402-PAD RTD_PIN123 123 GPIO/DDCSDA3/AUX_CH_N1 AUDIO_SOUTL/SCK/GPIO 44 RTD2482_VREF (S78.10523.5FL) SCD1U16V2ZY-2GP
20121204 aPisa -1 Charles HDMI1_SCL GPIO/DDCSDA2/AUX_CH_N0 PWM5/AUDIO_REF/SPDIF3/WS/GPIO
short pad R9546 1 2 0R0402-PAD RTD_PIN124 124 43 (S)
2
RTD_RESETB 125 GPIO/DDCSCL2/AUX_CH_P0 IICSDA/LINE_INR/GPIO 42 PVCC_3V3 PVCC_3V3 PVCC_3V3
RESET# IICSCL/LINE_INL/GPIO
1
39,56 BLON_EN# 126 41 EDID_RDY C9503 (S)
14MHZ_OUT_SCALAR XO 127 GPIO/PMW0/PWM1/SPDIF2/CEC GPIO#41 40 WP_PRO
XO GPIO#40 SC1U25V3KX-1-GP
1
XI 128 39 DDC_WP (S) (S) (S)
2
XI GPIO#39 R9539 R9537 R9538
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP
To AMP
2
PANEL_ ID2_S PANEL_ ID1_S PANEL_ ID0_S
DP_GND/TMDS_GND
eDP-IN 20121018 Ryan
DP_VDD/TMDS_VDD
R9547
14MHZ_IN_SCALAR SHDN_MUTE_AP_CTL
LANE3N/RXCN_0
LANE3N/RXCN_1
LANE3P/RXCP_0
LANE3P/RXCP_1
1 1MR2J-1-GP
2
LANE0N/RX2N_0
LANE1N/RX1N_0
LANE2N/RX0N_0
LANE0N/RX2N_1
LANE1N/RX1N_1
LANE2N/RX0N_1
LANE0P/RX2P_0
LANE1P/RX1P_0
LANE2P/RX0P_0
LANE0P/RX2P_1
LANE1P/RX1P_1
LANE2P/RX0P_1
TMDS_VCC1_2
(R)
13 CPU_DP_TXP0
TMDS_REXT
13 CPU_DP_TXN0
1
GPIO#31
GPIO#32
GPIO#33
GPIO#34
GPIO#35
GPIO#36
GPIO#37
(S) R9554
X9502
NC#21
NC#22
NC#24
NC#25
NC#26
NC#27
NC#28
NC#29
NC#30
13 CPU_DP_TXN1 10KR2J-3-GP
VD33
GND
13 CPU_DP_TXP1 (S)
PVCC_3V3 14MHZ_OUT_SCALAR_R 1 4
2
13 CPU_DP_AUXN RTD2586HD-CG-GP
13 CPU_DP_AUXP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
2
2 3
(S)
R9548
4K7R2J-2-GP (S78.27034.1FL) (S78.27034.1FL)
1
RTD_RESETB
DP_LANE0P_C
DP_LANE1P_C
DP_LANE0N_C
DP_LANE1N_C
(R)
1
SC10U10V5KX-2GP R9519
C9515 1 2
13 DP_HPD_N
(R) Monitor DET_HDMI# SCALAR_EN Panel EN/PWM/CTRL
2
TMDS_3V3 6K2R2J-1-GP
0 1 Active
HDMI1_CK+
HDMI1_D0+
HDMI1_D1+
HDMI1_D2+
HDMI1_CK-
HDMI1_D0-
HDMI1_D1-
HDMI1_D2-
R9531
PVCC_3V3 1 2 RTD_PIN2 DET_HDMI#
B 20121018 Ryan B
SHDN_MUTE_AP_CTL R9556 DET_HDMI# : connect to SIO and Scalar
6K2R2F-GP JD_HP R9551 R9542 PANEL_ON3 2 1 LPC_PME#
PM_SLP_S3#_R 1 2 PM_SLP_S3# PANEL_ON 1 2 PANEL_ON1
(S) To SIO: make scalar workable -> Scalar_EN 1(From SIO)
2
3
SMBUS_ISP
18 SMBUS_ISP
1
(S)
2
2
SCD1U16V2ZY-2GP
PTD_PIN119 (75.27002.E7C)
4
Pull Up--> Normal Mode 2010/02/24 3D3V_S0
1
Pull Down-> Scan Mode C9519
OSD
1
(S) C9511 (S) R9543
SCD1U16V2ZY-2GP SC4D7U6D3V3KX-GP 1 2 PANEL_ON2
2
53 OSD_MENU
2
53 OSD_UP 20121007 Charles 10KR2J-3-GP
53 OSD_DN Marge material
HDMI side:
HDMI0 => RX2 pair
HDMI1 => RX1 pair
HDMI2 => RX0 pair
52 SIO_UART1_RX
SIO_UART1_RX
SIO_UART1_TX
HDMICK => RC pair
52 SIO_UART1_TX
24,56 PC_MONITOR_SW
20121018 Ryan
CPU_DP_TXP0 1 2 DP_LANE0P_C
PC_MONITOR_SW CPU_DP_TXN0
(S)C9537 SCD1U10V2KX-5GP
DP_LANE0N_C
C9534 1 2 SCD1U10V2KX-5GP
According to the IR decode or side key (S)
value to switch the satus of monitor mode
CPU_DP_TXP1
CPU_DP_TXN1
(S)C9533 1
1
2
2
SCD1U10V2KX-5GP DP_LANE1P_C
DP_LANE1N_C
Firmware update by SMBUS
C9530 SCD1U10V2KX-5GP prevent leakage
and PC mode (S)
SMBUS_ISP SMBUS_ISP
EDID_RDY R9558 ISP_CLK1 SMB_DATA ISP_CLK1 PCH_DVI_DATA
16 EDID_RDY 3D3V_S0 5V_S0_PU_SCALAR 2
Michael 2011/12/01
1 5V_S0
, DVI使
PC Mode, 使 使 使 S0,
, 考 考 使 使 3D3V_S0
(R)
10KR2J-3-GP
4
PANEL_OFF_R 3D3V_S0 3D3V_S0 Q9501 Q9502
DP_HPD_N
2N7002KDW-GP 2N7002KDW-GP
1
(S75.27002.E7C) (S75.27002.E7C)
Panel On Off CTRL
1
R79170 R79171
3
1
1MR2J-1-GP 1MR2J-1-GP R9532
16,52 LPC_PME# (R) (R) R9533 10KR2J-3-GP
6
CPU_DP_AUXN C9643 1 2 SCD1U10V2KX-5GP DP_AUXN_1 C9644 1 2 SCD1U10V2KX-5GP DP_AUXN_C (S) SMBUS_ISP SMBUS_ISP
18 PANEL_OFF_R
2
CPU_DP_AUXP C9645 1 2 SCD1U10V2KX-5GP DP_AUXP_1 C9646 1 2 SCD1U10V2KX-5GP DP_AUXP_C Q9504 PCH_DVI_CLK R9534 1 2 47R2J-2-GP HDMI1_SCL
1
(75.27002.E7C)
1
2N7002KDW-GP
A A
R79172 R79173 (S) (S) 10KR2J-3-GP
PCH_DVI_DATA R9535 1 2 47R2J-2-GP HDMI1_SDA 3D3V_S0 3D3V_S0 3D3V_S0
1MR2J-1-GP 1MR2J-1-GP
(R) (R)
2
20121015 Ryan
2
1
(S)
1
PANEL_OFF 1
R79213
2 PANEL_OFF_1 SMBUS_ISP H :Simutaneous Mode Michael 2012/3/8 -A (R)
R9557
10KR2J-3-GP
(S)
R9540
R9541
4K7R2J-2-GP
15,27,28,37,52,53 PM_SLP_S3#
1KR2J-1-GP SMBUS_ISP L :Isolate Mode R3205 is add for tune
4K7R2J-2-GP
2
DP_HPD_SCALAR
(R)
equal length
2
JD_HP SMBUS_ISP ISP_CLK1 ISP_DAT1
22,24 JD_HP PWM_SW_EN
1
2
2
HP_MUTE Q9614
24 HP_MUTE
Wistron Corporation
2
(S75.27002.E7C)
JD_HP R79205 R79174 2N7002KDW-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
24 JD_HP
1
Title
1
F_HPO_R
F_HPO_L
MIC_VREFL
20130910 Ryan
MIC_VREFR TP9204 TPAD28
AGND
closed to codec
Analog Moat Digital Moat
SC2D2U10V3KX-1GP
C2912
ADU_LDO_CAP 1 2
AGND
1
D D
SC10U10V5KX-2GP
C2913 C2911
AUD_VREF 1 2SCD1U10V2KX-5GP AGND
2
C2936 1 2 (R)
AUD_CPVEE
L2904
V_5_CODEC
1 2
HD_LINK
1
C2904 AGND C2902
SC2D2U10V3KX-1GP C2928 MHC1608S601LBP-GP
2
1AUD_CBN
SC100P50V2JN-3GP
2 SC10U10V5KX-2GP SCD1U10V2KX-5GP
2
18 HDA_SDIN0 C2906 C2903 D8202
18 HDA_CODEC_SDOUT
1
SC10U10V5KX-2GP SCD1U10V2KX-5GP AUD_CBP AZ5125-01H-R7G-GP
2
18,39 HDA_CODEC_RST# C2933
18 HDA_CODEC_SYNC
(R) (R)
36
35
34
33
32
31
30
29
28
27
26
25
Analog Moat
18 HDA_CODEC_BITCLK
2
U2901 AGND
AGND
HP-OUT-L
CBN
HP-OUT-R
MIC1-VREFO-L
AVSS1
AVDD1
MIC1-VREFO-R
VREF
MIC2-VREFO
CBP
CPVEE
LDO-CAP
55 DMIC_DATA AGND
55 DMIC_CLK 5V_S0
1
L2913 37 24 LINE1_R
SC10U10V5ZY-1GP
1 2 AVSS2 LINE1-R
1
1
C2905 (68.00335.141) C2916 C2915 38 23 LINE1_L
SC10U10V5ZY-1GP C2917 AVDD2 LINE1-L AGND
18,23 HDA_SPKR SCD1U16V2ZY-2GP
MHC1608S181NBP-GP AUD_PVDD_1 39 22 FM_R_CODEC
2
2
PVDD1 MIC1-R
40 21 FM_L_CODEC
SCD1U16V2ZY-2GP SPK-L+ MIC1-L
41 20
(R) SPK-L- MONO-OUT R2906 20KR2F-L-GP
39 LINE1_R 42 19 JDREF_1 1 2
39 LINE1_L PVSS1 JDREF AGND
43 18
PVSS2 SENSE_B
C 44 17 C
SPK-R- MIC2-R
45 16
20130910 Ryan SPK-R+ MIC2-L
46 15
PVDD2 LINE2-R
1
(R) C2918 Combo Jack 47 14
MIC_VREFL 38,39 Combo Jack EAPD/COMBO_JACK LINE2-L
C2923 R2903 1 2 39K2R2F-L-GP JD_HP_R
39 MIC_VREFL MIC_VREFR SENSE_A
SC10U10V5ZY-1GP 48 13
39 MIC_VREFR
2 20130927 del MIC JD
2
SPDIFO SENSE_A
GPIO0/DMIC-DATA
F_HPO_R 49
GPIO1/DMIC-CLK
39 F_HPO_R F_HPO_L SCD1U16V2ZY-2GP GND
39 F_HPO_L
SDATA-OUT
SDATA-IN
DVDD-IO
PCBEEP
FM_L_CODEC
RESET#
BIT-CLK
Close to codec PIN46
Digital Moat
DVDD1
DVSS2
39 FM_L_CODEC
SYNC
P_SPKR_P1 1 R2919 2 HDA_SPKR
PD#
FM_R_CODEC
SC100P50V2JN-3GP
39 FM_R_CODEC
2
Vendor suggest Add 47KR2J-2-GP
1
C2921
10
11
12
ALC269Q-VC-GR-GP C2920 R2911
P_SPKR_P2 2 1 4K7R2J-2-GP
39 COMBO JACK
1
39 JD_HP_R L2912
SC1U16V3KX-2GP
1 2 +AUD_DVDD_1
3D3V_S0
1
1
MHC1608S601LBP-GP C2930 C2914 +DVDD-IO 3D3V_S0
SCD1U16V2ZY-2GP
1
C2919
2
SC10U10V5ZY-1GP 2 SCD1U16V2ZY-2GP
2
(R)
HDA_SDIN0_C
Sense A/B Follow Realtek SPEC C2935 1 2 SC100P50V2JN-3GP
DMIC_DATA
(R) DMIC_CLK HDA_CODEC_RST#
C2934 1 2 SC100P50V2JN-3GP
B HDA_CODEC_SYNC B
2 R2912 1 HDA_SDIN0
33R2J-2-GP
HDA_CODEC_BITCLK
HDA_CODEC_SDOUT
R2921 1 2 0R0402-PAD
A A
AGND
R2926 1 2 0R0402-PAD
<Core Design>
AGND
Wistron Corporation
R2922 1 2 0R0402-PAD R2923 1 2 0R0402-PAD 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Audio Codec
Size Document Number Rev
C
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 27 of 103
5 4 3 2 1
5 4 3 2 1
5V_S5_AMP
1
C9619
SC10U6D3V3MX-GP C3010
1
(A) SCD1U16V2ZY-2GP
2
MIC_IN_JACK
2
(A) U9608 (A) R79153
Combo Jack HP/MIC R79217
2K2R2J-2-GP LINE1_L C3054 2 1 SC1U10V2KX-1GPSPEAKER1_L1_R 1 R3044 2 AMP_L R161 R162 SPEAKER1_L1 13 12 ADC_FMT
10KR2J-3-GP
(R)
C11353 1 2 1 2 VINL FMT
75R2J-1-GP
2
ADC_FMT
1
SC100P50V2JN-3GP
AUDS1 (63.51234.1DL)
1
FM_L_CODEC C113521 2 (78.10224.2FL) 1KR2F-3-GP 1KR2F-3-GP SPEAKER1_R1 14 11 ADC_MD1
R79218 LINE1_R 1 SC1U10V2KX-1GPSPEAKER1_R1_R AMP_R VINR MD1
1
SC2D2U10V3KX-1GP L9517 C3056 2 1 R3043 2 5V_S5_AMP (R) (R) AGND
2
FM_R_CODEC C113541 2 MIC1 1 2MIC1* 1 2 MIC_IN_JACK NP2 R79152
NP1 75R2J-1-GP 1 2 ADC_3D3V_A ADC_VREF 1 10 ADC_MD0 10KR2J-3-GP
SC2D2U10V3KX-1GP FCM1608KFG-301T05-GP
(68.00335.091) 20121112 aPisa -1A Charles COMBO AGND (63.51234.1DL) L2907 VREF MD0 (A)
1KR2J-1-GP
1
7 FCM1608KFG-301T05-GP C9618 R79141 33R2J-2-GP
2
JD_HP ADC_DOUT AMP_DOUT
1
R79220 9 (A68.00335.091) SC10U6D3V3MX-GP C3009 2 9 1 2
R79219 F_HPO_SW_R 1 2 F_HPO_R* L9518 1 2 0R0603-PAD 8 (A) SCD1U16V2ZY-2GP AGND DOUT
Need caculate the result
2
22KR2J-GP 75R2J-1-GP F_HPO_R_C 3 (A) R79142 33R2J-2-GP
ADC_BCLK AMP_BCLK
Scalar Audio about the Vin for AMP AGND 3
VCC BCK
8 1 2
1
(R) R3045 (R) R3046 5V_S5_AMP 5V_S5_AMP
R79221 L2906
2
F_HPO_SW_L 1 2 F_HPO_L* L9519 1 2 0R0603-PAD F_HPO_L_C 2 AGND R79143 33R2J-2-GP
75R2J-1-GP 1 1KR2J-1-GP 1KR2J-1-GP 1 2 ADC_3D3V_D 4 7 ADC_LRCLK 1 2 AMP_LRCLK
P3P3V VDD LRCK
1
AGND C9617 R79144 33R2J-2-GP
41 SCALAR_OUT_R_C
2
0R0603-PAD-2-GP-U C3007 5 6 ADC_SCKI 1 2 AMP_SCKI R79155 R79156
41 SCALAR_OUT_L_C PHONE-JK516-GP SC10U6D3V3MX-GP
DGND SCKI
1
C11355 (78.10224.2FL) C11356(78.10224.2FL) (A) SCD1U16V2ZY-2GP 10KR2J-3-GP 10KR2J-3-GP
41 SCALAR_HP_OUT_R_2
2
CODEC
SC100P50V2JN-3GP SC100P50V2JN-3GP (A) (R) (A)
41 SCALAR_HP_OUT_L_2
D AGND AGND PCM1808PWR-GP D
R79222
2
1 2 ADC_MD1 ADC_MD0
COMBO JACK 1 2 COMBO L2905
1
FCM1608KFG-301T05-GP
(A68.00335.091) R79154 R79157
22KR2J-GP
1
AGND 10KR2J-3-GP 10KR2J-3-GP
C11357 (A) (R)
SC10U10V5KX-2GP
2
AGND
38 JD_HP_R
1
(A) C9630
Line Out Switch? SC4700P50V2KX-1GP SC4700P50V2KX-1GP
1
39,41 PC_MONITOR_SW SC1U25V3KX-1-GP C9620 C9622
1
U55 (A) (A) R79150 SC10U25V5KX-GP SCD1U25V2KX-GP
AMP_PLL_FLTP
AMP_PLL_FLTM
20130910 Ryan C9636 R79148 C9638 R79149
2
check SEL pin
AMP_VR_ANA
5V_S5_AMP 22KR2F-GP (A) (A)
2 AMP_VR_ANA_R1 2AMP_PLL_FLTM_R
1
1 (A) 1 2 1 1 2 (A) SC3300P50V3KX-1GP
TRI_STATE
2
2 R79168 C9632 (A)C9626
2
P3P3V GND 3 ADC_SCKI_R 1 2 33R2J-2-GP ADC_SCKI SCD033U50V3KX-1GP
PC_MONITOR_SW OUTPUT
SCD047U16V2KX-1-GP 470R2J-2-GP SCD047U16V2KX-1-GP 470R2J-2-GP (A)
2
1
1
4 (A) (A) (A) (A)
AMP_PLL_FLTM
AMP_PLL_FLTP
VDD
SPKR_OUT_L+
AMP_SSTIMER
SEL L:A1(MONITOR) H:A2(PC)
AMP_VR_ANA
C11358 C11359
AMP_OC_ADJ
1
AMP_BST_A
SC1U10V2KX-1GP SCD1U16V2ZY-2GP R79169
RESERVED ESD D3004
GVD_OUT
2
2
SW_SCKI
2
(A) (A) OSC-24D576MHZ-4GP C3016 1 (A) 2 33R2J-2-GP
R79223 (A) SCD1U16V2ZY-2GP
2
10KR2J-3-GP (A)
P3P3V U9612 (A73.74157.CHH)
MainSource0822 AGND
1
JD_HP_2 AMP_R 1 6 PC_MONITOR_SW
12
11
10
A2 SEL
1
2 5 U9609
SCALAR_OUT_R_C GND VDD SPEAKER1_R1
2
Enable Control 3 4 49
PLL_FLTM
GVD_OUT
VR_ANA
PLL_FLTP
AVSS
BST_A
PVDD_A
PVDD_A
OUT_A
OC_ADJ
SSTIMER
NC#8
A1 DA L9514 GND
R79224 83mA
1 2 AMP_AVDD 13
Low: Mute 10KR2J-3-GP Q9611 AGND
P3P3V AVDD
4
High: no-MUTE AZAW1210C-R7G-GP 48
AGND 0R0603-PAD-2-GP-U TP9203 PGND_AB
1
1 AMP_TESTOUT
1
U9613 (A73.74157.CHH) C9647 (R) C9634 14
JD_HP 2N7002KDW-GP MainSource0822 C3014 TPAD28-1-GP-U TESTOUT 47
SC10U6D3V3MX-GP
(75.27002.E7C) AMP_L 1 6 PC_MONITOR_SW ADC_SCKI 1 2 SCD1U16V2ZY-2GP (A) PGND_AB
3
A2 SEL
2
2 5 (A) AMP_SCKI 15
SCALAR_OUT_L_C GND VDD SPEAKER1_L1 (A) MCLK SPKR_OUT_L-
3 4 SC47P50V2JN-3GP (A) R79147 1 2 46
A1 DA 10KR2J-3-GP OUT_B
JD_HP_R 1 2 AMP_OSC_RES 16
AGND AZAW1210C-R7G-GP C9648 (R) R79145 (A) 18K2R3F-GP OSC_RES 45
PVDD_B 19V_AMP
1
AGND
SW_SCKI
1
1 2 17 C9624
DVSS 44 C9627 SCD1U25V2KX-GP
PVDD_B
2
EVGA_ON SC47P50V2JN-3GP SCD033U50V3KX-1GP (A)
39,41 PC_MONITOR_SW
2
AMP_VR_DIG 18 (A)
VR_DIG 43 AMP_BST_B
TAS5707 BST_B
AMP_PDN#_R
1
19
Line Out AMP_PDN# R3020 1 2 0R0603-PAD AMP_PDN#_R C3015 C9635 PDN#
BST_C
42 AMP_BST_C
1
SCD1U16V2ZY-2GP SC4D7U6D3V3KX-GP
2
(A) (A) R79146 AMP_LRCLK 20
10KR2J-3-GP LRCLK 41
C 5V_S5_AMP PVDD_C 19V_AMP C
(A)
AMP_BCLK 21
38 LINE1_R
2
SCLK
1
40
38 LINE1_L PVDD_C
1
C9628
AMP_DOUT 22 SCD033U50V3KX-1GP C9621 C9623
SDIN
2
39 SPKR_OUT_R+ SC10U25V5KX-GP SCD1U25V2KX-GP
OUT_C
2
(A) (A)
Reserved PD pin to scalar -- Kai 0514 SMBDAT2_SIO_R R79166 1 2 0R0402-PAD-2-GP SMBDAT2_AMP 23 (A)
CM 10/17 SDA 38
FM_L_CODEC PGND_CD
38 FM_L_CODEC
GVDD_OUT
SMBCLK2_SIO_R R79167 1 2 0R0402-PAD-2-GP SMBCLK2_AMP 24
FM_R_CODEC PC_MONITOR_SW SPEAKER1_L1 要要要SCALAR SCL 37
PVDD_D
PVDD_D
RESET#
38 FM_R_CODEC P3P3V
OUT_D
SCALAR_OUT_L_C PGND_CD
BST_D
STEST
AGND
AGND
DVDD
VREG
做POWER ON/OFF
DVSS
GND
AMP_L SPEAKER1_R1
2
SCALAR_OUT_R_C R7998
AMP_R CONTROL 10KR2J-3-GP TAS5707PHPR-GP-U
25
26
27
28
29
30
31
32
33
34
35
36
EC_AMP_RST (A)
AMP_PDN# 36 EC_AMP_RST
(A)
AMP_BST_D
MIC_VREFL AMP_RESET#
GVDD_OUT
AMP_VREG
38 MIC_VREFL MIC_VREFR
SPKR_OUT_R-
38 MIC_VREFR AMP_RESET#
F_HPO_R
38 F_HPO_R
D
F_HPO_L
38 F_HPO_L
HDA_CODEC_RST#
20130910 Ryan DEL SPDIF SPDIF Power AGND AGND Q88
1
2N7002
18,38 HDA_CODEC_RST# G SOT-23 83mA C9629
(A84.2N702.J31) SCD033U50V3KX-1GP
P3P3V
2
(A)
1
C9631
SMBCLK2_SIO_R
1
C9633
36 SMBCLK2_SIO_R
20130910 Ryan
P3P3V
HP Out Switch PC_MONITOR_SW C3012 SC10U6D3V3MX-GP
SC1U25V3KX-1-GP
(A)
2
SMBDAT2_SIO_R SCD1U16V2ZY-2GP (A)
36 SMBDAT2_SIO_R 19V_AMP
2
OE#: H:disable, L:Enable (A)
ESD
1
1
1
D3001 S L:0 H: 1 C9625
C3018 C3011 SCD1U25V2KX-GP
2
COMBO 1 SCD1U16V2ZY-2GP L:Monitor H: PC SCD1U16V2ZY-2GP (A)
2
HP_MUTE (A)
41 HP_MUTE SPKR_OUT_L+ R3054 1 LM48901_R_OUT1+
3 U9611 2 FCM2012KF-3-GP
AMP_PDN# JD_HP F_HPO_R
1
2 AGND 1 10 SPKL1
36 AMP_PDN# F_HPO_L V+ NO2 F_HPO_SW_R
2 9 C3049
F_HPO_SW_L NO1 COM2 SCALAR_HP_OUT_R_2
5
3 8 SC470P50V3JN-2GP
COM1 NC#8
2
AZ5125-02S-R7G-GP SCALAR_HP_OUT_L_2 4 7
PC_MONITOR_SW 5 NC#4 IN2 6 1
(R) IN1 GND SPKR_OUT_L- R3055 1 2 FCM2012KF-3-GP LM48901_R_OUT1-
D3002 2
1
TS5A22364DGSR-1-GP 3
F_HPO_R_C 1 AGND C3073 4
SC470P50V3JN-2GP
2
3
6
F_HPO_L_C 2 SPKR_OUT_R+ R3056 1 2 FCM2012KF-3-GP LM48901_R_OUT2+ ACES-CON4-35-GP-U
1
AZ5125-02S-R7G-GP AGND C3050
(R) SC470P50V3JN-2GP
2
F_HPO_L F_HPO_SW_L
1
B C3074 B
SC470P50V3JN-2GP
2
POP Circuit Rear
Control by software driver and CODEC GPIO. MUTE Q3023
Mute Circuit Delete AMP mute circuit,
GPIO driving low at: (R)
LINE1_R_2* AGND
1 6 AMP_R
the mute function change to EC
1 R3053 2 2
1).Initial state DIGITAL ANALOG 5 --Kai 0308
2).Suspend to S1 1KR2J-1-GP AMP_L 3 4 5V_S5_AMP
Add AMP mute circuit,--Kai 0314
AGND
3).Resume from S1.
MBT3904DW1T1G-2-GP
(R84.02444.01F)
P3P3V
3D3V_S0
2
R3014
(R)
OBS--Kai 0311 L: No-Mute
R3059 3D3V_S0 P3P3V
MUTE_2 LINE1_L_2* H: Mute
10KR2J-3-GP MUTE 1 2 1 R3052 2
G
(R)
C
2
R3050 1KR2J-1-GP
1
0R0603-PAD-1-GP-U
E
(R84.2N702.J31) 220KR2J-L2-GP Low: Mute H: No-Mute C3004 2 1 SCD1U16V2ZY-2GP (R) C3006 2 1 SCD1U16V2ZY-2GP (R)
C
SCD1U16V2ZY-2GP
1KR2J-1-GP (R) LMBT3906LT1G-1-GP R519 R520
C
(R) (R)
(R)
Follow Pisa--Kai 0315 Control circuit
1
L: Enable
(R) P3P3V 3D3V_S5
SIO_AUDIO_MUTE 1 2 SIO_AUDIO_MUTE_R H: Disable(Mute) C3004 from 0 ohm to unmount-- Kai 0611
20130910 Ryan R3048 1KR2J-1-GP AGND
3.3_POP
P3P3V (R) 5
A
R3047 R3073 1KR2J-1-GP F_HPO_L 3 4 AGND
noise AGND
A
1KR2J-1-GP 1KR2J-1-GP
(R) (R) MBT3904DW1T1G-2-GP
2
R3034
10KR2J-3-GP
select MUTE in the PC mode or
(R) Monitor mode
HP_MUTE_1 1 R3069 2
1
MUTE_1 (R)
1KR2J-1-GP
OBS--Kai 0311 MUTE_AP_CTL also control when
Q3009 system wake from S3 to S0
Audio only used 2444--Kai 0508
6
(R75.27002.E7C) AGND
2N7002KDW-GP
<Core Design>
1
Title
HP_MUTE P3P3V
Audio AMP
Size Document Number Rev
Custom
PIM86L-Florence 1
Follow Pisa--Kai 0315 Date: Monday, March 03, 2014 Sheet 28 of 103
5 4 3 2 1
5 4 3 2 1
HDMI-IN
EMI/ESD near Connector EMI/ESD near Connector
HDMI_5V
Connector
1
3D3V_A 20130930 vender suggest
R5218
HDMI 1KR2J-1-GP
1
R5216
2
D5203 HDMI_HDCP_READY
41,50 HDMI1_D2+ HDMI1_D0- HDMI1_D0+
10KR2J-3-GP
20
22
D 41,50 HDMI1_D2- HDIN1 HDMI1_D0+ 1 D
2
HDMI1_D2+_C 1 HDMI1_CK- HDMI1_CK+ HDMI1_D0- 2 3
41,50 HDMI1_D1+
2
2 HDMI1_CK+ 4 8 DET_HDMI#
41,50 HDMI1_D1-
2
HDMI1_D2-_C 3 HDMI1_CK- 5
HDMI1_D1+_C 4 R5206 R5207 R5208 R5204
41,50 HDMI1_D0+ 5 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 6 9
41,50 HDMI1_D0-
1
HDMI1_D1-_C 6 (R) (R) (R) (R) 7 10
1
HDMI1_D0+_C 7 U5202
1
41,50 HDMI1_CK+ 8 SP3010-04UTG-GP
41,50 HDMI1_CK- AZ23C6V2-1-GP
HDMI1_D0-_C 9
R5215 1KR2J-1-GP HDMI1_CK+_C 10
DET_HDMI_C (R)
2 1 11
36,41,50 DET_HDMI#
3
HDMI1_CK-_C 12
13
14
HDMI_SCL_IN 15
HDMI_SDA_IN 16
36,41,50 DET_HDMI# 17
18
HDMI_HPDET 19
41 DDC_WP HDMI_5V SKT-HDMI19P-57-GP
41,50 HDMI1_SDA
21
23
41,50 HDMI1_SCL HDMI_5V
D5204 HDMI_SCL_IN
41 HDMI_HDCP_READY
2
(62.10078.641)
C5205 HDMI1_D2- HDMI1_D2+ HDMI1_D1- 1
SCD1U16V2ZY-2GP HDMI1_D1+ 2 3 HDMI_SDA_IN
1
HDMI1_D1- HDMI1_D1+ HDMI1_D2- 4 8
(R) HDMI1_D2+ 5
1
2
2
2
R5219 6 9 U5203
HDMI_HDCP_READY 2 1 100R2J-2-GP R5205 R5203 R5201 7 10 AZ23C6V2-1-GP
R5202 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP
10KR2J-3-GP(R) (R) (R) (R) SP3010-04UTG-GP
1
1
3
(R)
C
20130910 Ryan C
5V_S0 5V_S5_AMP
1
R5217
HDMI_CLK & DATA level shift
0R0402-PAD
don't need from Scalar
2
D5201
DDC5V_HDMI_R 2
DDC5V_HDMI
mount R5209--Kai 0514
3 DDC5V_HDMI
HDMI_5V
1
SCD1U16V2ZY-2GP
R5214 R5213 R5209
BAT54C-12-GP
1
D5202
C5203
4K7R2J-2-GP
4K7R2J-2-GP
10KR2J-3-GP
(75.00054.T7D)
2
U5201
(R)
8 1
1
BZX84-C6V8-GP (64.10015.6DL) (64.10015.6DL) DDC_WP_1 7 VCC A0 2
B HDMI_SCL_IN R5210 1 2 47R2J-2-GP 6 WP A1 3 B
HDMI_SDA_IN R5211 1 2 47R2J-2-GP 5 SCL A2 4
SDA GND
1
(R) (R) AT24C02C-SSHM-T-GP
C5206 C5207
41,50 HDMI1_SDA
41,50 HDMI1_SCL
2
SC33P50V2JN-3GP
SC33P50V2JN-3GP
R5212 1 2 100R2J-2-GP DDC_WP
1
C5201 C5202
DUMMY-C2
DUMMY-C2
2
TR5201 TR5202
4 3 HDMI1_D2-_C 4 3 HDMI1_D0-_C
41,50 HDMI1_D2- 41,50 HDMI1_D0-
1 2 HDMI1_D2+_C 1 2 HDMI1_D0+_C
41,50 HDMI1_D2+ 41,50 HDMI1_D0+
DLM11SN900HY2L-GP DLM11SN900HY2L-GP
(68.10129.201) (68.10129.201)
TR5204
TR5203 4 3 HDMI1_CK-_C
HDMI1_D1-_C 41,50 HDMI1_CK-
4 3
41,50 HDMI1_D1- HDMI1_CK+_C
41,50 HDMI1_CK+ 1 2
1 2 HDMI1_D1+_C
41,50 HDMI1_D1+
DLM11SN900HY2L-GP
A DLM11SN900HY2L-GP (68.10129.201) A
(68.10129.201)
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
HDMI IN
Size Document Number Rev
C
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 29 of 103
5 4 3 2 1
5 4 3 2 1
31 MDI0+
31 MDI0-
31 MDI1+
31 MDI1-
31 MDI2+
31 MDI2-
31 MDI3+
Change LAN IC--Kai 0305 V_3P3_LAN Close To U3201 Pin 11,32.
R3122
V_3P3_LAN_REG
1
V_1P05_LAN
31 SPEED_100*_L R3117
1
C3116 C3117 C3110 C3118
C3107
SC4D7U10V3KX-GP
SC4D7U10V3KX-GP
1 2 (R) C3109
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
2
(R) SC4D7U6D3V3KX-GP SCD1U16V2ZY-2GP
2
31 LINK*_ACTIVITY_L
LAN_XTAL2
LAN_XTAL1
LAN_EEDO 1 R3129 2 0R0402-PAD SPEED_1000*_L
LAN_RSET
2K49R2F-GP
D D
V_3P3_LAN SPEED_100*_L
R3140
LAN_EESK 1 2 LINK*_ACTIVITY_L
510R2F-L-GP
should reduce the components of
C3118, C3119, C3101 & C3103
Vendor suggestion--Kai 0313
32
31
30
29
28
27
26
25
U3101
Exchange Pin 25 and Pin 27--Kai 0315 Reserve C3110,C3118 fot lan surge--Kai 0315
LED1/GPO
RSET
AVDD33
AVDD10
CKXTAL2
CKXTAL1
LED0
LED2
33
GND
CLOCK
22 CLK_PCIE_LAN V_3P3_LAN_REG
V_1P05_LAN
22 CLK_PCIE_LAN#
MDI0+ 1 24 LAN_REGOUT
MDI0- 2 MDIP0 REGOUT 23 AVDD33_REG
3 MDIN0 VDDREG 22
AVDD10 DVDD10 PCIE_WAKE_N_LOM V_1P05_LAN
MDI1+ 4 21
MDI1- 5 MDIP1 LANWAKE# 20 RTL_ISOLATE_N
MDI2+ 6 MDIN1 ISOLATE# 19 PLTRST_LAN
PCI-E MDI2- 7 MDIP2 PERST# 18 PCIE_RXN_LAN_C SCD1U10V2KX-5GP 2 1 PCIE_RXN6
8 MDIN2 HSON 17 PCIE_RXP_LAN_C C3105 2
SCD1U10V2KX-5GP 1 PCIE_RXP6
22 PCIE_TXP6 AVDD10 HSOP C3106
22 PCIE_TXN6
22 PCIE_RXP6
REFCLK_N
REFCLK_P
CLKREQ#
22 PCIE_RXN6
PCIE_CLK_LAN_REQ#
AVDD33
V_1P05_LAN
MDIN3
22 PCIE_CLK_LAN_REQ#
MDIP3
HSIN
HSIP
Close To U3201 Pin 3, 8,30,22.
L3101
(71.08111.Y03) LAN_REGOUT 1 2
9
10
11
12
13
14
15
16
GPIO COIL-4D7UH-13-GP
1
(68.4R710.20S) C3113 C3111 C3122 C3123
1
MDI3+
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
LAN_CLKREQ_N
2
MDI3- C3104 C3108
C SC4D7U6D3V3KX-GP SCD1U10V2KX-5GP C
2
V_3P3_LAN
1
C3114 C3112
SC1U10V3ZY-6GP
SCD1U16V2ZY-2GP
2
2
PCIE_CLK_LAN_REQ# R3127 1 (R) 20R2J-2-GP LAN_XTAL1
PCIE_TXP6
PCIE_TXN6
CLK_PCIE_LAN
CLK_PCIE_LAN# X3101 20131128 change X3101 SMT Close To U3201 Pin 22.
Reserve for
3 2
RTL8111G/GS/GA
(R)
(R)
4 1 LAN_XTAL2
XTAL-25MHZ-181-GP
1
C3102 C3115
SC22P50V2JN-4GP SC22P50V2JN-4GP
2
(78.27034.1FL)
V_3P3_LAN
3D3V_S0
1
R3106 PCIE_WAKE_N_LOM R3105 2 (R) 1 10KR2J-3-GP
1KR2J-1-GP
2
RTL_ISOLATE_N
1
3D3V_S0
R3116
Lan Power AO3419 PMOS 3.5A 15KR2F-GP
LAN_CLKREQ_N
R3118
1 2
10KR2J-3-GP
2
3D3V_S5
R3139
0R0805-PAD-2-GP-U
2
A A
soldering Mask-- 20140115
<Variant Name>
2010/05/10 V_3P3_LAN
For NMOS solution
84.03418.031
84.00359.C31 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Lan RTL8111GA
Size Document Number Rev
Custom
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 30 of 103
5 4 3 2 1
5 4 3 2 1
30 MDI0+
30 MDI0-
30 MDI1+
30 MDI1- V_3P3_LAN
XF1
24
30 MDI2+ MDI3-_C
MDI3- 23 1:1 2
30 MDI2-
LAN1
14
30 MDI3+ SPEED_100*_L1
30 MDI3- 9
1 MCT4 -
GREEN
Pin1 TX_D1+ + 10 LAN_SPEED
+
30 SPEED_1000*_L ORANGE
SPEED_1000*_L1
30 SPEED_100*_L Pin2 TX_D1- - 11
MDI1+ 16 9 MDI1+_C
2
XRF_TDC1 15
2
MDI0- 14 1:1 11 MDI0-_C D3101
R3104 R3103 C3121 AZ5125-01H-R7G-GP
1
(R) (R) (R)
330R2J-3-GP
330R2J-3-GP
SCD1U16V2ZY-2GP
(R)
10 MCT1
2
LAN surage solution
R3130
1
1
C3130
MDI0+ 13 12 MDI0+_C LAN_LED_ACT 1 2
SCD1U10V2KX-5GP
2
XFORM-24P-27-GP 0R0402-PAD
XRF_TDC1
C (68.89241.30A) C
R3101
SPEED_1000*_L1 1 2 SPEED_1000*_L
R3102
XF1 from 68.89240.30E change to 68.89241.30A 510R2F-L-GP
2
SPEED_100*_L1 1 2 SPEED_100*_L
C3131 for EMI--Kai 0613
SC1KP50V2JN-2GP 510R2F-L-GP
1
(R)
330 ohm change to 510 ohm--Kai 0315
MCT3
MCT4
MCT1
MCT2
SPEED_1000*_L
MDI0+
MDI1+
MDI2+
MDI3+
MDI0-
MDI1-
MDI2-
MDI3-
1
Link Act C66
SC1KP50V2KX-1GP
2
2
1
75R3J-L-GP
75R3J-L-GP
75R3J-L-GP
75R3J-L-GP
R3142 R3144 R3145 R3146
Giga 100 10 SPEED_100*_L
EC3101 EC3102 EC3103 EC3104 EC3105 EC3106 EC3107 EC3108
1
1
SC6D8P50V2CN-GP
SC6D8P50V2CN-GP
SC6D8P50V2CN-GP
SC6D8P50V2CN-GP
SC6D8P50V2CN-GP
SC6D8P50V2CN-GP
SC6D8P50V2CN-GP
SC6D8P50V2CN-GP
1
Link Orange Green
2
C67
SC1KP50V2KX-1GP
PCB
2
MCT_R
Act Blink Blink Blink
1
C3129
For EMC--Kai 0515
SC1KP2KV6KX-GP
2
B B
ESD
MCT1
MCT2
MCT3
MCT4
Lan Surge
U3108 U3109
L3103
MDI0-_C 4 3 MDI0-_R MDI2- 1 6 MDI3+ MDI0- 1 6 MDI1+
I/O1 I/O4 I/O1 I/O4
MDI0+_C 1 2 MDI0+_R 2 5 2 5
GND VDD 5V_S5 GND VDD 5V_S5
1
GDT1 GDT2 GDT3 GDT4
COIL-90OHM-100MHZ-5-GP MDI2+ 3 4 MDI3- MDI0+ 3 4 MDI1-
I/O2 I/O3 I/O2 I/O3
GT1206-200ASMD-GP
GT1206-200ASMD-GP
GT1206-200ASMD-GP
GT1206-200ASMD-GP
AZC099-04S-1-GP AZC099-04S-1-GP (R) (R) (R) (R)
L3104 (R) (R)
2
MDI1-_C 4 3 MDI1-_R
MDI1+_C 1 2 MDI1+_R
COIL-90OHM-100MHZ-5-GP
L3105
MDI2-_C 4 3 MDI2-_R
MDI2+_C 1 2 MDI2+_R
Unmount U3108 and U3109--Kai 0308
A COIL-90OHM-100MHZ-5-GP
OBS--Kai 0311 A
L3102
MDI3-_C MDI3-_R <Variant Name>
4 3
MDI3+_C 1 2 MDI3+_R
Wistron Corporation
COIL-90OHM-100MHZ-5-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
RJ45+Transformer
Size Document Number Rev
C
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 31 of 103
5 4 3 2 1
5 4 3 2 1
22 USB_PN6
(MS/SD/MMC)
22 USB_PP6
L6302
USB_PP6 1 2 USB_PP6_R
USB_PN6 4 3 USB_PN6_R
MCM1012B900FBP-GP-U
(R66.R0036.04L)
SP10
SP9
SP7
20131011 Ryan
D D
24
23
22
21
20
19
U3201
NC#24
SP10
SP9
SP8
SP7
SP6
USB30_VCCA
C3210 2 1 SC1U10V3ZY-6GP V_1P8_CR 1 18 CR_SP5
R3203 2 1 6K2R2F-GP CR_REF_C 2 AV18 SP5 17
USB_PN6_R 3 RREF SP4 16 CR_SDREG C3204 1 2 SC1U10V3ZY-6GP
USB_PP6_R 4 DM SDREG 15
C11374 1 2 SCD1U16V2ZY-2GP CR_A3V3 5 DP MS_INS# 14
6 A3V3 SP3 13 SP2
5V_IN SP2
CARD_3V3
SD_DAT1
SD_CD#
GPIO
D3V3
SP1
1
1
C3208 25
GND
SCD1U16V2ZY-2GP
C3211
SC4D7U6D3V3KX-GP
RTS5143-GRT-GP
2
7
8
9
10
11
12
CR_D3V3
SD_DAT1
SD_CD#
SP1
V_3_CARD
C11375 1 2 SCD1U16V2ZY-2GP
1
(R) C11377
C SC5P50V2CN-2GP C
2
2IN1 (SD/MMC) Combo Net
20130910 Ryan
SP1 SD_WP
SP2 SD_DAT0
V_3_CARD
2IN1 CONN (SD/MMC)
CR1
SD_CLK
20MILS 4 10 SD_CD#
SP5
VDD CARD_DETECT 11 SD_WP
WRITE_PROTECT
1
1
SC4D7U6D3V3KX-GP
DAT2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SD_DAT3 1 3
CD/DAT3 VSS
SCD1U16V2ZY-2GP
VSS
SD_CMD 2 12 SP10 SD_DAT2
SD_CLK 5 CMD GND 13
CLK GND
CARDBUS11P-SKT-GP
B (62.10051.H51) B
A A
<Variant Name>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
D D
C C
B B
<Variant Name>
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
VCC5_USB
20130927 Ryan
USB Port12 -> WEB CAM DCBATOUT
Q6102
1 2 USB_EN1 E LMBT3906LT1G-1-GP
C USB_EN3
22 USB_PP12
R6102 47KR2J-2-GP
22 USB_PN12
1
R6105 R6106
B
CAM1 1 2 USB_EN2 47KR2J-2-GP 1KR2J-1-GP C6103 3D3V_S5
SCD1U50V3KX-GP
9 R6103 330KR2J-L1-GP
3D3V_USB 1
2
D VCC5_CAM L9515 D
1
1
USB_PN12 1 2 USB_PN12- 2 USB_PP12+
F6303 (R) 3 USB_PN12- R6104
D
1 2 USB_PP12 4 3 USB_PP12+ 4 100KR2J-1-GP
VCC5_CAM
5 DMIC_CLK Q6103
DMIC_CLK 38 AO3418L-GP
POLYSW-2A6V-GP COIL-90OHM-100MHZ-5-GP 6
2
1
1
3D3V_S5 C6303 C6304 7 DMIC_DATA G
USB_EN4
USB_EN5
(66.R0036.04L) DMIC_DATA 38
8 3D3V_USB
SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP
10
S
2
2
F8203
1 2 JWT-CON8-7-GP
POLYSW-2A6V-GP (20.F0765.008)
4
3D3V_S5
Q6101
20130927 Ryan
1
2N7002KDW-GP
(75.27002.E7C) R6108
10KR2J-3-GP
2
R6107 USB_EN_R
1 2 USB_EN6
20,36,60 PM_SLP_S4#
D
4K7R2J-2-GP
Q6104
2N7002-7F-GP
G
(84.2N702.J31)
S
USB_EN 45,55
1
R6109
100KR2J-1-GP
2
3D3V_IR 3D3V_A
F8201
1 2
22 USB_PP7
22 USB_PN7
1
C8207 POLYSW-1D5A8V-GP-U2
C SC1U16V3KX-2GP C
2
VCC5_TOU
VCC5_TOU
TOUCH1
6 3D3V_IR IRBD1
1 4
L6303 1
2010/06/09 USB_PN7 1 2 USB_PN7_7- USB_PN7_7- 2
1
5 5
2
VCC5_USB_018 COIL-90OHM-100MHZ-5-GP 7
20130927 Ryan (66.R0036.04L) CLX-CON3-5-GP
JWT-CON5-19-GP
(21.D0368.105)
0R0805-PAD-2-GP-U 2 1 PR9984
1
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
TC6301 4 4 4
R6317 ST100U6D3VBM-5GP 6 6 6
2
10KR2J-3-GP (R77.21071.07L)
2
2
USB_OC_018_N SKT-USB-369-GP SKT-USB-369-GP SKT-USB-369-GP
(22.10218.Q51) (22.10218.Q51) (22.10218.Q51)
1
C6314
SCD1U16V2ZY-2GP
2
22 USB_OC_018_N
22 USB_PP0
22 USB_PN0
22 USB_PP1
22 USB_PN1
L6305 L6307 L6306
USB_PN0 3 4 USB_PN0_0- USB_PN1 4 3 USB_PN1_1- USB_PN8_8- 4 3 USB_PN9
VCC5_USB_018 VCC5_USB_018
1
(R)
1
(R) C6301
C6302 SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Rear USB/TOU/Dongle/Web Cam
Size Document Number Rev
Custom
PIM86L-Florence 1
Date: Monday, March 03, 2014 Sheet 34 of 103
5 4 3 2 1
5 4 3 2 1
SCD1U10V2KX-5GP
5V_CHARGER
TR6202
Hign ACTIVE TYPE!! USB30_VCCA USB30_RP3_R 1 2 USB30_RP1
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
5V_S5 U6201
C6211
C6212
1
1
D USB30_RN3_R USB30_RN1 D
C6213
100 mil 4 3
1
1
2 GND OUT#8
8
7 COIL-50OHM-GP
Add R79288 for 3D3V_S5 leagare R6218 U6202
--Ryan 11/24
2
3 IN#2 OUT#7 6
IN#3 OUT#6 (66.R0036.04L) 10KR2J-3-GP
1
4 5 C6201 C6203 1 12
EN/EN# OCB IN OUT
1
C6202 (R)
SC10U10V5ZY-1GP
2
SC1U10V3ZY-6GP R79288 2 1 0R2J-2-GP OC_3# 13 11 USB_PN2_RR
SCD1U16V2KX-3GP
22 OC_2#
2
SY6288CCAC-GP TR6203 FAULT# DM_IN 10 USB_PP2_RR
2
1
SCD1U16V2ZY-2GP 36 USB_CHARGER_CTL1 6
CTL1
RN6209
1
R6219 1 210KR2J-3-GP 36 USB_CHARGER_CTL2 7 14
8 CTL2 GND 17 R6223 R6222
36 USB_CHARGER_CTL3
2
CTL3 GND
20KR2F-L-GP
31K6R2F-GP
TR6207
USB_PN2_R 4 3 USB_PN2_RR (64.24925.6DL)
TPS2540ARTER-GP
USB3.0 CONNECTORFROM Co-lay
2
USB_PP2_R 1 2 USB_PP2_RR Charger
COIL-90OHM-100MHZ-5-GP (74.02544.073) (64.24925.6DL)
2
R6203 R6225
1
0R0805-PAD-2-GP-U 0R2J-2-GP
USBR4 R79290 R6220 (R)
10 TR6205 10KR2J-3-GP 10KR2J-3-GP
2
1
USB30_TP4_R 9 USB30_RN4_R 1 2 USB30_RN2 (R)
AUSB2_PWR
AUSB2_PWR 1 C11397 C11398
2
C USB30_RP4_R 4 3 USB30_RP2 ILIM_SEL C
1
USB30_TN4_R
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
8
1
USB_PN3_R 2 COIL-50OHM-GP
7 (66.R0036.04L) R6224
2
2
USB_PP3_R 3 10KR2J-3-GP
1
USB30_RP4_R 6 (R)
4 TC6202
2
USB30_RN4_R 5 ST100U6D3VBM-5GP
2
11 (R77.21071.07L)
SKT-USB11-40-GP
TR6206
(22.10341.K51) USB30_TN4_R 1 2 USB30_TN4_C
TR6208
USB_PN3_R 4 3 USB_PN3 S0 High High High High
USBS1
10 USB_PP3_R 1 2 USB_PP3 S3 0 1 1 1 ATX_5VSB DCP
USB30_TP3_R 9 S3 Low High High High
AUSB1_PWR 1 COIL-90OHM-100MHZ-5-GP
S4 0 1 1 1 ATX_5VSB DCP
USB30_TN3_R 8 S4 Low High High High
USB_PN2_R 2
7
S5 0 1 1 1 ATX_5VSB DCP
AUSB1_PWR
SKT-USB11-37-GP
TC6201 (22.10254.791)
ST100U6D3VBM-5GP
2
(77.21071.07L)
layout cautions: R6209 & R6210
should be close to AUSB1
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
ANNIE solution
AD_JK_S
DCIN1
2 1
2
4 3 PC3803
K
SCD1U50V3KX-GP
6 5
8 7 D3803
1
10 9 P6SBMJ24APT-GP
(83.P6SMB.HAG)
ACES-CONN10D-4-GP-U
A
AD_JK_S_R
SIZE 2512
0.1OHM 2W GAIN1= VO/(V2-V1)=R2/R1
PC3807 1 2 SC100P50V2JN-3GP
AD_JK_S PR3810 1 2 D01R2512F-3-GP
(64.R1005.97L)
PR9994 1 2 D01R2512F-3-GP
1
PR3820 1 2 1MR3F-GP OCP_2
(64.R1005.97L) PC9990
Change PR3810 to 0.1ohm SCD1U50V3KX-GP
R2
2
AD_JK_S_R DCBATOUT
Add PR9994
PU3802
--Ryan 0303
1 8 AD_JK_S_R
2
S
S
D
D 7
Add PC9989 GAIN2= 1+R2/R1
3 S D 6 --Ryan 0113
PWR_AD+_2 4 G D 5
1
1
V1
4
AO4407AL-GP (R) PR3809 (R) PR3811
2
8
C 20KR2J-L2-GP 20KR2J-L2-GP PR3818 1 2 OCP_0 2 LM358DR2G-GP C
(R)
-
1 5 U3801B
PR3807 PU3804 100KR2F-L1-GP + VO
1
2 S D 7 OCP_4
PC3805
SC1U50V5ZY-1-GP-U 3 S D 6 V2 100KR2F-L1-GP U3801A
LM358DR2G-GP
6
-
1
8
4 G D 5 (74.00358.X11) (74.00358.X11)
4
AO4407AL-GP
R1 R1 2 -
1
1
1
1
PR3808 PR3821 3 +
100KR2J-1-GP 1MR3F-GP PC3808 PR3882 1 2 U3802A
8
(74.00358.X11)
2
2
1MR3F-GP AD_JK_S_R AD_JK_S_R
R2
2
AD_JK_S_R
1
OCP_5
PC9989
1
Change PC3808 0.1U25V to 0.1U50V SCD1U50V3KX-GP
2
--Ryan 0113
PR3824
8K2R2F-1-GP 3.3K voltage (R)
division is 4.3 A PC9989 close to U3802PIN8
(U64.60415.6DL,G64.82015.6DL) --Ryan 0113
8
LM358DR2G-GP
OCP_3 5 U3802B
+ ADP_OCP
0R2J-2-GP 7
R79264 1 (G) 2 5V_CMP 6
5V_S5 - H_PROCHOT_N 11,63
1
0R2J-2-GP
PR3825 3D3V_S5 R79265 1 23V3_CMP (74.00358.X11)
4
1
15KR2F-GP (U)
1
PC3809
SCD1U16V2KX-3GP PR9985 PC3810
1
100KR2F-L1-GP SCD1U16V2KX-3GP
2
(R) PR3829
15KR2F-GP
D
2
B AD_JK_S_R B
Q3803
2
2N7002A-7-GP
OCP_7 G (84.2N702.J31)
1
R79264: OCP 135W PR3826
R79265: OCP 90W
1
100KR2F-L1-GP
S
PR3828
15KR2F-GP
2
OCP_6
2
1
PR3827
100KR2F-L1-GP
2
Q3801
4
2N7002KDW-GP
(75.27002.E7C)
3
13,20,36,51 S0_PWR_GOOD
A A
HR PX
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DCIN JACK
Size Document Number Rev
C
PIM86L-Florence 1
Date: Monday, March 03, 2014 Sheet 36 of 103
5 4 3 2 1
5 4 3 2 1
3D3V_S5
Power Sequence
2
R3615
10KR2J-3-GP 3D3V_S5
(R)
2
From short pad to 0 ohm,Reserved for sequence --Kai 0723 R3614
ALL_SYS_PWRGD3V_150MS
10KR2J-3-GP
(R)
R3613
Reserve for
1
0R0402-PAD VCORE_PWRGD
D
63 VCORE_PWRGD R3617 1 2 SYS_PWROK 20
PCH_PWRGD_AND
SYS_PWROK_R 1 2SYS_PWROK
system power D
D
0R0402-PAD-1-GP
1
D3601 C3605
R3614
1
CRB : 1K
Q3608 Q3610
ok
4
SCD01U50V2KX-1GP
(R) 2N7002A-7-GP
2
3 G (R)
20,36,41,51,52,58,61,62 PM_SLP_S3# 2N7002KDW-GP
2 (75.27002.E7C)
S
1
3
BAS16PT-GP
S0_PWR_GOOD
13,20,36,57 S0_PWR_GOOD
1
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
DCBATOUT U3601 EC3601 EC3602
C3603 1 S D 8
2
Q3602 SCD1U25V3KX-GP 2 S D 7 (R) (R)
1 2 RUNPWR_R1 E LMBT3906LT1G-1-GP
C RUNPWR_R3 1 2 3 S D 6 5V_S0
R3603 47KR2J-2-GP 1 4 G D 5
1
(R)
R3606 R3607 AO4468L-GP 3D3V_S5
B
2
R3604 330KR2J-L1-GP
SCD1U50V3KX-GP
0R0402-PAD 1 2 must to be
2
2
3D3V_A
closed U3604
1
1
1 R3616 2 PS_S3CNTRL 52
R3605 1KR2J-1-GP 100KR2J-1-GP
RUNPWR_R5 1
U3603
8
100KR2J-1-GP S D
2 S D 7
D
3 S D 6
2
4 G D 5 Q3611
3D3V_S0
RUNPWR_R4
2N7002K-2-GP
RUN_EN
AO4468L-GP
84.2N702.J31
Add R3620 and R3621 for
discharge S5->S0 2ND = 84.2N702.031
R3621
S
G
R3601 1 2
1 2 RUNPWR_R6
20,36,41,51,52,58,61,62 PM_SLP_S3#
4K7R2J-2-GP 1KR2J-1-GP 20,36,41,51,52,58,61,62 PM_SLP_S3#
D
Q3603
Q3601 2N7002KDW-GP
36 SIO_PSON_N G 2N7002-11-GP
(R84.2N702.J31) (75.27002.E7C)
1
3
S
1
C3604
SCD01U50V2KX-1GP 2
B B
U3604
C3607 1 S D 8
SCD1U25V3KX-GP 2 S D 7
1 2 3 S D 6
(R) 4 G D 5
DCBATOUT
AO4468L-GP
Q3604 5V_S5
1 2 EUP_R1 E LMBT3906LT1G-1-GP
C EUP_R3 1 R3619 2
R3608 47KR2J-2-GP
1
0R0402-PAD
R3611 R3612
B
EUP_EN
1
1
AO6402A-GP
3D3V_S5
R3602
1 2 EUP_R6
36 CTRL0_EUP
1
A A
4K7R2J-2-GP C3606
6
Q3605
2N7002KDW-GP
Title
D D
C C
B B
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
1D05_M
Size Document Number Rev
A
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 38 of 103
5 4 3 2 1
5 4 3 2 1
D
(Vds 30V,Vgs 12V) Q9601
AO3418L-GP
G
DCBATOUT
S
D P3P3V D
Q9602
1 2 SCALAR_PC_SW1 E LMBT3906LT1G-1-GP
C SCALAR_PC_SW3
R9601 47KR2J-2-GP
1
R9604 R9605
Scalar Spec Table
B
1 2 SCALAR_PC_SW2 47KR2J-2-GP 1KR2J-1-GP C9605 R9609
5V_Charger
2
R9602 330KR2J-L1-GP 47KR2J-2-GP
SCD1U50V3KX-GP
(R)
2
1
SCALAR_PC_SW5
R9603 GPI input From High Low Default
D
100KR2J-1-GP
Q9605
3D3V_S5 AO3418L-GP
PM_SLP_S3# 20,36,41,51,52,58,61,62
2
G
SCALAR_PC_SW4 GPI-1 PC Power ON SB PC Monitor Monitor
Pin69
S
5V_S5_AMP
1
R9606
10KR2F-2-GP
6
(R)
GPI-2 Mode change/
Q9603
Pin109 PC: PC (PC->HDMI)
2
36 SCALAR_EN 2N7002KDW-GP Panel OnOff SW Normal Touch Monitor: HDMI, VGA (HDMI)
1
(75.27002.E7C) R9607
1
47KR2J-2-GP
C C
2
DCBATOUT
GPO output
1
(A) R79164
(A) R79165 100KR2J-1-GP
PC: ON
S
SCALAR_AMP_D
100KR2J-1-GP
1 2 SCALAR_AMP_D_R G Q9606
Pin55 GPO-2 Panel On/OFF SCALAR_VDD_EN 41,54 Scalar ON OFF Monitor: Detect Signal
2
DMP3098L-GP
(A)
PC: PC,
C9606 (A)
Pin104 GPO-3 PC/Monitor PC_MONITOR_SW 39,41 Scalar PC Monitor Monitor: HDMI, VGA
1
(A) SCD1U25V2KX-GP
U9610
D
1
C9642
G SC1U25V3KX-1-GP
2
(R)
D 2
Pin101 GPO-5 Video BLON_EN# 41,54 Scalar Disable Enable Disable
19V_AMP
S
1
Delete AMP mute circuit,
2N7002K-2-GP R9608 the mute function change to EC
100KR2J-1-GP
B
(A) --Kai 0308 B
2
P3P3V P1P2V
P3P3V
435mA
600mA
1
1
3
2
1
C9604 C9603
1
SC10U10V5ZY-1GP SCD1U16V2ZY-2GP
VIN
GND
VOUT
C9602 C9601
SC10U10V5ZY-1GP SCD1U16V2ZY-2GP
2
A <Core Design> A
U9601
LD1117AG-12-AA3-A-R-GP Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Scalar Power
Size Document Number Rev
Custom
PIM86L-Florence 1
Date: Monday, March 03, 2014 Sheet 39 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
Connected_Standby
Size Document Number Rev
A
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 40 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
DCIN JACK
Size Document Number Rev
A
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 41 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
BATT CONN
Size Document Number Rev
A
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 42 of 103
5 4 3 2 1
5 4 3 2 1
D D
PR5301 1 2 0R0805-PAD-2-GP-U
PR5302 1 2 0R0805-PAD-2-GP-U
A
1
1
D31 PC87 PC88 PC89
PR145 PC86 SCD1U50V3KX-GP SC10U25V5KX-GP SC10U25V5KX-GP
2D2R5J-1-GP RB551V30-GP SCD01U50V2KX-1GP
2
2
K
1
PC90
SC1U10V3KX-4GP-U 84.04214.037 SI4214DDY
12V_PWR_VCC
C C
Vgs @ 4.5V,
2
Id = 5.9A, Iomax=3A
Rds(on) = 19.0~23.0mohm,
U49
Qg = 7.1~11nC OCP>6A
12V_PWR_FB 8 6
12V_PWR_VOS 9 FB VCC 12V_PWR
VOS 10.0uH, DCR=27.5mohm, Idc=6.0A
10 PR146
PGOOD 1 12V_PWR_BOOT 2 1 2D2R5J-1-GP 12V_PWR_BT1 PC91 1 2 SCD1U50V3KX-GP PL5
BOOT
1
2 12V_PWR_LX 1 2
PR147 PR148 LX 3 12V_PWR_UG
UG
1
1
(R) PC95
2
D2
D2
D1
D1
PU18 PC94 SC10U25V5KX-GP
NCP1589AMNTWG-GP-U1 PR149 SI4214DDY-T1-GE3-GP PR151 SE100U16VM-27-GP
2
6K65R2F-GP PR150 2 1 10KR2J-3-GP 2D2R5J-1-GP
112V_PWR_LX1_SNB
2
2
1
PR152
G2
S2
G1
S1
PC96 1 2 SCD22U16V3KX-2-GP 12V_PWR_CP1 1 2 3K3R2F-2-GP
PR9991
1
10R2F-L-GP
PC97 1 2 SC1KP50V2KX-1GP PR9989 2 1 2D2R5J-1-GP 12V_PWR_UG12
100uF/16V, ESR=24mohm
2
PC98
12V_PWR_LX SC1500P50V3KX-GP
2
12V_PWR_LG12 soldering Mask-- 20140115
1 2 12V_PWR_FB1 PR9990 1 2 75R2F-2-GP 12V_PWR 12V_S0
PC99
SCD01U16V2KX-3GP
1
R1 2 2K61R2F-1-GP 12V_PWR_SENSE
PR158 PR5315 1 2 0R0805-PAD-2-GP-U
1
PR5312 1 2 0R0805-PAD-2-GP-U
B
PR160
187R2F-GP
R2 12V_PWR_COMP PR5316 1 2 0R0805-PAD-2-GP-U B
5V_S5 H: enable
L: disable
2
PR5320
D
10KR2J-3-GP
Q5301
2
12V_EN G
2N7002A-7-GP
(84.2N702.J31)
S
D
Q5302
PM_SLP_S3# G
20,36,41,51,52,61,62 PM_SLP_S3#
2N7002A-7-GP
(84.2N702.J31)
S
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DC to DC_12V(NCP1589A)
Size Document Number Rev
C
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 43 of 103
5 4 3 2 1
A B C D E
84.08884.037 FDS8884
0R0805-PAD-2-GP-U 2 1 PR4531
Vgs @ 4.5V,
soldering Mask-- 20140115
PWR_3_5V_DCBATOUT
VIN RIPPLE CURRENT Imax=2.84A Id = 8.5A, 084.00472.0037 SIR472DP
Vgs @ 4.5V,
VIN RIPPLE CURRENT Imax=4.85A PWR_3_5V_DCBATOUT soldering Mask-- 20140115
1
PC9966 PC9967 PC4140 PC9962 PC4157 PC9963 PC9964 PC9965 PC4144
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
0R0805-PAD-2-GP-U 2 1 PR2230 84.SRA12.037 SIRA12DP PR2238 1 2 0R0805-PAD-2-GP-U
D 8
D 7
D 6
D 5
5
6
7
8
SE47U25VM-14-GP
84.06690.G37 FDS6690AS PR4130
Vgs @ 4.5V,
2
D
D
D
D
0R0805-PAD-2-GP-U 2 1 PR2231 PU4103 PU4605 PR2239 1 2 0R0805-PAD-2-GP-U
Vgs @ 4.5V, 2D2R5F-2-GP Id = 20A,
FDS8884-GP
0R0805-PAD-2-GP-U 2 1 PR2232 Id = 10A, Rds(on) = 4.4~6.0mohm, SIR472ADP-T1-GE3-GP PR2240 1 2 0R0805-PAD-2-GP-U
Rds(on) = 12~15mohm,
2
3_5_VIN 4 PR2241 1 2 0R0805-PAD-2-GP-U
G
soldering Mask-- 20140115
Qg = 9~13nC
S
S
S
PC4114
S
S
S
G
1
SCD1U50V3KX-GP PR2242 1 2 0R0805-PAD-2-GP-U
1
2
3
4
3
2
1
soldering Mask-- 20140115
12
PR2174 PR2175
2
PU5303
PWR_3D3V_UGATE2_R 1 2 PWR_3D3V_UGATE2 PWR_5V_UGATE1 1 2PWR_5V_UGATE1_R
VIN
1R5J-2-GP 1R5J-2-GP
Iomax=7.5A PR2177 PR2176
Iomax=11A
OCP>9A 2 1 PWR_3D3V_BOOT1 1 2PWR_3D3V_BOOT2 9
VBST2 VBST1
17 PWR_5V_BOOT1 1 2PWR_5V_BOOT1_1 1 2 OCP>16.5A
3D3V_PWR
3.3uH, DCR=10.8~11.8mohm, Idc=10.0A PC4116 SCD1U25V3KX-GP 2D2R5J-1-GP
PWR_3D3V_UGATE2 PWR_5V_UGATE1
2D2R5J-1-GP PC4154 1.5uH, DCR=3.8~4.2mohm, Idc=16A
10 16 SCD1U25V3KX-GP 5V_PWR
DRVH2 DRVH1
IND-3D3UH-135-GP 1 2 PL4104 PWR_3D3V_PHASE28 18 PWR_5V_PHASE1 PL4103 1 2 IND-1D5UH-52-GP
SW2 SW1
1
(R) PWR_3D3V_LGATE211 15 PWR_5V_LGATE1
DRVL2 DRVL1
1
SC10U10V5KX-2GP
SCD1U50V3KX-GP
5
6
7
8
1
PWR_5V_VOUT1
GAP-CLOSE-PWR-3-GP
D 8
D 7
D 6
D 5
1
D
D
D
D
GAP-CLOSE-PWR-3-GP
SCD1U50V3KX-GP
SC10U10V5KX-2GP
ST220U6D3VDM-20GP
ST220U6D3VDM-20GP
3 3
1PWR_3D3V_SNB2
1PWR_5V_SNB 2
PU4110 PWR_3D3V_FB2 4 2 PWR_5V_FB1 PQ18
VFB2 VFB1
2
FDS6690AS-G-GP SIRA12DP-T1-GE3-GP
2
2
4
G
4 PR7911 1 2 0R0402-PAD PWR_3D3V_ENC 6 20 PWR_5V_ENC PR7912 1 2
S
S
S
G
3D3V_AUX_S5 EN2 EN1 3D3V_AUX_S5
S
S
S
3
2
1
220uF/6.3V, ESR=25mohm 0R0402-PAD
1
2
3
PC4639 PWR_3D3V_CS2 5 1 PWR_5V_CS1 PC4621
CS2 CS1
PWR_3D3V_FB2_O
SC1500P50V3KX-GP SC1500P50V3KX-GP
220uF/6.3V, ESR=25mohm
2
2
19
3D3V_PWR VCLK
3V_5V_POK 7 21
PGOOD GND
VREG3
VREG5
PR4134
100KR2J-1-GP
(R)
TPS51225CRUKR-GP
13
(R)
1
PWR_5V3D3V_VREG3
PWR_5V3D3V_VREG5
PR4120 0R2J-2-GP PG4128 PG4125
6K65R2F-GP 1 2 1 2
1
(R)
GAP-CLOSE-PWR GAP-CLOSE-PWR PR4137
2
1 2
1
PWR_3D3V_FB2_R 0R2J-2-GP
PC4152 (R) PR4144
SC18P50V2JN-1-GP 30K9R2F-GP
1 2
PWR_5V_FB1_R
2
(R)
2
PC4148
1
1
PC4156 PC4153 SC18P50V2JN-1-GP
2
PR4135 SC1U16V3KX-2GP SC1U16V3KX-2GP Frequency 300k/CH1
10KR2F-2-GP 350k/CH2
1
PR4121
2
20KR2F-L-GP
2
2 2
3.3V(TPS51225)
L=3.3uH OCP
∆I={(Vin-Vout)*Vout}/(Vin*L*Fsw) 5V(TPS51225)
PR7922
∆I={(19 - 3)*3}/(19*3u*350K)=2.36A PWR_5V_CS1
L=1.5uH
1 2
∆I={(Vin-Vout)*Vout}/(Vin*L*Fsw)
(R) 56KR2F-GP ∆I={(19 - 5)*5}/(19*1.5u*300K)=8.2A
1
PC4151
SC18P50V2JN-1-GP
2
PR4117
PWR_3D3V_CS2 1 2
1
(R)
PC4110 100KR2F-L1-GP
TONSEL CH1 CH2
SC18P50V2JN-1-GP
2
GND 200kHz 250kHz
VREF 300kHz 375kHz
PR4117 from 82k to 100k -- Jimmy 1023 VREG3 or VREG5 400kHz 500kHz
HR PX
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DC to DC_5V/3D3V(TPS51225)
Size Document Number Rev
Custom
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 44 of 103
A B C D E
5 4 3 2 1
D D
DCBATOUT 5V_S0
@ Close to VR
1
P_CPU_VCCIO
PR25
PR9 2D2R5J-1-GP
1KR2F-3-GP
1
PC144 VCORE_SW2
VCORE_SW2 64
1
SCD1U16V2KX-3GP PR728 PR727 PC139 VCORE_SW1
VCORE_ISUMN_2 VCORE_BT1 VCORE_SW1 64
2 1 130R2F-1-GP 54D9R2F-L1-GP SCD01U50V2KX-1GP VCORE_BT1 64
1
1 PC145 VCORE_BT2
VCORE_BT2 64
2
PC146 SC1U25V3KX-1-GP VCORE_LG1
VCORE_LG1 64
2
(R) 2 SCD22U25V3KX-GP VCORE_HG1
VCORE_HG1 64
2
1 PC141 1 PC17 1 PC16 PU39 VCORE_LG2
VCORE_HG2 VCORE_LG2 64
SCD22U25V3KX-GP
SCD22U25V3KX-GP
SCD22U25V3KX-GP
VCORE_VDD VCORE_SCLK VCORE_HG2 64
2 2 2 16 1 PR31 2 1 0R0402-PAD
VDD SCLK VCORE_SDIO SVID_CLK 14 VCORE_ISEN1
31 PR29 2 1 0R0402-PAD
SDA SVID_DAT 14 VCORE_ISEN2 VCORE_ISEN1 64
23 VCORE_ISEN2 64
VDDP 21 VCORE_LG1 VCORE_ISEN3
VCORE_VIN LGATE1 VCORE_HG1 VCORE_ISUMP VCORE_ISEN3 64
17 19 VCORE_ISUMP 64
VIN UGATE1 3D3V_S0 VCORE_ISUMN_2
VCORE_LG2 VCORE_ISUMN_2 64
24
VCORE_ISEN1 12 LGATE2 26 VCORE_HG2
C C
ISEN1 UGATE2
1
VCORE_ISEN2 11
@ Close to CPU VCORE_ISEN3 10 ISNE2 30 VCORE_PROG1 PR16 1 2 16K9R2F-GP PR35
P_CPU_VCCIO ISEN3 SLOPE/PROG1 28 VCORE_PROG2 PR17 1 2 49K9R2F-L-GP
PR14 10KR2F-2-GP
1 2 PR12 1 2 619R2F-L1-GP VCORE_ISUMN 14 PROG2 29 VCORE_PROG3 PR18 1 2 3K24R2F-GP
VCORE_ISUMP 15 ISUMN PROG3
2
ISUMP
1
NTC-10K-27-GP-U 3 VCORE_PWRGD
PGOOD VCORE_PWRGD 51
1
1 2VCORE_ISUMN_1
1 2 VCORE_BT1 18 4 VCORE_IMON
R739 VCORE_ISUMP_1 PC143 PC142 PR11 VCORE_BT2 27 BOOT1 IMON 6 VCORE_NTC
BOOT2 NTC
1
SCD22U16V2KX-GP
VCORE_COMP
SCD1U16V2KX-3GP
SC2200P50V2KX-2GP COMP
1
PR37 PR13 VCORE_SW1 20 8 VCORE_FP PR3
2
PHASE1 FB
118KR2F-1-GP
2K61R2F-1-GP 11KR2F-L-GP VCORE_SW2 25 9 VCORE_FB2 PR15 1 2 6K04R2F-GP PC1
2
PHASE2 FB2/VSEN
SC1KP50V2KX-1GP
1 2 13 VSS_SENSE PR2
2
PR28 1 2 0R0402-PAD VCORE_EN 2 RTN 22 VCORE_PWM3 PR7 1 20R0402-PAD PR6 PR5 PR36 PR4 PC2 PR1 27K4R2F-GP
62 ALL_POWER_OK 5V_S0
2
VR_ON PWM3
SC56P50V2JN-2GP
5 1KR2F-3-GP 1K91R2F-1-GP 2KR2F-3-GP 1K82R2F-1-GP NTC-470K-9-GP-U
11,57 H_PROCHOT_N
2
VR_HOT#
1
PC140
VCORE_FB_2
1VCORE_COMP_12 2
2
PR30 1 2 0R0402-PAD VCORE_ALERT# 32 33 2 1VCORE_FB2 SC1U25V3KX-1-GP
1VCORE_FB_1
14 SVID_ALERT_N
2
ALERT# GND PR10 VCORE_NTC_1
1 2
1
0R2J-2-GP
1
1
(R) PR8
OCP set as 80~90A
2
SC220P50V2KX-3GP
SC8200P50V2KX-GP
SC330P50V2KX-3GP
2
2
VCC_CORE @ Close to CPU
VCC_SENSE
1
PR722
100R2F-L1-GP-U
2
B B
VCC_SENSE
14 VCC_SENSE VSS_SENSE
15 VSS_SENSE
1
2
2
A A
<Variant Name>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU_VCORE1
Size Document Number Rev
C 1
PIM86L-Florence
Tuesday, February 25, 2014
Date: Sheet 45 of
5 4 3 2 1
5 4 3 2 1
P_DCBATOUT_VCORE DCBATOUT
084.00472.0037 SIR472DP reserved-- 20140110
Vgs @ 4.5V,
Id = 18A, PR40 1 2 0R0805-PAD-2-GP-U
Rds(on) = 9~11.5mohm, PR41 1 2 0R0805-PAD-2-GP-U
1
PC9992 PC9991 PC9988 PC9987 PC9986 PC9985 PC19 PC20 PC21 PC22 PC9971 PC9972 PC9973 PC9974 PC9975 PR42 1 2 0R0805-PAD-2-GP-U
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SCD1U50V3KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
PR43 1 2 0R0805-PAD-2-GP-U
2
84.SRA12.037 SIRA12DP
5
6
7
8
5
6
7
8
soldering Mask-- 20140115
Vgs @ 4.5V,
1
D
D
D
D
D
D
D
D
PU4610 PU4607 (R) (R)
Id = 20A, SIR472ADP-T1-GE3-GP SIR472ADP-T1-GE3-GP (R) PTC25 PTC26
SE47U25VM-14-GP
SE47U25VM-14-GP
Rds(on) = 4.4~6.0mohm,
2
4 VCORE_HG1_1 4 unmount -- Jimmy 1007 (R) (R) (R) (R) (R)
G
S
S
S
S
S
S
D D
3
2
1
3
2
1
VCC_CORE
PR44 0.36uH, DCR=1.05~1.2mohm, Idc=30A 330uF/2.5V, ESR=9.0mohm
1R5J-2-GP
1 2 VCORE_HG1_1
63 VCORE_HG1
PR57 PL1 1 2 IND-D36UH-19-GP
2D2R5J-1-GP
1
VCORE_BT1 1 2VCORE_BT_1 PR45
63 VCORE_BT1
2
22KR2J-GP PTC3 PTC4 PTC5 PTC6
1
ST330U2D5VDM-9GP
ST330U2D5VDM-9GP
ST330U2D5VDM-9GP
ST330U2D5VDM-9GP
PG1 PG2
5
6
7
8
5
6
7
8
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
1 PC148 PR46 PTC7
D
D
D
D
D
D
D
D
SCD22U25V3KX-GP 2D2R5J-1-GP ST330U2D5VDM-9GP
2
2 PU4609 PU4608
SIRA12DP-T1-GE3-GP
SIRA12DP-T1-GE3-GP
2
VCORE_SNB1
VCORE_ISUMN1
4 4
G
S
S
S
S
S
S
63 VCORE_SW1
63 VCORE_LG1
3
2
1
3
2
1
1
PC30
SC1500P50V3KX-GP
PR19 1 2 10R2F-L-GP VCORE_ISUMN_2
VCORE_ISUMN_2 63,64
2
PR20 1 2 10KR2F-2-GP VCORE_ISEN2
VCORE_ISUMP1
VCORE_ISEN2 63,64
PR21 1 2 10KR2F-2-GP VCORE_ISEN3
VCORE_ISEN3 63,64
(R)
1
unmount -- Jimmy 1007 PC23 PC24 PC25 PC26 PC9976 PC9977 PC9978 PC9979 PC9980
SCD1U50V3KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
C 84.SRA12.037 SIRA12DP C
Vgs @ 4.5V,
2
Id = 20A,
5
6
7
8
5
6
7
8
D
D
D
D
D
D
D
D
Rds(on) = 4.4~6.0mohm, PU4613 PU4612
SIR472ADP-T1-GE3-GP SIR472ADP-T1-GE3-GP (R)
4 VCORE_HG2_1 4 (R)
G
VCC_CORE
S
S
S
S
S
S
3
2
1
3
2
1
0.36uH, DCR=1.05~1.2mohm, Idc=30A
PR48
1R5J-2-GP
1 2 VCORE_HG2_1 PL2 IND-D36UH-19-GP
63 VCORE_HG2
PR55 1 2
2D2R5J-1-GP
1
VCORE_BT2 1 2VCORE_BT2_1
63 VCORE_BT2
2
PR49
22KR2J-GP PG4 PG5
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
1 PC147
5
6
7
8
5
6
7
8
SCD22U25V3KX-GP PR50
2
1
D
D
D
D
D
D
D
D
2 2D2R5J-1-GP
PU4614 PU4611
SIRA12DP-T1-GE3-GP
SIRA12DP-T1-GE3-GP
2
VCORE_SNB2
VCORE_ISUMN2
63 VCORE_SW2
4 4
G
G
63 VCORE_LG2
S
S
S
S
S
S
3
2
1
3
2
1
1
PC32 PR24 1 2 10R2F-L-GP VCORE_ISUMN_2
VCORE_ISUMN_2 63,64
SC1500P50V3KX-GP PR26 1 2 10KR2F-2-GP VCORE_ISEN1 VCORE_ISEN1 63,64
PR27 1 2 10KR2F-2-GP VCORE_ISEN3
VCORE_ISUMP2
VCORE_ISEN3 63,64
2
(R)
B VCORE_ISUMP B
PR32 1 2 3K65R5F-GP
VCORE_ISUMP 63,64
PR33 1 2 10KR2F-2-GP VCORE_ISEN2
VCORE_ISEN2 63,64
DISABLE PWM3
A A
<Variant Name>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU_CORE2
Size Document Number Rev
C 1
Tuesday, February 25, 2014
PIM86L-Florence
Date: Sheet 46 of
5 4 3 2 1
5 4 3 2 1
PR4655 1 2 0R0805-PAD-2-GP-U
PR4649 1 2 0R0805-PAD-2-GP-U
Rds(on) = 9~11.5mohm,
PWR_DCBATOUT_1D05V
soldering Mask-- 20140115
1
PC4633 PC4634 PC4627 PC4632
PU4615
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SCD1U25V3KX-GP
5
6
7
8
SIR472ADP-T1-GE3-GP
2
D
D
D
D
PR4651
3D3V_S0 PWR_1D05V_UGATE 1 2PWR_1D05V_UGATE_R 4
G
C C
S
S
S
2D2R5J-1-GP
3
2
1
1
PR4644
10KR2F-2-GP
Iomax=11A
PU5305 OCP>16.5A
2
1
PC9961
1
1
SC22P50V2JN-L-GP PC4636
ST330U2D5VDM-9GP
PR9913 PR9931 RT8237CZQW-2-GP PU4616 PR4647 (R) PR9983 PC4638
5
6
7
8
1
130KR2F-GP
D
D
D
D
OCP setting 5V_S5 (R)
1PWR_1D05V_SNB
2
2
SC1U16V3KX-2GP
PWM Frequency
2
2
setting
1
PR9932 4 PWR_1D05V_VFB
G
2D2R5J-1-GP
S
S
S
PR991. 66k change 130k -- Jimmy 1023 3D3V_S0
3
2
1
1
2
SC1500P50V3KX-GP 10KR2F-2-GP
PR4646 (R)
R2
2
100KR2F-L1-GP
2
B (R) B
1
2
PR4653 PC9259
1 2 0R0402-PAD PWR_1D05V_EN SC1U16V3KX-2GP
2
20,36,41,51,52,58,62 PM_SLP_S3#
VOUT=((R1+R2)/R2)*0.7
1
PC4637
1 2 SCD1U10V2KX-5GP
60 1D35V_PWROK PR4659 0R2J-2-GP (R)
2
(R)
A A
HR PX
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DC to DC_1D05V(RT8237)
Size Document Number Rev
Custom
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 47 of 103
5 4 3 2 1
5 4 3 2 1
SSID = PWR.Plane.Regulator_1p5v0p75v
1
PC4612 PR4630 1 2 0R0805-PAD-2-GP-U PR4619 1 2 0R0805-PAD-2-GP-U
D SCD1U10V2KX-5GP D
PR4631 1 2 0R0805-PAD-2-GP-U PR4620 1 2 0R0805-PAD-2-GP-U
2
PR4621 1 2 0R0805-PAD-2-GP-U
PR4622 1 2 0R0805-PAD-2-GP-U
1
PR4627 1 2 0R0805-PAD-2-GP-U
PC4606
SC1U10V2KX-1GP 84.SRA12.037 SIRA12DP VIN RIPPLE CURRENT Imax=4.63A
PR4628 1 2 0R0805-PAD-2-GP-U
Vgs @ 4.5V,
2
PWR_DCBATOUT_1D35V
Id = 20A,
1
PC4602
SC1KP50V2KX-1GP
PR4603 Rds(on) = 4.4~6.0mohm,
7K32R2F-GP
2
PWR_1D35V_VDDP 1 PR4605 2 5V_S5
2
0R0603-PAD
1
PC4620
1
SC1U10V2KX-1GP PU4602 PC9982 PC9981 PC4617 PC4615 (R) PC9983 PC9984
5
6
7
8
PWR_1D35V_CS
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SCD1U25V3KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SIR472ADP-T1-GE3-GP TC9303
D
D
D
D
SE47U25VM-14-GP
2
2
3D3V_S5
PR4617
1
PWR_1D35V_UGATE 1 2 PWR_1D35V_UGATE_R 4
S
S
S
PR4602
13
11
12
C C
10KR2F-2-GP PU4601 2D2R5J-1-GP
3
2
1
PC4609
CS
VDDP
VDD
PR4606
2
18 PWR_1D35V_BOOT 1 2 PWR_1D35V_PHASE_L 1 2
10 BOOT
61 1D35V_PWROK PGOOD 2D2R5J-1-GP SCD1U25V3KX-GP
Iomax=18A
PWR_DCBATOUT_1D35V 1PR4610 2PWR_1D35V_TON 9
TON UGATE
17 PWR_1D35V_UGATE OCP>27A
620KR2F-GP
PWR_1D35V_EN
0.68uH, DCR=2.4~2.7mohm, Idc=22A
8 1D35V_DDR
S5
PWR_0D675V_EN 7 16 PWR_1D35V_PHASE PL4601 1 2 IND-D56UH-27-GP
PG4605 S3 PHASE
1
1 2 PWR_1D35V_VTTIN 19
1D35V_DDR VLDOIN
1
1
ST330U2D5VDM-9GP
ST330U2D5VDM-9GP
PG4606 PC4603 2D2R5J-1-GP PC4613
5
6
7
8
5
6
7
8
1PWR_1D35V_SNB
1 2 SC10U10V5KX-2GP
2
2
D
D
D
D
D
D
D
D
2
SC1U16V3KX-2GP
GAP-CLOSE-PWR 1 14 PU4603 PU4604
VTTGND PGND
SIRA12DP-T1-GE3-GP
SIRA12DP-T1-GE3-GP
5 1D35V_DDR 4 4
G
VDDQ
S
S
S
S
S
S
20 6 PWR_1D35V_FB
DDR_VREF_PWR VTT FB
3
2
1
3
2
1
1
PC4619
1
2 PR4608 (R) SC1500P50V3KX-GP
VTTSNS 24KR2F-GP
VTTREF
2
SC18P50V2JN-1-GP
Iomax=1A R1
GND
GND
2
OCP>1.5A
2
RT8207MZQW-GP-U
21
1
R2 PR4609
B B
30KR2F-GP
PWR_1D35V_VTTREF
2
DDR_VREF_S3
1 PR4607 2
0R0402-PAD
Vout=0.75*(1+R1/R2)
1
PC4608
SCD033U50V3KX-1GP
+0.675VS
2
Iomax: 1.0A
PC4604 PC4605
(R)
A A
SC10U6D3V5KX-1GP
SC10U10V5KX-2GP
2
HR PX
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DC to DC_1D35V/0D675V
Size Document Number Rev
Custom
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 48 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
HR PX
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
DC to DC_1D8V
Size Document Number Rev
A
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 49 of 103
5 4 3 2 1
5 4 3 2 1
3D3V_S0
PR196 1 2 0R0805-PAD-2-GP-U
5V_S5 3D3V_S0
3D3V_S0
1
PC81
1
SC10U6D3V3MX-GP
1
PC82
2
soldering Mask-- 20140115 SC1U25V3KX-1-GP PR153 PR156
PU45 22KR2F-GP 10KR2F-2-GP
2
1D5V_S0
2
1P5_5930_VIN 5
2
PR197 1 2 0R0805-PAD-2-GP-U 1P5_5930_VOUT 4 VIN#5 6
3 VOUT#4 VCNTL 7
C VOUT#3 POK ALL_POWER_OK 63 C
1
1
PC83 PC84 PC111 2 8 1P5_PCH_EN
SC10U6D3V3MX-GP SC10U6D3V3MX-GP SC100P50V2JN-3GP 1 FB EN 9
GND VIN#9 1P5_5930_VIN
(R) (R) PR4665
2
2
1P5_PCH_FB 1 2 0R0402-PAD
APL5930KAI-TRG-1-GP PM_SLP_S3# 20,36,41,51,52,58,61
1
1P5_5930_VOUT PC4644
SCD1U10V2KX-5GP
2
1
PR154
R1 8K87R2F-2-GP
2
1
Vout = 0.8*(1+R1/R2)=1.5096V
R2 PR155
10KR2F-2-GP
2
B B
<Variant Name>
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DC to DC_1D5V(APL5930)
Size Document Number Rev
B
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 50 of 103
5 4 3 2 1
5 4 3 2 1
Close to CPU
S3 Power Reduction Circuit Processor VREF_DQ Implementation DRAMRST_CNTRL_PCH 19,52
1
1 2
DDR_VREF_S3 (R) R3714 Q3709 R3708
Unmount Q3708 and R3705--Kai 0307 0R2J-2-GP
2N7002KDW-GP
0R2J-2-GP
(R) (R)
S P_CPU_DDR_SM_VREF 12,16
2
D D
2
D DDR_W R_VREF01_B4 16
R3705 12,17 P_CPU_DDR_SB_VREFDQ
G 100KR2J-1-GP 19,52 DRAMRST_CNTRL_PCH
Q3708 (R) (75.27002.E7C)
1
2N7002K-2-GP
2ND = 84.2N702.031
84.2N702.J31
JE40 HR modify 驗R3710上
上上
(R) PM_SLP_S3# 20,36,41,51,52,58,61,62
Close to DIMM
S3 Power Reduction Circuit SM_DRAMPWROK
1
R3703
22R2J-2-GP
3D3V_S0 1D05V_PW ROK 61
0D675V_S0_C
2
1
2
R3712 R3710
D
(R) 10KR2J-3-GP 0R0402-PAD
Q3701
C C
2N7002K-2-GP
1
0D75V_EN_C 2 R3711 1 0D675V_EN 60 84.2N702.J31
0R0402-PAD
2 1
2ND = 84.2N702.031
20,36,41,51,52,58,61,62 PM_SLP_S3#
S
1
R3716 (R) C3705
0R2J-2-GP (R) SCD1U10V2KX-5GP
2
51 PS_S3CNTRL
Close to CPU
S3 Power Reduction Circuit SM_DRAMPWROK
1D35V_S3
1D35V_S3
1
1
B R3706 B
R3702 R3709 1KR2J-1-GP
1K82R2F-1-GP 0R0402-PAD (R)
2
1 2
2
11 SM_DRAMRST# S
R3720
3K32R2F-GP D SM_DRAMRST#_D 1 R3718 2 DDR3_DRAMRST# 16,17
1
G 0R0402-PAD
2
(R) C3702
Q3703 (R) SC100P50V2JN-3GP
2
2ND = 84.2N702.031 SB to -1
84.2N702.J31
Follow design guide suggestion--Kai 0319 2N7002K-2-GP
DRAMRST_CNTRL_PCH 19,52
C3703
2 1DRAMRST_CNTRL_PCH
SCD047U16V2KX-1-GP
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
ADAPTER
Size Document Number Rev
A3
PIM86L-aLondon2 1
Date: Tuesday, February 25, 2014 Sheet 51 of 103
5 4 3 2 1
SSID = VIDEO
+19V_S5_INV Power
68.00216.191
Z=80 ohm,Rdc=0.02 ohm
I=5A ,0805
DCBATOUT
3D3V_S5 change to P3P3V-- Kai 0520 F4901
1 2 DCBATOUT_CON
POLYSW-1D5A24V-GP
P3P3V
1
R4906
20KR2J-L2-GP
P3P3V
2
BKLT_EN
1
R4905
20KR2J-L2-GP Q4905 C4909
1
2N7002A-7-GP
SC100P50V2JN-3GP
2
R4915 0R0402-PAD DCBATOUT_CON
2
BLON_EN# 1 2 BLON_EN#_R G (R)
3D3V_S5
Low: Enable (84.2N702.J31)
High: Disable
2
(R)
R4904 CONV1
1KR2J-1-GP 9
BKLT_EN 1
1
SCALAR_BKLT_CTRL R4903 2 1 100R2J-2-GP BKLT_ADJ 2
3
4
R4913 0R2J-2-GP 5
DP_UTIL 1 2 6
7 LVDS1
(R) 8 1A 1B TXO0-
10
2A 2B TXO0+
3A 3B TXO1-
ACES-CON8-8-GP-U
4A 4B TXO1+
5A 5B TXO2-
LVDS (20.F1819.008) 6A 6B TXO2+
7A 7B
TXO0- 8A 8B TXOC-
41 TXO0-
TXO0+ 9A 9B TXOC+
41 TXO0+
TXO1- 10A 10B TXO3-
41 TXO1-
TXO1+ 11A 11B TXO3+
41 TXO1+
TXO2- 12A 12B TXE0-
41 TXO2-
TXO2+ 13A 13B TXE0+
41 TXO2+
TXOC- 14A 14B
41 TXOC-
TXOC+ 15A 15B TXE1-
41 TXOC+
TXO3- 16A 16B TXE1+
41 TXO3-
TXO3+ 17A 17B
41 TXO3+
18A 18B TXE2-
TXE0- 19A 19B TXE2+
41 TXE0-
TXE0+ 20A 20B TXEC-
41 TXE0+
TXE1- 21A 21B TXEC+
41 TXE1-
TXE1+ 22A 22B TXE3-
41 TXE1+
TXE2- 23A 23B TXE3+
41 TXE2-
TXE2+ 24A 24B 20130930 vender suggest
41 TXE2+
TXEC- 25A 25B
41 TXEC-
TXEC+ 26A 26B
41 TXEC+
TXE3- 27A 27B Interlace Mode Selection 26
41 TXE3-
TXE3+ 5V_CHARGER 28A 28B VCC5_PANEL
41 TXE3+
29A 29B
30A 30B
U4902
1
1 D D 6 ACES-CONN60G-GP-U C4911 C4910
L4901
2 D D 5 (R)
1
SCALAR_BKLT_CTRL V_5_LCD1 V_5_LCD2
SC1U10V2KX-1GP
SCD1U16V2ZY-2GP
3 G S 4 1 2
2
41 SCALAR_BKLT_CTRL C4907
SCALAR_VDD_EN DCBATOUT SC1U10V2KX-1GP AO6402A-GP MHC1608S800QBP-GP
41 SCALAR_VDD_EN
2
1
Q6107
Main: 84.06402.B3D
Alt: 84.00655.B3D R4912
BLON_EN# 1 2 LCD_5V_EN1 E LMBT3906LT1G-1-GP
C LCD_5V_EN 470R2J-2-GP
41 BLON_EN#
R4901 47KR2J-2-GP
1
2
2
5V_S5_LCD_DOWN
B
Low: Disable
2
DP_UTIL
11 DP_UTIL
1
R4909
LCD_5V_EN4
100KR2J-1-GP Q4906
D
2N7002A-7-GP
2
LCD_5V_EN3 G
(84.2N702.J31)
S
R4917 0R0402-PAD R4907
6
(75.27002.E7C) VCC5_PANEL
R4908
1
10KR2J-3-GP
V_5_LCD2
1
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
LCD Connector
Size Document Number Rev
Custom
PIM86L-Florence 1
Date: Monday, March 03, 2014 Sheet 52 of 103
5 4 3 2 1
D D
C C
B B
HR PX
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
D D
3D3V_S0
Pin 3 Pin 4 Pin 6 Pin 10 Pin 34 Pin 35
2
71.03411.D03 Low Low NC NC NC NC
F5001
POLYSW-2A6V-2-GP
NXP Eq NC NC NC NC NC
(69.42001.291)
1
HDMI_VDD
DDPC_CLK# HDMI_CLK_R#
11 DDPC_CLK# DDPC_CLK
C5120 1 2 SCD1U10V2KX-5GP
HDMI_CLK_R
: Check SPEC
Eq: HDMI_VDD
C5121 1 2 SCD1U10V2KX-5GP
11 DDPC_CLK
DDPC_DATA0# C5122 1 2 SCD1U10V2KX-5GP HDMI_DATA0_R#
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
11 DDPC_DATA0#
1
DDPC_DATA0 C5123 1 2 SCD1U10V2KX-5GP HDMI_DATA0_R
C5103
C5104
C5105
C5106
C5107
C5108
C5109
C5110
11 DDPC_DATA0
2
DDPC_DATA1# C5127 1 2 SCD1U10V2KX-5GP HDMI_DATA1_R#
11 DDPC_DATA1# DDPC_DATA1 C5124 1 2 SCD1U10V2KX-5GP HDMI_DATA1_R
11 DDPC_DATA1
DDPC_DATA2# C5125 1 2 SCD1U10V2KX-5GP HDMI_DATA2_R#
11 DDPC_DATA2# DDPC_DATA2 1 2 HDMI_DATA2_R
C5126 SCD1U10V2KX-5GP
11 DDPC_DATA2 R5120
HDMI_VDD 1 2
HDMI_VDD
1KR2J-1-GP
DDC_EN
OE_N
25
32
11
15
21
33
40
46
26
2
U5103
DDC_EN
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
OE#
HDMI_DATA0_R# 38 23 HDMI_DATA0_C_R#
HDMI_DATA0_R 39 IN_D1- OUT_D1- 22 HDMI_DATA0_C_R
IN_D1+ OUT_D1+ OE SELECTION
HDMI_DATA1_R# 41 20 HDMI_DATA1_C_R#
HDMI_DATA1_R 42 IN_D2- OUT_D2- 19 HDMI_DATA1_C_R
IN_D2+ OUT_D2+ HDMI_VDD
HDMI_DATA2_R# 44 17 HDMI_DATA2_C_R#
HDMI_DATA2_R 45 IN_D3- OUT_D3- 16 HDMI_DATA2_C_R 20131017 Vender
IN_D3+ OUT_D3+ 20131017 Vender
1
HDMI_CLK_R# 47 14 HDMI_CLK_C_R#
4K7R2J-2-GP
4K7R2J-2-GP
4K7R2J-2-GP
4K7R2J-2-GP
4K7R2J-2-GP
IN_D4- OUT_D4-
1
HDMI_CLK_R 48 13 HDMI_CLK_C_R (R) (R)
R5121
R5122
R5123
R5124
R5130
10KR2J-L-GP 4K7R2J-2-GP
IN_D4+ OUT_D4+ (R) (R) (R)
R5132
(R)
28 DDC_CLK_HDMI
2
OC_0 3 SCL_SINK 29 DDC_DATA_HDMI OC_0 OC_1 OC_3 EQ_0 EQ_1 OC_2
1 2
OC_0 SDA_SINK 30 HPD_HDMI_CON
(63.10334.1DL)
HPD_SINK
1
OC_1 4
4K7R2J-2-GP
4K7R2J-2-GP
4K7R2J-2-GP
4K7R2J-2-GP
4K7R2J-2-GP
OC_1
R5125
R5126
R5127
R5128
R5131
R8129
EQ_0 34 9 HDMI_CLK_1 (R) (R)
EQ_0 SCL_SOURCE 8 HDMI_DATA_1
EQ_1 35 SDA_SOURCE 7 HPD_HDMI_CON_R
EQ_1 HPD_SOURCE
2
OC_2/REXT
C C
OC_3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
PI3VDP411LSZBE-GP
6
10
1
5
12
18
24
27
31
36
37
43
49
(71.03360.B0K)
OC_2
OC_3
20131128 add standby mode
HDMI_DATA0_C_R 2
TR5101
1 HDMI_DATA0_C_RH HDMI_DATA2_C_R 2
TR5103
1 HDMI_DATA2_C_RH HDMI CONN HPD_HDMI_CON 1
R79296
2 HPD_HDMI_CON1 DDC_EN
DLM11SN900HY2L-GP DLM11SN900HY2L-GP
22
20
(68.10129.201) (68.10129.201)
3
HDOUT1
1 HDMI_DATA2_C_RH
2 2N7002KDW-GP
3 HDMI_DATA2_C_RH# Q9618
4 HDMI_DATA1_C_RH (75.27002.E7C)
4
5 3D3V_S0
6 HDMI_DATA1_C_RH#
TR5102 TR5104 7 HDMI_DATA0_C_RH R79298
HDMI_DATA1_C_R 2 1 HDMI_DATA1_C_RH HDMI_CLK_C_R 2 1 HDMI_CLK_C_RH 8 1 2 OE_N
9 HDMI_DATA0_C_RH#
HDMI_DATA1_C_R# 3 4 HDMI_DATA1_C_RH# HDMI_CLK_C_R# 3 4 HDMI_CLK_C_RH# 10 HDMI_CLK_C_RH 10KR2J-3-GP
11
DLM11SN900HY2L-GP DLM11SN900HY2L-GP 12 HDMI_CLK_C_RH# R79299
(68.10129.201) (68.10129.201) 13 1 2
14 5V_HDMI 5V_S0
15 DDC_CLK_HDMI 0R2J-2-GP
16 DDC_DATA_HDMI
(R)
17 F5102
18 5V_HDMI 1 2
19
POLYSW-1D1A6V-6-GP
SKT-HDMI19P-57-GP
23
21
(62.10078.641)
B B
3D3V_S0
HPD_HDMI_CON
1
R5112
10KR2J-3-GP
5V_S0 (R)
2
DDC CLK & DATA
1
HPD_HDMI_CON_R
HDMI_PCH_DET 21
3
BAT54C-12-GP
1
D5102
1
D5103 R5110 BZX84-C6V8-GP
(75.00054.T7D) R5111
200KR2J-L1-GP
DY (R)
3
(R) 1MR2J-1-GP
(R)
2
2
DDC_HDMI_PU
2
4
3
C5111
RN5101 SCD1U16V2ZY-2GP
SRN1K5J-GP
2
PCH PU to 2.2K
1
2
5V Tolerance
1 4 HDMI_CLK_1 DDC_CLK_HDMI
21 PCH_HDMI_CLK HDMI_DATA_1 DDC_DATA_HDMI
2 3
21 PCH_HDMI_DATA ESD
RN5104
SRN0J-6-GP
C5102 C5101
1
SC470P50V2KX-3GP SC470P50V2KX-3GP
(R) (R) U5101 (R) U5102 (R)
2
HDMI_DATA1_C_RH 1 HDMI_CLK_C_RH 1
2
HDMI_DATA1_C_RH# 2 3 HDMI_CLK_C_RH# 2 3
D5101 HDMI_DATA0_C_RH 4 8 HDMI_DATA2_C_RH 4 8
HDMI_DATA0_C_RH# 5 HDMI_DATA2_C_RH# 5
AZ23C6V2-1-GP
6 9 6 9
(R) 7 10 7 10
3
SP3010-04UTG-GP SP3010-04UTG-GP
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
HDMI OUT
Size Document Number Rev
Custom
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 54 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
HR PX
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
Display Port
Size Document Number Rev
A
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 55 of 103
5 4 3 2 1
SSID = SATA SATA HDD Connector
20130926 Ryan
20131015 Ryan
HDD1
3D3V_HDD P1
V33 16
16 Layout: Put them together
P2 17
P3 V33 17
V33
5V_HDD P7
P8 V5 5V_S0 5V_HDD 5V_HDD
P9 V5
V5
P13 S1
P14 V12 GND S4 F8204 C5611
V12 GND
1
P15 S7 1 2 (R)
V12 GND P4 C5612 SC10U10V5ZY-1GP
GND P5 POLYSW-2A6V-GP
2
SCD01U16V2KX-3GP 2 1 C5601 SATA_TXP4_C S2 GND P6 SCD1U10V2KX-5GP
18 SATA_TX4_P A+ GND
SCD01U16V2KX-3GP 2 1 C5602 SATA_TXN4_C S3 P10
18 SATA_TX4_N A- GND P12
18 SATA_RX4_P SCD01U16V2KX-3GP 1 2 C5603 SATA_RXP4_C S6 GND 20131126 Ryan
SCD01U16V2KX-3GP 1 2 C5604 SATA_RXN4_C S5 B+ P11
18 SATA_RX4_N B- DAS/DSS
soldering Mask-- 20140115
SKT-SATA7P-15P-151-GP 3D3V_S0 3D3V_HDD
R5607 1 2 0R0805-PAD-2-GP-U
ODD Connector
5V_S0 5V_ODD
ODDPW1
F5601 3
1 2 1
ODDSA1
1
POLYSW-2A6V-GP (R) 2
18 SATA_TX0_P SCD01U16V2KX-3GP 2 1 C5610 SATA_TXP0_C 2 8 C5605 C5606 4
SCD01U16V2KX-3GP 2 1 C5609 SATA_TXN0_C 3 TXP GND 9 SC10U10V5ZY-1GP SCD1U10V2KX-5GP
18 SATA_TX0_N
2
TXN GND
JWT-CON2-3-GP
SCD01U16V2KX-3GP2 1C5608 SATA_RXP0_C 6 1 (020.D0001.0102)
18 SATA_RX0_P RXP GND
2
SCD01U16V2KX-3GP 1C5607 SATA_RXN0_C 5 4
18 SATA_RX0_N RXN GND 7
GND
Title
HDD/ODD
Size Document Number Rev
Custom
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 56 of 103
5 4 3 2 1
D D
C C
B B
HR PX
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
E-SATA
Size Document Number Rev
A
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 57 of 103
5 4 3 2 1
5 4 3 2 1
D
Mini Card Connector(Wireless LAN+BT) D
3D3V_S5 1D5V_S0_WLAN
3D3V_S5 MINIWLAN1
6 11 CLK_PCIE_WLAN#
1_5V REFCLK- CLK_PCIE_WLAN# 22
13 CLK_PCIE_WLAN
1D5V_S0 1D5V_S0_WLAN REFCLK+ CLK_PCIE_WLAN 22
2
R6513 3_3VAUX
1
(R) 23 PCIE_RXN4
PERN0 PCIE_RXN4 22
R6509 2 1 0R2J-2-GP 28 25 PCIE_RXP4
+1_5V PERP0 PCIE_RXP4 22
10KR2J-3-GP 48
+1_5V 31 PCIE_TXN4
PETN0 PCIE_TXN4 22
24 33 PCIE_TXP4
R6514 PCIE_TXP4 22
2
49 4
R6506 W3_DISABLE_N 51 RESERVED#49 GND 9
10KR2J-3-GP RESERVED#51 GND 15 1D5V_S0_WLAN
GND
Please close to PCIE2
3 18
5 COEX1 GND 21
R6507
2
COEX2 GND 26
GND
1
W1_DISABLE_N 1 2 W1_DISABLE_N_R 20 27 C6504 C6505 C6503
22 W1_DISABLE_N W_DISABLE# GND 29 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SC10U10V5ZY-1GP
42 GND 34 (R) (R) (R)
2
0R0402-PAD 44 LED_WWAN# GND 35
46 LED_WLAN# GND 37
LED_WPAN# GND 40
30 GND 43
32 SMB_CLK GND 50
SMB_DATA GND
B B
1
R6501 SKT-MINI52P-93-GP
10KR2J-3-GP
(R)
2
3D3V_S5
1
C6506 C6507 C6502
PLT_WLAN_RST# SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SC10U10V5ZY-1GP
2
1
(R) C6508
SC10P50V2JN-4GP
2
<Core Design>
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
0R2J-2-GP
0.4A
1D5V_S0_TV
1.3A
3D3V_S0
MINITV1
3D3V_S0
6 11 CLK_PCIE_TV#
1_5V REFCLK- 13 CLK_PCIE_TV CLK_PCIE_TV# 22
REFCLK+ CLK_PCIE_TV 22
1
R6706 2
Power
0R2J-2-GP 3_3VAUX 23 PCIE_RXN1
(R) 28 PERN0 25 PCIE_RXP1 PCIE_RXN1 22
48 +1_5V PERP0 PCIE_RXP1 22 1D5V_S0_TV
+1_5V 31 PCIE_TXN1
PETN0
2
3D3V_S0_RSV 24 33 PCIE_TXP1 PCIE_TXN1 22
39 +3_3VAUX PETP0 PCIE_TXP1 22
41 +3_3VAUX 36 USB_PN4
52 +3_3VAUX USB_D- 38 USB_PP4 USB_PN4 22
+3_3VAUX USB_D+ USB_PP4 22
1
C6703 C6721 C6719 C6720
P_BCAS_OUT 8 SC10U10V5KX-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
UIM_PWR 1 (R) (R) (R) (R)
WAKE#
2
16 7
UIM_VPP CLKREQ# 22 PLT_TV_RST#
PERST# PLT_TV_RST# 36
1
BCAS_IO 10 C6705 (R)
C BCAS_CL 12 UIM_DATA 53 SC100P50V2JN-3GP C
BCAS_RST 14 UIM_CLK 53 54
Near Pin6 Near Pin28 Near Pin48
UIM_RESET 54
2
BCAS_DET_R 17 NP1
19 RESERVED#17/UIM_C8 NP1 NP2
45 RESERVED#19/UIM_C4 NP2 3D3V_S0
47 RESERVED#45
49 RESERVED#47 4
51 RESERVED#49 GND 9
3D3V_S0 RESERVED#51 GND 15
(R) 3 GND 18
COEX1 GND
1
R6708 1 210KR2J-3-GP 5 21 C6718 C6717 C6716
COEX2 GND 26 C6704 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
TV_DISABLE#_R 20 GND 27 SC10U10V5KX-2GP
W_DISABLE# GND
2
29
42 GND 34
44 LED_WWAN# GND 35
46 LED_WLAN# GND 37
Near Pin52
LED_WPAN# GND 40
Near Pin2 Near Pin24
30 GND 43
32 SMB_CLK GND 50
SMB_DATA GND
1
SKT-MINI52P-93-GP
R6709
10KR2J-3-GP
(R)
2
B B
SIM EMI
2
R6712
10KR2J-3-GP
(R) P_BCAS_OUT BCAS_RST
SIM1 (R) 3D3V_S0
1
1
7 BCAS_DET_R C6712 C6713
P_BCAS_OUT 1 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
2
(R) (R)
2
1
BCAS_CL
SC4D7U6D3V3KX-GP
(R) 3 10KR2J-3-GP
BCAS_IO 4 Q6701 BCAS_CL BCAS_IO
2
BCAS_DET 5 2N7002A-7-GP
1
1
6 BCAS_DET G (R84.2N702.J31) C6714 C6715
8 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
1
2
ACES-CON6-53-GP SCD1U16V2ZY-2GP
S
(R)
2
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Mini PCIE Card (TV & SIM)
Size Document Number Rev
Custom
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 59 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
<Core Design>
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
L8201 R8218
SUSPEND LED
1
PWRLED_CON 1 2 V_5_PWR1 1 2
MHC1608S601LBP-GP R8222 R8223
D 130R5J-GP 10KR2J-3-GP 4K7R2J-2-GP D
(63.30131.16L) (R)
R79305 (R) Customer approve to
2
0R2J-2-GP make LED more bright by
1 2 SIO_PWR_LED_2 change resistor Q8201
E
R8221
B SUSLED_1 1 2 SUSLED_N
5V_S0 SUSLED_N 36
1
add as vendor
SUSLED_CON_P1
(63.10334.1DL) suggestion R8224
L9521 R79226 10KR2J-3-GP
HD_LED_CON 1 2 HD_LED_PWR 1 2 (R)
MHC1608S601LBP-GP
2
3D3V_A 130R5J-GP Customer approve to
1
R79304 (R) (63.30131.16L)make LED more bright by
0R2J-2-GP change resistor R8220
1
1 2 SIO_PWR_LED_2 200R5J-GP
R79294
10KR2J-3-GP BTNBD1
2
(R) 11
R79293
3
2
2
(R84.T3904.H11) OSD_MENU 2
21,41 OSD_MENU
2
5K1R2-GP 5V_S0 L8202 SUSLED_CON 3
L9522 MHC1608S601LBP-GP OSD_UP 4
24 SIO_PWR_LED 21,41 OSD_UP
5
1
1
10KR2J-3-GP 0R0603-PAD PWRBTN# 8
24 SIO_HDD_LED 20130910 Ryan SUSLED_CON 9
3
20130910 Ryan
1
HD_LED_CON 10
2
3
PCH_SATA_LED_N 1 2PCH_SATA_LED_R 1 Q9609 ACES-CON10-14-GP
2
5K1R2-GP PMBS3904-1-GP 1 2
3D3V_A 3D3V_S5 USB30_VCCA
(84.T3904.H11) (20.F1819.010)
2
BAV99-14-GP
LOW ACTIVE (R) 20130910 Ryan
1
R79260 R79229
10KR2J-3-GP 10KR2J-3-GP 20130910 Ryan
B (R) B
R79230
3
PCH_SATA_LED_CONN HD_LED_CON
2
SIO_HDD_LED 1 2 SIO_HDD_LED_1
1 Q9613
PMBS3904-1-GP
(84.T3904.H11) P3P3V P3P3V P3P3V U9614
2
5K1R2-GP
3
1 2
5V_S0
1
1
R8226 R8227 BAV99-14-GP
R8225 10KR2J-3-GP 10KR2J-3-GP (R)
10KR2J-3-GP
5V_S0
PWR BTN
2
3D3V_AUX_S5 OSD_MENU OSD_UP OSD_DN
2
2
U9616
3
R8212
330KR2J-L1-GP 10mW 1 2 P3P3V
U9617
<Core Design>
3
BAV99-14-GP
1
PWRBTN# 2 1 PWRBTN_IN 1 2
PWRBTN_IN 36 P3P3V
U9618
Wistron Corporation
1
3
A R8213 C8209 BAV99-14-GP A
SCD01U16V2KX-3GP
BAV99-14-GP
(R) Title
20130910 Ryan PWR BT/Side Key/LED
Size Document Number Rev
Custom
(78.10321.2FL) PIM86L-Florence 1
Date: Monday, March 03, 2014 Sheet 61 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
D D
C C
B B
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
IO Board Connector
Size Document Number Rev
A
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 63 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
Hall Sensor
Size Document Number Rev
A
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 64 of 103
5 4 3 2 1
5 4 3 2 1
D D
3D3V_S0
1
R7101
10KR2J-3-GP
DBH1 (X)
C 2 1 C
2
19,36 LPC_AD3 LPC_FRAME# 19,36
4 3 V_3P3_DBP
19,36 LPC_AD2 6 5
X CLK_PCI_LPC 22
8 7
19,36 LPC_AD1 10 9
19,36 LPC_AD0 12 11 PLT_RST# 21,36
14 13 3D3V_S0
JWT-CONN14D-SFP-1-GP
(X21.62888.207)
B B
<Core Design>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Dubug connector
Size Document Number Rev
A4
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 65 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
D D
C C
B B
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
Q2001 Q2002 Q2201 Q3009 Q3012 Q3603 Q3605 Q3608 Q3709 Q3801
Q4901 Q6101 Q7905 Q9301 Q9501 Q9502 Q9503 Q9504 Q9603 84 change
to 75--Kai 0513
D D
C C
B B
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
Bug/BOM issue
Size Document Number Rev
A
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 68 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
D D
C C
B B
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
D D
C C
B B
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
D D
C C
B B
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
For U3702 not OD AND gate 1U X 2 Under GPU 10U X 2 mid TO GPU
R3719 to 64.15015.6DL
R3720 to 64.75005.6DL 4.7U X 2 NEAR TO GPU 22U X 2 mid TO GPU
3D3V_VGA_S0 R3702 to DY
R2204 1 20R2J-2-GP
1
10KR2J-3-GP
(G)
R8303
(R) 1D05V_VGA_S0
3D3V_VGA_S0
2
1 5 3D3V_VGA_S0
30,36 PLTRST_GPU# IN B VCC
R8304 1 2 IN_A_R 2
D 3D3V_VGA_S0 D
IN A
1
1
VGA_RST#
SC10U10V5KX-2GP
SC10U10V5KX-2GP
10KR2J-3-GP 3 4 C8735 C8734 C8378 C8374 C8372 C8375 C8361 C8362
GND OUT Y
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
10KR2J-3-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
(R) C3704 (R) VGA1A 1 OF 17 (G) (G)
2
U3702 3D3V_VGA_S0 (G) (G) (G) (G) (G) (G)
2
1/17 PCI_EXPRESS
74VHC1G09DFT2G-GP R8302
SCD1U10V2KX-5GP
(G)
73.01G09.AAH GK107/GF108
2
GK208/GF117
(R)
AJ11
G
PEX_WAKE# NC
OD AND gate required PEX_IOVDD_1
AG19
VGA_RST# AJ12 AG21
PEX_RST# PEX_IOVDD_2 AG22
D S PEG_CLKREQ#_1 AK12 PEX_IOVDD_3 AG24
22 PEG_CLKREQ# PEX_CLKREQ# PEX_IOVDD_4 AH21
AL13 PEX_IOVDD_5 AH25 1U X 2 Under GPU 10U X 2 mid TO GPU
22 CLK_PCIE_VGA AK13 PEX_REFCLK PEX_IOVDD_6
Q8301 (G84.2N702.J31)
22 CLK_PCIE_VGA# PEX_REFCLK#
2N7002A-7-GP
PEG_RXP0 C8301 1 2(G)SCD22U10V2KX-1GP PEG_C_RXP0 AK14 4.7U X 2 NEAR TO GPU 22U X 2 mid TO GPU
PEG_RXN0 C8302 1 2 PEG_C_RXN0 AJ14 PEX_TX0
(G)SCD22U10V2KX-1GP PEX_TX0# 1D05V_VGA_S0
PEG_TXP0 AN12
PEG_TXN0 AM12 PEX_RX0 AG13
PEX_RX0# PEX_IOVDDQ_1 AG15
PEG_RXP1 C8303 1 2(G)SCD22U10V2KX-1GP PEG_C_RXP1 AH14 PEX_IOVDDQ_2 AG16
PEG_RXN1 C8304 1 2(G)SCD22U10V2KX-1GP PEG_C_RXN1 AG14 PEX_TX1 PEX_IOVDDQ_3 AG18
PEX_TX1# PEX_IOVDDQ_4 AG25
1
PEG_TXP1 AN14 PEX_IOVDDQ_5 AH15
PEG_TXN1 PEX_RX1 PEX_IOVDDQ_6
SC10U10V5KX-2GP
SC10U10V5KX-2GP
AM14 AH18 C8741 C8742 C8379 C8371 C8373 C8376 C8360 C8363
PEX_RX1# PEX_IOVDDQ_7
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
AH26 (G) (G)
2
PEG_RXP2 C8305 1 2(G)SCD22U10V2KX-1GP PEG_C_RXP2 AK15 PEX_IOVDDQ_8 AH27 (G) (G) (G) (G) (G)
PEG_RXN2 C8306 1 2(G)SCD22U10V2KX-1GP PEG_C_RXN2 AJ15 PEX_TX2 PEX_IOVDDQ_9 AJ27
PEX_TX2# PEX_IOVDDQ_10 AK27
PEG_TXP2 AP14 PEX_IOVDDQ_11 AL27
PEG_TXN2 AP15 PEX_RX2 PEX_IOVDDQ_12 AM28
PEX_RX2# PEX_IOVDDQ_13 AN28
PEG_RXP3 C8307 1 2(G)SCD22U10V2KX-1GP PEG_C_RXP3 AL16 PEX_IOVDDQ_14
PEG_RXN3 PEG_C_RXN3 PEX_TX3 (G)
C8308 1 2(G)SCD22U10V2KX-1GP AK16
PEX_TX3#
PEG_TXP3 AN15
PEG_TXN3 AM15 PEX_RX3
PEX_RX3#
C C
PEG_RXP4 C8309 1 2(G)SCD22U10V2KX-1GP PEG_C_RXP4 AK17
PEG_RXN4 C8310 1 2(G)SCD22U10V2KX-1GP PEG_C_RXN4 AJ17 PEX_TX4
PEX_TX4#
10 PEG_TXP[0..15] PEG_TXP4 AN17
PEG_TXN4 AM17 PEX_RX4
10 PEG_TXN[0..15] PEX_RX4#
PEG_RXP5 C8311 1 2(G)SCD22U10V2KX-1GP PEG_C_RXP5 AH17
PEG_RXN5 C8312 1 2(G)SCD22U10V2KX-1GP PEG_C_RXN5 AG17 PEX_TX5 GF108 GK208/GK107/GF117
PEX_TX5# AH12
PEG_TXP5 NC PEX_PLL_HVDD 3D3V_VGA_S0
AP17
PEG_TXN5 AP18 PEX_RX5 AG12
PEX_RX5# PEX_SVDD_3V3
10 PEG_RXP[0..15] PEG_RXP6 PEG_C_RXP6
C8313 1 2(G)SCD22U10V2KX-1GP AK18
PEG_RXN6 C8314 1 2(G)SCD22U10V2KX-1GP PEG_C_RXN6 AJ18 PEX_TX6
10 PEG_RXN[0..15] PEX_TX6# X7R
1
PEG_TXP6 AN18 C8367 C8366 C8377
PEG_TXN6 PEX_RX6
SCD1U10V2KX-5GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
AM18
3.3V +/- 5%
2
PEX_RX6# (G) (G) (G)
PEG_RXP7
PEG_RXN7
C8315 1
C8316 1
2(G)SCD22U10V2KX-1GP
2(G)SCD22U10V2KX-1GP
PEG_C_RXP7
PEG_C_RXN7
AL19
AK19 PEX_TX7 120mA
PEX_TX7# (See NV DG)
PEG_TXP7 AN20
PEG_TXN7 AM20 PEX_RX7
PEX_RX7#
PEG_RXP8 C8317 1 2(G)SCD22U10V2KX-1GP PEG_C_RXP8 AK20
PEG_RXN8 C8318 1 2(G)SCD22U10V2KX-1GP PEG_C_RXN8 AJ20 PEX_TX8
PEX_TX8# L4
PEG_TXP8 VDD_SENSE VGACORE_VDD_SENSE_1 65
AP20
PEG_TXN8 AP21 PEX_RX8
PEX_RX8# L5
PEG_RXP9 PEG_C_RXP9 GND_SENSE VGACORE_GND_SENSE_1 65
C8319 1 2(G)SCD22U10V2KX-1GP AH20
PEG_RXN9 C8320 1 2(G)SCD22U10V2KX-1GP PEG_C_RXN9 AG20 PEX_TX9
PEX_TX9#
PEG_TXP9 AN21
PEG_TXN9 AM21 PEX_RX9
PEX_RX9#
PEG_RXP10 C8321 1 2(G)SCD22U10V2KX-1GP PEG_C_RXP10 AK21
PEG_RXN10 C8322 1 2(G)SCD22U10V2KX-1GP PEG_C_RXN10 AJ21 PEX_TX10
PEX_TX10# P8
PEG_TXP10 AN23 NC_3V3AUX
B PEG_TXN10 AM23 PEX_RX10 B
PEX_RX10#
PEG_RXP11 C8323 1 2(G)SCD22U10V2KX-1GP PEG_C_RXP11 AL22
PEG_RXN11 C8324 1 2(G)SCD22U10V2KX-1GP PEG_C_RXN11 AK22 PEX_TX11
PEX_TX11#
PEG_TXP11 AP23
PEG_TXN11 AP24 PEX_RX11 1.05V +/- 3%
PEX_RX11#
PEG_RXP12 C8325 1 2(G)SCD22U10V2KX-1GP PEG_C_RXP12 AK23 PEX_TSTCLK_OUT
AJ26
AK26
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT# R8308 1 (R) 2 200R2F-L-GP
120mA
SC4D7U6D3V3KX-GP
C8328 1 2(G)SCD22U10V2KX-1GP AG26 1 2
PEX_TX13# PEX_PLLVDD
SCD1U10V2KX-5GP
SC1U10V2KX-1GP
MCB1608S121IBP-GP
PEG_TXP13 AN26 (G63.00000.00L)
1
PEG_TXN13 AM26 PEX_RX13
PEX_RX13# X7R
1
C8368
PEG_RXP14 C8329 1 2(G)SCD22U10V2KX-1GP PEG_C_RXP14 AK24 R8307 C8369 (G) C8370
2
PEG_RXN14 C8330 1 2(G)SCD22U10V2KX-1GP PEG_C_RXN14 AJ24 PEX_TX14 AK11 TESTMODE
1 2 10KR2J-3-GP (G) (G)
2
PEX_TX14# TESTMODE
PEG_TXP14 AP26 (G)
PEG_TXN14 AP27 PEX_RX14
PEX_RX14#
PEG_RXP15 C8331 1 2(G)SCD22U10V2KX-1GP PEG_C_RXP15 AL25
PEG_RXN15 C8332 1 2(G)SCD22U10V2KX-1GP PEG_C_RXN15 AK25 PEX_TX15
PEX_TX15# R8305
PEG_TXP15 AN27 AP29 PEX_TERMP
1 2 2K49R2F-GP
PEG_TXN15 AM27 PEX_RX15 PEX_TERMP
PEX_RX15# (G)
N14P-GS-A1-GP
(GKG.PGT0V.003)
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
GPU_PCIE/STRAPPING(1/5)
Size Document Number Rev
A2
PIM86L/Florence 1
Date: Tuesday, February 25, 2014 Sheet 73 of 103
5 4 3 2 1
5 4 3 2 1
AN6 AF8
DPA_L3 IFPA_TXC# IFPC_RSET
AM6 DVI/HDMI DP
DPA_L3 IFPA_TXC
AJ8
IFPAB_RSET
AN3 IFPC_PLLVDD_PD AF7 AG2
DPA_L2 IFPA_TXD0# IFPC_PLLVDD I2CW_SDA IFPC_AUX_I2CW_SDA#
D AP3 AG3 D
DPA_L2 IFPA_TXD0 I2CW_SCL IFPC_AUX_I2CW_SCL
1
IFPAB_PLLVDD_PD AH8
IFPAB_PLLVDD AM5 (R) R8410 AG4
DPA_L1 IFPA_TXD1# TXC IFPC_L3#
DPA_L1
AN5 10KR2J-3-GP AG5
IFPA_TXD1 TXC IFPC_L3
2
1
AH4
(R) AK6 IFPC TXD0 IFPC_L2# AH3
DPA_L0 IFPA_TXD2# TXD0 IFPC_L2
R8413 AL6
DPA_L0 IFPA_TXD2
10KR2J-3-GP TXD1 AJ2
IFPC_L1# AJ3
TXD1
2
AH6 IFPC_L1
IFPA_TXD3# AJ6 AJ1
IFPA_TXD3 TXD2 IFPC_L0# AK1
TXD2 IFPC_L0
DPB_L3
AH9
IFPB_TXC# AJ9
DPB_L3 IFPB_TXC IFPC_IOVDD_PD AF6 P2
IFPAB_IOVDD_PD AG8 IFPC_IOVDD GPIO15
IFPA_IOVDD AP5
DPB_L2 IFPB_TXD4#
1
AG9 DPB_L2
AP6 N14P-GS-A1-GP
IFPB_IOVDD IFPB_TXD4 (GKG.PGT0V.003)
(R) R8411
1
2
R8412 IFPB_TXD5
10KR2J-3-GP
AM8
DPB_L0
EDP Interface
2
IFPB_TXD6# AN8
DPB_L0 IFPB_TXD6
AL8 VGA1L 12 OF 17
IFPB_TXD7# AK8 7/17 IFPD
IFPB_TXD7
AK5
TXC IFPD_L3#
1
AK4
TXC IFPD_L3
(R) R8415 AL4
TXD0 IFPD_L2#
10KR2J-3-GP IFPD TXD0 IFPD_L2
AL3
VGA1M 13 OF 17
2
8/17 IFPEF TXD1 AM4
IFPD_L1# AM3
TXD1 IFPD_L1
ALL PINS NC FOR GF117 AM2
TXD2 IFPD_L0# AM1
TXD2 IFPD_L0
DVI-DL DVI-SL/HDMI DP
IFPD_IOVDD_PD AG6 M6
AB4 IFPD_IOVDD GPIO17
I2CY_SDA I2CY_SDA IFPE_AUX_I2CY_SDA#
I2CY_SCL I2CY_SCL
AB3
IFPEF_PLLVDD_PD AB8 IFPE_AUX_I2CY_SCL N14P-GS-A1-GP
IFPEF_PLLVDD
1
(GKG.PGT0V.003)
1
AC5
TXC TXC IFPE_L3#
AD6 AC4 (R) R8409
(R) R8414 IFPEF_RSET TXC TXC IFPE_L3 10KR2J-3-GP
10KR2J-3-GP AC3
2
NC FOR GK208 TXD0 TXD0 IFPE_L2# AC2
3D3V_VGA_S0
2
1
TXD2 TXD2
R8629 add F7 for GPU
X7R X7R X7R
use-- Kai 0722
1
NC FOR GK208
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC1U10V2KX-1GP
SC4D7U6D3V3KX-GP
R8629 C8601 C8620 C8621 C8603 C8604
2
HPD_E HPD_E R1 (R) (R) (R) (R) (R)
GPIO18
10KR2J-3-GP
(G)
IFPDE_PLL_IO_VDD_PD AC7
IFPE_IOVDD
X7R, Under GPU.
AF2 VGA1N 14 OF 17
I2CZ_SDA IFPF_AUX_I2CZ_SDA#
I2CZ_SCL
AF3 4/17 DACA
AC8 IFPF_AUX_I2CZ_SCL
IFPF_IOVDD GF108/GK107
GK208 GF117 GF117
GF108/GK107
GK208
DACA_VREF_AK12 AP9
DACA_VREF TSEN_VREF
AD5
TXD3 TXD0 IFPF_L2#
(R) R8407 AD4 DACA_RSET AP8 AM9 VGA_CRT_HSYNC 1 TP8613 TPAD28-1-GP-U
TXD3 TXD0 IFPF_L2 DACA_RSET NC NC DACA_HSYNC
10KR2J-3-GP AN9 VGA_CRT_VSYNC 1 TP8614 TPAD28-1-GP-U
NC DACA_VSYNC
TXD4 TXD1
AF5
IFPF
2
IFPF_L1# AF4
TXD4 TXD1 IFPF_L1 AK9 VGA_CRT_RED 1 TP8619 TPAD28-1-GP-U
NC DACA_RED
1
AE4 (G)
TXD5 TXD2 IFPF_L0#
1
AE3 AL10 VGA_CRT_GREEN 1 TP8620 TPAD28-1-GP-U
TXD5 TXD2 IFPF_L0 NC DACA_GREEN
C8609 R8603
VGA_CRT_BLUE
SCD1U10V2KX-5GP
2
A A
HPD_F P3 N14P-GS-A1-GP
GPIO19 (GKG.PGT0V.003)
<Core Design>
N14P-GS-A1-GP
(GKG.PGT0V.003) Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
GPU DIGITALOUT(2/5)
Size Document Number Rev
Custom
PIM86L/Florence 1
Date: Tuesday, February 25, 2014 Sheet 74 of 103
5 4 3 2 1
5 4 3 2 1
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC1U6D3V3KX-2GP
SC1U6D3V3KX-2GP
2/17 FBA
X7R X7R X7R X7R
location--Kai 0329
1
C8519 C8529 C8514 C8513
R8518
1D05V_VGA_S0
2
32 MDA[7..0] MDA0 L28 E1 FB_CLAMP 1 2
MDA1 M29 FBA_D0 FB_CLAMP VGA1C 3 OF 17 (R) (R) (R) (R)
MDA2 L29 FBA_D1 10KR2J-3-GP 3/17 FBB
MDA3 M28 FBA_D2 (G)
FBA_D3 (G) L8503
MDA4 N31
P29 FBA_D4 K27 FB_DLLVDD 1 2 ALL PINS NC FOR GF117/GK208 1D35V_VGA_S0
MDA5
R29 FBA_D5 FB_DLL_AVDD
MDA6
FBA_D6 33mA 34 MDB[7..0] Under GPU.
MDA7 P28 MDB0 G9
SCD1U10V2KX-5GP
32 MDA[15..8] FBA_D7 MPZ1608S300AT-GP FBB_D0
1
MDA8 J28 MDB1 E9 4 OF 17 VGA1D
MDA9 H29 FBA_D8 C8520 MDB2 G8 FBB_D1
FBA_D9 X7R FBB_D2
14/17 FBVDDQ
SC22U6D3V3MX-1-GP
MDA10 J29 (G) MDB3 F9
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC1U6D3V3KX-2GP
SC1U6D3V3KX-2GP
SC1U6D3V3KX-2GP
SC1U6D3V3KX-2GP
2
MDA11 H28 FBA_D10 C8522 MDB4 F11 FBB_D3 AA27
MDA12 G29 FBA_D11 (G) MDB5 G11 FBB_D4 FBVDDQ_1 AA30 X7R X7R X7R X7R X7R X7R X7R X7R
2
FBA_D12 FBB_D5 FBVDDQ_2
1
MDA13 E31 MDB6 F12 AB27
D MDA14 E32 FBA_D13 MDB7 G12 FBB_D6 FBVDDQ_3 AB33 C8515 C8504 C8505 C8506 C8507 C8512 C8508 C8509 D
MDA15 F30 FBA_D14 34 MDB[15..8] MDB8 G6 FBB_D7 FBVDDQ_4 AC27
2
32 MDA[23..16] MDA16 C34 FBA_D15 MDB9 F5 FBB_D8 FBVDDQ_5 AD27
D32 FBA_D16 E6 FBB_D9 FBVDDQ_6 AE27
MDA17
FBA_D17 Place close to Ball MDB10
FBB_D10 FBVDDQ_7
(G) (G) (G) (G) (G78.10523.2BL) (G78.10523.2BL)
MDA18 B33 MDB11 F6 AF27 (G78.10523.2BL) (G78.10523.2BL)
MDA19 C33 FBA_D18 MDB12 F4 FBB_D11 FBVDDQ_8 AG27
MDA20 F33 FBA_D19 MDB13 G4 FBB_D12 FBVDDQ_9 B13
MDA21 F32 FBA_D20 MDB14 E2 FBB_D13 FBVDDQ_10 B16
MDA22 H33 FBA_D21 MDB15 F3 FBB_D14 FBVDDQ_11 B19
32 MDA[31..24]
MDA23 H32 FBA_D22
FBA_D23
34 MDB[23..16] MDB16 C2 FBB_D15
FBB_D16
FBVDDQ_12
FBVDDQ_13
E13 Under GPU.
MDA24 P34 MDB17 D4 E16
FBA_D24 FBB_D17 FBVDDQ_14 1D35V_VGA_S0
MDA25 P32 MDB18 D3 E19
MDA26 P31 FBA_D25 MDB19 C1 FBB_D18 FBVDDQ_15 H10
MDA27 P33 FBA_D26 MDB20 B3 FBB_D19 FBVDDQ_16 H11
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
MDA28 L31 FBA_D27 MDB21 C4 FBB_D20 FBVDDQ_17 H12
MDA29 L34 FBA_D28 MDB22 B5 FBB_D21 FBVDDQ_18 H13
FBA_D29 FBB_D22 FBVDDQ_19
1
MDA30 L32 MDB23 C5 H14
MDA31 L33 FBA_D30 34 MDB[31..24] MDB24 A11 FBB_D23 FBVDDQ_20 H15 C8521 C8524 C8525 C8526 C8510 C8511 C8516 C8523
33 MDA[39..32] FBA_D31 FBB_D24 FBVDDQ_21
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
MDA32 AG28 MDB25 C11 H16 (G) (G)
2
MDA33 AF29 FBA_D32 U30 MDB26 D11 FBB_D25 FBVDDQ_22 H18
MDA34 AG29 FBA_D33 FBA_CMD0 T31 FBA_A0 32 MDB27 B11 FBB_D26 FBVDDQ_23 H19 (G) (G) (G) (G) (G) (G)
MDA35 AF28 FBA_D34 FBA_CMD1 U29 MDB28 D8 FBB_D27 FBVDDQ_24 H20
MDA36 AD30 FBA_D35 FBA_CMD2 R34 FBA_A2 32 MDB29 A8 FBB_D28 FBVDDQ_25 H21
MDA37 AD29 FBA_D36 FBA_CMD3 R33 FBA_A3 32 MDB30 C8 FBB_D29 FBVDDQ_26 H22
MDA38 AC29 FBA_D37 FBA_CMD4 U32 FBA_A4 32 MDB31 B8 FBB_D30 FBVDDQ_27 H23
MDA39 AD28 FBA_D38 FBA_CMD5 U33 FBA_RST 32 FBA_RST 35 MDB[39..32] MDB32 F24 FBB_D31 FBVDDQ_28 H24
33 MDA[47..40] FBA_D39 FBA_CMD6 FBA_A6 32 FBB_D32 FBVDDQ_29 Near GPU.
1
MDA40 AJ29 U28 MDB33 G23 D13 H8
MDA41 AK29 FBA_D40 FBA_CMD7 V28 FBA_A7 32 R79263 MDB34 E24 FBB_D33 FBB_CMD0 E14 FBB_A0 34 FBVDDQ_30 H9
MDA42 AJ30 FBA_D41 FBA_CMD8 V29 FBA_A8 33 MDB35 G24 FBB_D34 FBB_CMD1 F14 FBVDDQ_31 L27
FBA_D42 FBA_CMD9 FBA_A9 33 10KR2J-3-GP FBB_D35 FBB_CMD2 FBB_A2 34 FBVDDQ_32 1D35V_VGA_S0
MDA43 AK28 V30 MDB36 D21 A12 M27
MDA44 AM29 FBA_D43 FBA_CMD10 U34 FBA_A10 33 (G) MDB37 E21 FBB_D36 FBB_CMD3 B12 FBB_A3 34 FBB_RST FBVDDQ_33 N27
2
FBA_D44 FBA_CMD11 FBA_A11 33 FBB_D37 FBB_CMD4 FBB_A4 34 FBVDDQ_34
1
MDA45 AM31 U31 MDB38 G21 C14 P27
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
MDA46 AN29 FBA_D45 FBA_CMD12 V34 FBA_A12 33 MDB39 F21 FBB_D38 FBB_CMD5 B14 FBB_RST 34 R79262 FBVDDQ_35 R27
MDA47 AM30 FBA_D46 FBA_CMD13 V33 FBA_A13 33 35 MDB[47..40] MDB40 G27 FBB_D39 FBB_CMD6 G15 FBB_A6 34 FBVDDQ_36 T27
10KR2J-3-GP
33 MDA[55..48] FBA_D47 FBA_CMD14 FBA_A14 33 FBB_D40 FBB_CMD7 FBB_A7 34 FBVDDQ_37
1
C8534
SC22U4V3MX-GP
C8535
SC22U4V3MX-GP
MDA48 AN31 Y32 MDB41 D27 F15 T30
MDA49 AN32 FBA_D48 FBA_CMD15 AA31 FBA_A15 33 MDB42 G26 FBB_D41 FBB_CMD8 E15 FBB_A8 34 (G) FBVDDQ_38 T33 C8530 C8531 C8532 C8533
2
MDA50 AP30 FBA_D49 FBA_CMD16 AA29 FBA_A16 33 MDB43 E27 FBB_D42 FBB_CMD9 D15 FBB_A9 34 FBVDDQ_39 V27
2
MDA51 AP32 FBA_D50 FBA_CMD17 AA28 MDB44 E29 FBB_D43 FBB_CMD10 A14 FBB_A10 34 FBVDDQ_40 W27 (R) (R)
MDA52 AM33 FBA_D51 FBA_CMD18 AC34 FBA_A18 33 MDB45 F29 FBB_D44 FBB_CMD11 D14 FBB_A11 34 FBVDDQ_41 W30 (R) (R) (R) (R)
MDA53 AL31 FBA_D52 FBA_CMD19 AC33 FBA_A19 33 MDB46 E30 FBB_D45 FBB_CMD12 A15 FBB_A12 34 FBVDDQ_42 W33
MDA54 AK33 FBA_D53 FBA_CMD20 AA32 FBA_A20 33 MDB47 D30 FBB_D46 FBB_CMD13 B15 FBB_A13 34 FBVDDQ_43 Y27
MDA55 AK32 FBA_D54 FBA_CMD21 AA33 FBA_A21 33 35 MDB[55..48] MDB48 A32 FBB_D47 FBB_CMD14 C17 FBB_A14 34 FBVDDQ_44
33 MDA[63..56] MDA56 AD34 FBA_D55 FBA_CMD22 Y28 FBA_A22 33 MDB49 C31 FBB_D48 FBB_CMD15 D18 FBB_A15 34
MDA57 AD32 FBA_D56 FBA_CMD23 Y29 FBA_A23 33 MDB50 C32 FBB_D49 FBB_CMD16 E18 FBB_A16 34 F1
MDA58 AC30 FBA_D57
FBA_D58
FBA_CMD24
FBA_CMD25
W31 FBA_A24
FBA_A25
33
33
MDB51 B32 FBB_D50
FBB_D51
FBB_CMD17
FBB_CMD18
F18
FBB_A18 34 1D35V_VGA_S0
FB_VDDQ_SENSE Near GPU.
MDA59 AD33 Y30 MDB52 D29 A20
MDA60 AF31 FBA_D59 FBA_CMD26 AA34 FBA_A26 33 MDB53 A29 FBB_D52 FBB_CMD19 B20 FBB_A19 34 F2
MDA61 AG34 FBA_D60 FBA_CMD27 Y31 FBA_A27 33 MDB54 C29 FBB_D53 FBB_CMD20 C18 FBB_A20 34 FB_GND_SENSE
MDA62 AG32 FBA_D61 FBA_CMD28 Y34 FBA_A28 33 MDB55 B29 FBB_D54 FBB_CMD21 B18 FBB_A21 34 (G) R8501
MDA63 AG33 FBA_D62 FBA_CMD29 Y33 FBA_A29 33 35 MDB[63..56] MDB56 B21 FBB_D55 FBB_CMD22 G18 FBB_A22 34 2 1 FB_CAL_PD_VDDQ J27
FBA_D63 FBA_CMD30 FBA_A30 33 1D35V_VGA_S0 FBB_D56 FBB_CMD23 FBB_A23 34 FB_CAL_PD_VDDQ
V31 MDB57 C23 G17
FBA_CMD31 MDB58 A21 FBB_D57 FBB_CMD24 F17 FBB_A24 34 40D2R2F-GP
P30 R32 FBA_CMD_RFU0 R792331 (G) 2 MDB59 C21 FBB_D58 FBB_CMD25 D16 FBB_A25 34 FB_CAL_PU_GND H27
32 DQMA0 FBA_DQM0 NC FBA_CMD_RFU0 FBB_D59 FBB_CMD26 FBB_A26 34 FB_CAL_PU_GND
F31 AC32 FBA_CMD_RFU1 R792321 (G) 2 60D4R2F-GP MDB60 B24 A18
32 DQMA1 F34 FBA_DQM1 NC FBA_CMD_RFU1 60D4R2F-GP 20130927 Ryan MDB61 C24 FBB_D60 FBB_CMD27 D17 FBB_A27 34 20130927 Ryan
32 DQMA2 M32 FBA_DQM2 GF117/GK208 MDB62 B26 FBB_D61 FBB_CMD28 A17 FBB_A28 34 FB_CAL_TERM_GND H25
32 DQMA3 AD31 FBA_DQM3 GK107/GF108 C26 FBB_D62 FBB_CMD29 B17 FBB_A29 34 1D35V_VGA_S0 FB_CAL_TERM_GND
MDB63
33 DQMA4 AL29 FBA_DQM4 1D35V_VGA_S0 FBB_D63 FBB_CMD30 E17 FBB_A30 34
C 33 DQMA5 AM32 FBA_DQM5 FBB_CMD31 N14P-GS-A1-GP C
33 DQMA6 AF34 FBA_DQM6 R28 FBA_DEBUG0 R8522 1 (G) 2 E11 C12 FBB_CMD_RFU0 R792351 (G) 2 (GKG.PGT0V.003)
33 DQMA7 FBA_DQM7 FBA_DEBUG0 FBA_DEBUG1 34 DQMB0 FBB_DQM0 FBB_CMD_RFU0
AC28 R8523 1 (G) 2 60D4R2F-GP 34 DQMB1
E3 C20 FBB_CMD_RFU1 R792341 (G) 2 60D4R2F-GP
FBA_DEBUG1 FBB_DQM1 FBB_CMD_RFU1
1
60D4R2F-GP 34 DQMB2
A3 60D4R2F-GP R8503
M31 C9 FBB_DQM2 R8502
32 QSAP_0 FBA_DQS_WP0 34 DQMB3 FBB_DQM3 1D35V_VGA_S0
42D2R2F-GP
G31 F23 (G) 51D1R2F-GP
32 QSAP_1 FBA_DQS_WP1 35 DQMB4 FBB_DQM4
32 QSAP_2
E33 R30 35 DQMB5
F27 (G)
M33 FBA_DQS_WP2 FBA_CLK0 R31 CLKA0 32 C30 FBB_DQM5
32 QSAP_3 35 DQMB6 CALIBRATION PIN GDDR5
2
AE31 FBA_DQS_WP3 FBA_CLK0# AB31 CLKA0# 32 A24 FBB_DQM6 G14 FBB_DEBUG0 R8526 1 (G) 2
33 QSAP_4 FBA_DQS_WP4 FBA_CLK1 CLKA1 33 35 DQMB7 FBB_DQM7 FBB_DEBUG0
33 QSAP_5 AK30 AC31 G20 FBB_DEBUG1 R8527 1 (G) 2 60D4R2F-GP FB_CALx_PD_VDDQ 40.2
AN33 FBA_DQS_WP5 FBA_CLK1# CLKA1# 33 FBB_DEBUG1 60D4R2F-GP
33 QSAP_6 FBA_DQS_WP6
33 QSAP_7
AF33 34 QSBP_0
D10 FB_CALx_PU_GND 42.2
FBA_DQS_WP7 D5 FBB_DQS_WP0
34 QSBP_1 FBB_DQS_WP1
34 QSBP_2 C3 D12 FB_CALx_TERM_GND 51.1
M30 K31 B9 FBB_DQS_WP2 FBB_CLK0 E12 CLKB0 34
32 QSAN_0 FBA_DQS_RN0 FBA_WCK1 34 QSBP_3 FBB_DQS_WP3 FBB_CLK0# CLKB0# 34
32 QSAN_1
H30 L30 35 QSBP_4
E23 E20
E34 FBA_DQS_RN1 FBA_WCK1# H34 E28 FBB_DQS_WP4 FBB_CLK1 F20 CLKB1 35
32
32
QSAN_2
QSAN_3
M34 FBA_DQS_RN2 FBA_WCK23 J34
35
35
QSBP_5
QSBP_6
B30 FBB_DQS_WP5 FBB_CLK1# CLKB1# 35 PLACE CLOSE TO GPU BALLS
AF30 FBA_DQS_RN3 FBA_WCK23# AG30 A23 FBB_DQS_WP6
33 QSAN_4 FBA_DQS_RN4 FBA_WCK45 35 QSBP_7 FBB_DQS_WP7
33 QSAN_5
AK31 AG31
AM34 FBA_DQS_RN5 FBA_WCK45# AJ34
33 QSAN_6 FBA_DQS_RN6 FBA_WCK67
33 QSAN_7 AF32 AK34 32 QSBN_0 D9 F8
FBA_DQS_RN7 FBA_WCK67# E4 FBB_DQS_RN0 FBB_WCK1 E8
J30 20130927 Ryan 32
32
QSBN_1
QSBN_2 B2 FBB_DQS_RN1 FBB_WCK1# A5
FBA_WCKB1 J31 A9 FBB_DQS_RN2 FBB_WCK23 A6
THE FBA_WCKBxx 32 QSBN_3
FBA_WCKB1# J32 D22 FBB_DQS_RN3 FBB_WCK23# D24
PINS ARE USED 33 QSBN_4
FBA_WCKB23 J33 D28 FBB_DQS_RN4 FBB_WCK45 D25
ONLY ON GK107 33 QSBN_5
FBA_WCKB23# AH31 1D05V_VGA_S0 A30 FBB_DQS_RN5 FBB_WCK45# B27
THEY ARE NC 33 QSBN_6
FBA_WCKB45 AJ31 B23 FBB_DQS_RN6 FBB_WCK67 C27
FOR GK208/GF108 33 QSBN_7
FBA_WCKB45# AJ32 FBB_DQS_RN7 FBB_WCK67#
/GF117
FBA_WCKB67 AJ33 (G) D6
FBA_WCKB67# L8502 FBB_WCKB1
66mA D7
TP14 VGA_H26_TP H26 U27 FB_PLLVDD 1 2 THE FBB_WCKBxx FBB_WCKB1# C6
FB_VREF FBA_PLL_AVDD PINS ARE USED FBB_WCKB23 B6
N14P-GS-A1-GP ONLY ON GK107 FBB_WCKB23# F26
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
A27 66mA
C8517 C8518 C8527 FBB_WCKB67#
SC22U6D3V3MX-1-GP
H17 FB_PLLVDD
NC
2
FBB_PLL_AVDD
(G) (G) (G) N14P-GS-A1-GP GF108 GK107
SCD1U10V2KX-5GP
(GKG.PGT0V.003)
X7R
1
C8528
(G)
2
Near GPU
Place close to Ball
B B
Group A Group B
CKE1
CKE0
FBA_A2
FBA_A18 FBB_A2
FBA_A3 FBB_A18
FBA_A19 FBB_A3
FBB_A19
1
Reset0
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
1
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
Reset0
A
Reset1 A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
GPU_VRAM I/F(3/5)
Size Document Number Rev
A1
PIM86L/Florence 1
Date: Tuesday, February 25, 2014 Sheet 75 of 103
5 4 3 2 1
5 4 3 2 1
3D3V_VGA_S0
Since have leakage
current issue, so modify
2
1
isolation circuit.--Kai RN2008
0429 SRN2K2J-1-GP
(G)
3
4
SMB_DATA_SIO_R
PLLVDD_PWR
SMB_CLK_SIO_R
L8601
(G68.00212.051) UNDER GPU
1 2
1D05V_VGA_S0 16,17,19,41,46,47,48 SMB_CLK
16,17,19,41,46,47,48 SMB_DATA 3D3V_VGA_S0
1
1
D MHC1608S300QBP-GP (G) (G) D
SCD1U10V2KX-5GP
C8617 C8607
SC22U6D3V3MX-1-GP
2
2
NEAR GPU VGA1O 15 OF 17
1
11/17 XTAL_PLL GPIO Function
R8615 R8620
2K2R2J-2-GP
(G68.00212.051)
L8605
2K2R2J-2-GP
AD8 VGA1Q 17 OF 17 (G) (G)
1 2 SP_PLLVDD_L AE8 PLLVDD GPIO 0 Debug Service Header/FB_CLAMP_MON
1D05V_VGA_S0 10/19 MISC1
2
SP_PLLVDD T4 SMB_CLK_SIO_R R8628 1 (R) 20R2J-2-GP SMB_CLK
I2CS_SCL SMB_DATA_SIO_R R8650 1 (R) 2 0R2J-2-GPSMB_DATA GPIO 1 MEM_VDD_CTL/FAN_PWM
SC1U10V2KX-1GP
AD7 T3 3D3V_VGA_S0
NC
1
1
MHC1608S300QBP-GP (G) (G) VID_PLLVDD I2CS_SDA
1
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C8380 (G) (G) C8606 C8605 R2 I2CC_SCL_PU GPIO 2 LCD Brightness Control (BL PWM)
GF108/GK107 GF117 I2CC_SCL I2CC_SDA_PU
(G) C8618 C8602 R3
GK208
2
2
I2CC_SDA GPIO 3 LCD Power Enable (PPEN)
SC22U6D3V3MX-1-GP
GPIO8_OVERT#
SC4D7U6D3V3KX-GP
TP8609TPAD34 R7
VIDEO_CLK_XTAL_SS H1 J4 N12P_XTAL_OUTBUFF 1 TP_THERMDN K4 NC I2CB_SCL R6 GPIO9_ALERT# 1 (G) 2 R840 GPIO 4 LCD Backlight Enable (BLEN)
TPAD28-1-GP-U TP8608 100KR2J-1-GP
XTAL_SSIN XTAL_OUTBUFF THERMDN NC I2CB_SDA
TPAD28-1-GP-U TP8617 1 TP_THERMDP K3 GPIO12_AC_DETECT
100KR2J-1-GP 1 (G) 2 R852 GPIO 5 NVVDD PWM_VID_BOOT_EN
H3 H2 R8622 THERMDP GF117
GK107/GF108
XTAL_IN XTAL_OUT 10KR2J-3-GP
GK208
GPIO 6 VBOOT_ADJ/Remote Sensor Error Correction
1
N14P-GS-A1-GP 1 2 N12P_JTAG_TCK AM10
1
(GKG.PGT0V.003) 1 N12P_JTAG_TMS AP11 JTAG_TCK GPIO 7 3D STEREO
20PF 5% 50V +/-0.25PF 0402 R8605 TPAD28-1-GP-U TP8607 (R)
N12P_JTAG_TDI JTAG_TMS
(G) 10KR2J-3-GP TPAD28-1-GP-U TP8615 1 AM11
(G) R8604 TPAD28-1-GP-U TP8606 1 N12P_JTAG_TDO AP12 JTAG_TDI GPIO 8 GPU Overtemp
N12P_GPIO_JTAG_TRST JTAG_TDO GPIO0_FB_CLAMP
10KR2J-3-GP 1 2 AN11 P6 TP122 TPAD28 (G)
2
R8606 JTAG_TRST# GPIO0 M3 GPIO1_FBVDDQCTL
TP123 TPAD28 (G) GPIO 9 GPU Thermal Alert/FAN_PWM
GPIO2_BL_PWM
2
27MHZ_IN 1 1MR2J-1-GP
2 27MHZ_OUT R8621 (G) GPIO1 L6
GPIO2 GPIO3_PPEN_R
10KR2J-3-GP P5 GPIO 10 FB Vref Control
GPIO4_BLEN
2
(R) GPIO3 P7
GPIO4 GPIO5_PWM_VID_BOOT_EN
R8607 L7 TP117 TPAD28 (G) GPIO 11 NVVDD PWM_VID
GPIO5 GPIO6_FB_CLAMP_TGL_REQ
390R2J-1-GP (G63.R0034.1DL) M7 TP124 TPAD28 (G)
X8601 GPIO6 N8
GPIO7_3D_STEREO
GPIO 12 PWR_Level AC Detect
GK208 GPIO7 M1
GPIO8_OVERT#
20130910 Ryan OVERT GPIO9_ALERT#
1
3 2 GPIO8 M2 GPIO 13 NVVDD PSI
GPIO9 L1 GPIO9_ALERT# 65
GPIO10 M5
GPIO11_PWM_VID GPIO10_MEM_VREF_CTL 32,33,34,35 GPIO 14 FB_CLAMP_TGL_REG/HPD for IFP AB (not used)
GPIO11 N3 GPIO12_AC_DETECT GPIO11_PWM_VID 65
27MHZ_OUT_R GPIO12 GPIO13_NVVDD_PSI
4 1 M4 GPIO 15 HPD for IFP C (DP)
1 GPIO13 R8 GPIO13_NVVDD_PSI 65
C8610
GPIO16 NC GPIO16 GPIO16 P4 GPIO 16 Fan PWM/MEM_VDD_CTL/NVVDD PSI/FRAME LOCK
NC NC
1
GPIO20 GPIO20 P1
SC12P50V2JN-3GP XTAL-27MHZ-155-GP NC
2
(G) C8611
GPIO8 NC GPIO21 GPIO 17 HPD for IFP D (eDP)
(G) SC15P50V2JN-2-GP GK208 GF117 GK107 GF108
2
(G) GPIO 18 HPD for IFP E (DP)
1
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
R844 R848 R849 R851 R853 GPIO 19 HPD for IFP F (DP)/LVDS NVSR
(G) (G) (G) (G) (G)
GPIO 20 <not used>
N14P-GS-A1-GP
2
GPIO 21 <not used>
82.30034.A61 (GKG.PGT0V.003)
82.30034.351
C C
Strap
NVIDIA TABLE
Strap pin name Logical strapping Logical strapping Logical strapping Logical strapping
name bit3# name bit2# name bit1# name bit0# Hynix 2G Hynix 1G Samsung 1G Samsung 512 Samsung 2G
0110 0000 0011 0111 ROM_SCLK: R8626(High) R8618(Low)
PCI_DEVID[4] SUB_VENDOR PCI_DVID[5] PCI_PLL_EN_TER_M 128*16*8 64*16*8 64*16*8 64*16*4 128*16*8 Strap2: R8634(High) R8635(Low)
ROM_SCLK 800MHZ 800MHZ 800MHZ 800MHZ 800MHZ
0 0 1 0
ROM_SCLK: R8626(High) R8618(Low)
RAM_CFG[3] RAM_CFG[2] RAM_CFG[1] RAM_CFG[0]
34.8Kohm 5Kohm 20Kohm 20Kohm 45Kohm Strap2: R8634(High) R8635(Low)
ROM_SI Hynix 0 0 1 0 RO M_SIPD
Samsung 0 0 1 1 R8627 64.45325.6DL
64.34825.6DL 64.49915.6DL 64.20025.6DL 64.20025.6DL
XCLK_417 Bar_size SMB_ALT_ADDR VGA_DEVICE
ROM_SO
1 0 0 1
USER[3] USER[2] USER[1] USER[0] GPU_ROM_SI for 1Gbit for 2Gbit for 1Gbit for 2Gbit
Hynix VRAM Hynix VRAM Samsung VRAM Samsung VRAM
STRAP0 RAM_CFG[0]=0 RAM_CFG[0]=0 RAM_CFG[0]=1 RAM_CFG[0]=1
Logical Strap Bit Mapping
1 1 1 1 RAM_CFG[1]=1 RAM_CFG[1]=1 RAM_CFG[1]=1 RAM_CFG[1]=1
RAM_CFG[2]=0 RAM_CFG[2]=1 RAM_CFG[2]=0 RAM_CFG[2]=1
RAM_CFG[3]=0 RAM_CFG[3]=0 RAM_CFG[3]=0 RAM_CFG[3]=0 Resistor Pull-up Pull-down
3GPO_PADCFG[3] 3GPO_PADCFG[2] 3GPO_PADCFG[1] 3GPO_PADCFG[0]
STRAP1 5Kohms 1000 0000
0 1 1 0 10Kohms 1001 0001
GPU_ROM_SO VGA_DEVICE =1 (low bit) 15Kohms 1010 0010 TABLE
PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0] SMB_ALT_ADDR =0
STRAP2 FB_0_BAR_SIZE =0 20Kohms 1011 0011 NVIDIA 71.0N12P.E0U
XCLK_417 =0 (High bit)
1 0 0 1 25Kohms 1100 0100
30Kohms 1101 0101 N12P-GS N13P-GS N13M-GE1 N13M-GS N13P-GL
SOR3_EXPOSED SOR2_EXPOSED SOR1_EXPOSED SOR0_EXPOSED DEV ID: DEV ID: DEV ID:
STRAP3
35Kohms 1110 0110 DEV ID: DEV ID:
0 0 0 0 45Kohms 1111 0111 0x1142 0x1144 0x0DE9
GPU_ROM_SCLK PEX_PLL_EN_TERM =0
SLOT_CLK_CFG =1
0x0DF4 0x0FD2 (0010) (0100) (1001)
RESERVED PCI_SPEED_CHANGE_GEN3 PCI_MAX_SPEED DP_PLL_VDD33V SUB_VENDOR =0
STRAP4 PCI_DEVID[4] =1
N11P Fermi QS 1
0 0 1 1
STRAP2 PU 25Kohm 15Kohm 15Kohm 25Kohm 10Kohm
1
3D3V_VGA_S0 2 CS# VCC 7 USER[0]=1
R8637 STRAP0
3 SO/SIO1 HOLD# 6 R8638 USER[1]=1 Pull Low Pull Low Pull Low Pull High
1
STRAP0 STRAP4
C8436 STRAP1
2
ROM_CS#
H6
ROM_CS* stuff External EEPROM for other GPUs.--Ryan 0212
Unstuff R8633, Unstuff R8635, Unstuff R8640, Unstuff R8619 PCIE_MAX_SPEED Strap--STRAP4
ROM_SI
H5
H7
ROM_SI
ROM_SO USE 1001(10K)
STRAP0 J2 ROM_SO H4 ROM_SCLK
STRAP1 J7 STRAP0 ROM_SCLK
STRAP2 J6 STRAP1
STRAP3 J5 STRAP2 3D3V_VGA_S0
J3 STRAP3 NC
STRAP4
STRAP4 NC
GK107/GF117 GF108
GK208
L2
BUFRST#
STRAP_REF0_GND_N9 J1 L3
1
MULTI_STRAP_REF CEC
R8624 R8625
CEC IS NC FOR 10KR2F-2-GP 4K99R2F-L-GP (R) R8626
1
N14P-GS-A1-GP
2
(GKG.PGT0V.003)
1
THERMAL PROTECTION
2
Location R8624
H5TC2G63FFR-11C: 10.2K
1
(G)
C8613
MT41J128M16JT-093G: 15.4K SCD1U16V2ZY-2GP 3D3V_VGA_S0
2
E
SUB_VENDOR Strap--ROM_SI_D3
(G)
3
(G) Q8602
Q8604 1 GPU_THERM_SHUTDOWN*_1 2 1 2 R8643 1GPU_THERM_SHUTDOWN*_2 1 Q8606 R8647
PMBS3904-1-GP 10KR2J-3-GP PMBS3904-1-GP (G84.2N702.J31) G PLTRST_N_1A 2 1
PLTRST_GPU# 27,36
(G84.T3904.H11) (G) (G84.T3904.H11) 2N7002A-7-GP (G)
SMB_ALT_ADDR Strap--ROM_SLK_D4
2
R8636 1KR2J-1-GP
1
10KR2J-3-GP
S
1
C8614 (G)
1
VGA_DEVICE Strap--ROM_SO_C4
SC1KP50V2JN-2GP (G64.33025.6DL) (G78.10224.2FL) SC100P50V2JN-3GP
2
(G78.10224.2FL) R8641
33KR2J-3-GP
2
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
GPU_GPIO/STRAP(4/5)
Size Document Number Rev
Custom
PIM86L/Florence 1
Date: Monday, March 03, 2014 Sheet 76 of 103
5 4 3 2 1
5 4 3 2 1
VGA_CORE
VGA1 From 71.0N14P.00U change to 71.0N14E.00U
Under GPU 4.7uFx5 for layout and emn-- Kai 0703
1
VGA1G 7 OF 17
C11382 C11383 C11384 C11385 C11386
EDP 50A
16/17 GND_2/2
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
2
2
VGA1F 6 OF 17 N19 T28
(R) (R) (R) (R) (R) N2 GND_141 GND_170 T32
(TDP 37W)
15/17 GND_1/2
A2 AM25 N21 GND_142 GND_171 T5
AA17 GND_1 GND_71 AN1 N23 GND_143 GND_172 T7
AA18 GND_5 GND_72 AN10 N28 GND_144 GND_173 U12
AA20 GND_6 GND_73 AN13 N30 GND_145 GND_174 U14
AA22 GND_7 GND_74 AN16 N32 GND_146 GND_175 U16
AB12 GND_8 GND_75 AN19 N33 GND_147 GND_176 U19
D D
AB14 GND_9 GND_76 AN22 N5 GND_148 GND_177 U21
VGA1H 8 OF 17 AB16 GND_10 GND_77 AN25 N7 GND_149 GND_178 U23
Under GPU 4.7uFx10 13/17 NVVDD AB19 GND_11 GND_78 AN30 P13 GND_150 GND_179 V12
AB2 GND_12 GND_79 AN34 P15 GND_151 GND_180 V14
AA12 AB21 GND_13 GND_80 AN4 P17 GND_152 GND_181 V16
AA14 VDD_1 A33 GND_14 GND_81 AN7 P18 GND_153 GND_182 V19
AA16 VDD_2 AB23 GND_2 GND_82 AP2 P20 GND_154 GND_183 V21
AA19 VDD_3 AB28 GND_15 GND_83 AP33 P22 GND_155 GND_184 V23
VDD_4 GND_16 GND_84 GND_156 GND_185
1
1
AA21 AB30 B1 R12 W13
C8721 C8713 C8712 C8711 C8704 C8703 C8702 C8701 C8706 C8705 AA23 VDD_5 AB32 GND_17 GND_85 B10 R14 GND_157 GND_186 W15
VDD_6 GND_18 GND_86 GND_158 GND_187
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
AB13 AB5 B22 R16 W17
2
2
AB15 VDD_7 AB7 GND_19 GND_87 B25 R19 GND_159 GND_188 W18
(G) (G) (G) (G) (G) (G) (G) (G) (G) (G) AB17 VDD_8 AC13 GND_20 GND_88 B28 R21 GND_160 GND_189 W20
AB18 VDD_9 AC15 GND_21 GND_89 B31 R23 GND_161 GND_190 W22
AB20 VDD_10 AC17 GND_22 GND_90 B34 T13 GND_162 GND_191 W28
AB22 VDD_11 AC18 GND_23 GND_91 B4 T15 GND_163 GND_192 Y12
AC12 VDD_12 AA13 GND_24 GND_92 B7 T17 GND_164 GND_193 Y14
AC14 VDD_13 AC20 GND_3 GND_93 C10 T18 GND_165 GND_194 Y16
AC16 VDD_14 AC22 GND_25 GND_94 C13 T2 GND_166 GND_195 Y19
AC19 VDD_15 AE2 GND_26 GND_95 C19 T20 GND_167 GND_196 Y21
AC21 VDD_16 AE28 GND_27 GND_96 C22 T22 GND_168 GND_197 Y23
Under GPU 1uFx4 AC23 VDD_17 AE30 GND_28 GND_97 C25 GND_169 GND_198
M12 VDD_18 AE32 GND_29 GND_98 C28
M14 VDD_19 AE33 GND_30 GND_99 C7
M16 VDD_20 AE5 GND_31 GND_100 D2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C8719
C8718
C8717
C11390
C11387
C11388
C11389
1
C8745
SC22U4V3MX-GP
C8744
SC22U4V3MX-GP
C8743
SC22U4V3MX-GP
C8732
SC22U4V3MX-GP
C8733
SC22U4V3MX-GP
C8736
SC22U4V3MX-GP
T14 AL17 G7
C8737 T16 VDD_44 AL18 GND_54 GND_124 K2
VDD_45 GND_55 GND_125
SC22U6D3V3MX-1-GP
(R) (R) (R) (R) (R) (R) T21 VDD_46 AL20 GND_56 GND_126 K30
T23 VDD_47 AL21 GND_57 GND_127 K32
U13 VDD_48 AL23 GND_58 GND_128 K33
U15 VDD_49 AL24 GND_59 GND_129 K5
Add power dummy symbol--Kai 0703
U17 VDD_50 AL26 GND_60 GND_130 K7
U18 VDD_51 AL28 GND_61 GND_131 M13
U20 VDD_52 AL30 GND_62 GND_132 M15
U22 VDD_53 AL32 GND_63 GND_133 M17 VGA_CORE
NEAR TO GPU 4.7uFx5 V13 VDD_54 AL33 GND_64 GND_134 M18 VGA1I 9 OF 17
V15 VDD_55 AL5 GND_65 GND_135 M20 9/17 XVDD
V17 VDD_56 AM13 GND_66 GND_136 M22
V18 VDD_57 AM16 GND_67 GND_137 N12 CONFIGURABLE
V20 VDD_58 AM19 GND_68 GND_138 N14 POWER
VDD_59 GND_69 GND_139
1
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
W14 U2
2
(GKG.PGT0V.003) V6
C8726 C8725 XVDD_14 V7
XVDD_15
SC4D7U6D3V5KX-3GP
SC4D7U6D3V5KX-3GP
V8
2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
D20 L8
D23 NC#D20 VDD33_1 M8 Y1
NC#D23 VDD33_2 X7R X7R X7R XVDD_23
1
1
D26 C8710 Y2
H31 NC#D26 C8746 (G) C8709 C8739 C8740 XVDD_24 Y3
NC#H31 XVDD_25
SC1U10V2KX-1GP
SC4D7U6D3V3KX-GP
V32 Y4
2
2
NC#V32 XVDD_26 Y5
AC6 (G) (G) (G) (G) XVDD_27 Y6
AJ4 DNU#AC6 DO NOT XVDD_28 Y7
NEAR TO GPU DNU#AJ4 XVDD_29
1
CONNECT
AJ5 Y8
DNU#AJ5 XVDD_30
47uF x1 TC8701 C8738 AL11
DNU#AL11
THESE
SC47U6D3V5MX-1-GP
ST330U2VDM-6-GP
PINS
(G) T8
330uF x1
2
GPU_PWR/GND(5/5)
Size Document Number Rev
1U NEAR TO GPU Custom
1
PIM86L-Florence
Tuesday, February 25, 2014
Date: Sheet 77 of 103
5 4 3 2 1
5 4 3 2 1
1D35V_VGA_S0
VRAM1
MDA[23..16] 29
K8 E3 MDA23
K2 VDD DQ0 F7 MDA19
N1 VDD DQ1 F2 MDA22
R9 VDD DQ2 F8 MDA16
B2 VDD DQ3 H3 MDA21
D9 VDD DQ4 H8 MDA18
G7 VDD DQ5 G2 MDA20
R1 VDD DQ6 H7 MDA17
D N9 VDD DQ7 1D35V_VGA_S0 D
VDD MDA[15..8] 29
D7 MDA12
A8 DQ8 C3 MDA8
VDDQ DQ9
1
A1 C8 MDA15
C1 VDDQ DQ10 C2 MDA10 R8816
C9 VDDQ DQ11 A7 MDA13 1K33R2F-GP
D2 VDDQ DQ12 A2 MDA9 (G)
E9 VDDQ DQ13 B8 MDA14
2
F1 VDDQ DQ14 A3 MDA11
H9 VDDQ DQ15 VRAM1_VREFDQ
H2 VDDQ C7
VDDQ UDQS QSAP_1 75
1
B7
UDQS# QSAN_1 75
1
VRAM1_VREFDQ H1 C8818 R8817
VRAM1_VREFCA VREFDQ
SCD01U16V2KX-3GP
M8 F3 1K33R2F-GP
VREFCA LDQS QSAP_2 75
R8810 1 2 243R2F-2-GP VRAM_ZQ1 L8 G3 (G)
QSAN_2 75
2
ZQ LDQS# (G)
2
(G) K1
ODT FBA_A2 75
N3
75 FBA_A9 P7 A0
75 FBA_A11 P3 A1 L2
75 FBA_A8 A2 CS# FBA_A0 75
N2 T2
75 FBA_A25 A3 RESET# FBA_RST 75
P8
75 FBA_A10 A4
P2
75 FBA_A24 R8 A5 T7
75 FBA_A22 R2 A6 NC#T7 L9
FBA_A4 75 DG requires 5x0.1uF and 2x1.0uF and 1x10uF per
75 FBA_A7 A7 NC#L9
75 FBA_A21
T8
R3 A8 NC#L1
L1
J9
VRAM chip
75 FBA_A6 A9 NC#J9
L7 J1
75 FBA_A29 R7 A10/AP NC#J1
75 FBA_A23 N7 A11
75 FBA_A28 A12/BC# 1D35V_VGA_S0
T3 J8
75 FBA_A20 M7 A13 VSS M1
75 FBA_A14 NC#M7 VSS M9
VSS J2
M2 VSS P9
75 FBA_A12 BA0 VSS VRAM1_VREFCA
N8 G8
75 FBA_A27 BA1 VSS
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
M3 B3
75 FBA_A26 BA2 VSS
1
T1
VSS
1
A9 C8817 C8801 C8803 C8865 C8866 C8867
VSS
SCD01U16V2KX-3GP
J7 T9
29 CLKA0
2
K7 CK VSS E1
29 CLKA0#
2
CK# VSS P1 (G) (G) (G) (G) (G) (G)
VSS 1D35V_VGA_S0
K9
R79261 75 FBA_A3 CKE G1
1 2 VSSQ F9
D3 VSSQ E8
75 DQMA1 E7 UDM VSSQ E2
162R2F-GP 75 DQMA2 LDM VSSQ D8
FOR VRAM1
SC10U6D3V3MX-GP
VSSQ
1
(G) D1
R79186 R79187 L3 VSSQ B9
75 FBA_A13 WE# VSSQ
1
C 40D2R2F-GP 40D2R2F-GP K3 B1 C
75 FBA_A15 J3 CAS# VSSQ G9
(R) (R) C8809
75 FBA_A30 RAS# VSSQ
1
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
2
2
CLKA0_RC C8804 C8805 C8806 C8623 (G)
MT41J128M16JT-107G-K-GP (G) (G) (G) (G)
2
(HKN.2GB0G.038,MVR.2GB04.003)
1
C8819
SCD01U16V2KX-3GP
2
(R)
1
C11378
SCD01U16V2KX-3GP
(G) K1
N3 ODT FBA_A2 75 DG requires 5x0.1uF and 2x1.0uF and 1x10uF per
75 FBA_A9
2
A0
75 FBA_A11
P7
P3 A1 L2
(G) VRAM chip
75 FBA_A8 A2 CS# FBA_A0 75
N2 T2
75 FBA_A25 A3 RESET# FBA_RST 75
P8
75 FBA_A10 P2 A4
75 FBA_A24 R8 A5 T7 1D35V_VGA_S0
75 FBA_A22 A6 NC#T7 FBA_A4 75
R2 L9
75 FBA_A7 T8 A7 NC#L9 L1
75 FBA_A21 A8 NC#L1
R3 J9
75 FBA_A6 L7 A9 NC#J9 J1
75 FBA_A29 R7 A10/AP NC#J1
75 FBA_A23 A11
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
N7
75 FBA_A28 A12/BC#
1
T3 J8
75 FBA_A20 A13 VSS
M7 M1 C8802 C8807 C8868 C8869 C8870
75 FBA_A14 NC#M7 VSS M9
2
VSS J2
VSS 1D35V_VGA_S0
M2 P9 (G) (G) (G) (G) (G)
75 FBA_A12 N8 BA0 VSS G8
75 FBA_A27 BA1 VSS
M3 B3
75 FBA_A26 BA2 VSS T1
VSS A9
J7 VSS T9
SC10U6D3V3MX-GP
29 CLKA0 K7 CK VSS E1
29 CLKA0# CK# VSS P1
VSS
1
K9
75 FBA_A3 CKE G1 C8824
VSSQ F9
2
VSSQ
1
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
D3 E8 (G)
75 DQMA0 UDM VSSQ
E7 E2 C8808 C8815 C8820 C8627
75 DQMA3 LDM VSSQ D8 (G) (G) (G) (G)
2
VSSQ D1
L3 VSSQ B9
75 FBA_A13 K3 WE# VSSQ B1
75 FBA_A15 CAS# VSSQ
J3 G9
75 FBA_A30 RAS# VSSQ
FOR VRAM2
A MT41J128M16JT-107G-K-GP A
(HKN.2GB0G.038,MVR.2GB04.003)
CLOSE TO THE MEMORY
Under GPU.
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
GPU-VRAM1 (1/4)
Size Document Number Rev
D
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 78 of 103
5 4 3 2 1
5 4 3 2 1
1
P7
75 FBA_A11 P3 A1 L2 R8819
75 FBA_A8
N2 A2 CS# T2
FBA_A16 75
1K33R2F-GP DG requires 5x0.1uF and 2x1.0uF and 1x10uF per
75 FBA_A25 A3 RESET# FBA_RST 75
75 FBA_A10
P8
P2 A4
(G)
VRAM3_VREFCA
VRAM chip
75 FBA_A24
1 2
R8 A5 T7
75 FBA_A22 A6 NC#T7 FBA_A4 75
R2 L9
75 FBA_A7 A7 NC#L9
1
T8 L1 C8827 R8820
75 FBA_A21 A8 NC#L1 1D35V_VGA_S0
SCD01U16V2KX-3GP
R3 J9 1K33R2F-GP
75 FBA_A6 A9 NC#J9
L7 J1 (G)
75 FBA_A29
2
R7 A10/AP NC#J1 (G)
75 FBA_A23
2
N7 A11
75 FBA_A28 A12/BC#
T3 J8
75 FBA_A20 M7 A13 VSS M1
75 FBA_A14 NC#M7 VSS
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
M9
VSS
1
J2
M2 VSS P9 C8821 C8822 C8871 C8872 C8873
75 FBA_A12 BA0 VSS
N8 G8
75 FBA_A27
2
M3 BA1 VSS B3
75 FBA_A26 BA2 VSS T1 (G) (G) (G) (G) (G)
29 CLKA1
J7
VSS
VSS
A9
T9
FOR VRAM3 1D35V_VGA_S0
K7 CK VSS E1
29 CLKA1# CK# VSS P1
R79266 VSS
K9
1 2 75 FBA_A19 CKE G1
SC10U6D3V3MX-GP
VSSQ F9
D3 VSSQ E8
162R2F-GP 75 DQMA6 UDM VSSQ
1
E7 E2 VRAM3_VREFDQ
75 DQMA7 LDM VSSQ
1
(G) D8 C8830
VSSQ
1
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
R79245 R79246 D1
2
VSSQ
1
40D2R2F-GP 40D2R2F-GP L3 B9 C8829 C8823 C8825 C8826 C8624 (G)
75 FBA_A13 WE# VSSQ
SCD01U16V2KX-3GP
(R) (R) K3 B1 (G) (G) (G) (G)
75 FBA_A15
2
J3 CAS# VSSQ G9
75 FBA_A30
2
CLKA1_RC RAS# VSSQ (G)
MT41J128M16JT-107G-K-GP
1
C C11371 C
(HKN.2GB0G.038,MVR.2GB04.003)
SCD01U16V2KX-3GP
2
(R)
CLOSE TO THE MEMORY
Under GPU.
1
B A1 C8 MDA32 C11379 B
VDDQ DQ10
SCD01U16V2KX-3GP
C1 C2 MDA36
C9 VDDQ DQ11 A7 MDA35
2
D2 VDDQ DQ12 A2 MDA39 (G)
E9 VDDQ DQ13 B8 MDA34
F1 VDDQ DQ14 A3 MDA38
H9 VDDQ DQ15
H2 VDDQ C7
VDDQ UDQS B7
QSAP_4
QSAN_4
75
75
DG requires 5x0.1uF and 2x1.0uF and 1x10uF per
UDQS#
VRAM3_VREFDQ
VRAM3_VREFCA
H1
M8 VREFDQ F3
VRAM chip
VREFCA LDQS QSAP_5 75
R79247 1 2 243R2F-2-GP VRAM_ZQ4 L8 G3
ZQ LDQS# QSAN_5 75
(G) K1
ODT FBA_A18 75 1D35V_VGA_S0
N3
75 FBA_A9 A0
P7
75 FBA_A11 P3 A1 L2
75 FBA_A8 A2 CS# FBA_A16 75
N2 T2
75 FBA_A25 A3 RESET# FBA_RST 75
P8
75 FBA_A10 P2 A4
75 FBA_A24 A5
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
R8 T7
75 FBA_A22 A6 NC#T7 FBA_A4 75
FOR VRAM4
1
R2 L9
75 FBA_A7 A7 NC#L9
T8 L1 C8832 C8833 C8874 C8875 C8876
75 FBA_A21 R3 A8 NC#L1 J9
75 FBA_A6 1D35V_VGA_S0
2
L7 A9 NC#J9 J1
75 FBA_A29 A10/AP NC#J1
R7 (G) (G) (G) (G) (G)
75 FBA_A23 N7 A11
75 FBA_A28 A12/BC#
T3 J8
75 FBA_A20 M7 A13 VSS M1
75 FBA_A14 NC#M7 VSS M9
SC10U6D3V3MX-GP
VSS J2
M2 VSS P9
75 FBA_A12 BA0 VSS
1
N8 G8
75 FBA_A27 M3 BA1 VSS B3 C8837
75 FBA_A26 BA2 VSS T1
2
VSS A9 (G)
VSS
1
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
J7 T9
29 CLKA1 CK VSS
K7 E1 C8834 C8835 C8836 C8628
29 CLKA1# CK# VSS P1 (G) (G) (G) (G)
2
K9 VSS
75 FBA_A19 CKE G1
VSSQ F9
D3 VSSQ E8
75 DQMA4 E7 UDM VSSQ E2
75 DQMA5 LDM VSSQ D8
VSSQ D1
L3 VSSQ B9
75 FBA_A13
K3 WE# VSSQ B1 CLOSE TO THE MEMORY
75 FBA_A15
75 FBA_A30
J3 CAS#
RAS#
VSSQ
VSSQ
G9 Under GPU.
A A
MT41J128M16JT-107G-K-GP
(HKN.2GB0G.038,MVR.2GB04.003)
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
GPU-VRAM3 (2/4)
Size Document Number Rev
D
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 79 of 103
5 4 3 2 1
5 4 3 2 1
1
A1 C8 MDB11
C1 VDDQ DQ10 C2 MDB15 R8832
C9 VDDQ DQ11 A7 MDB9 1K33R2F-GP
D2 VDDQ DQ12 A2 MDB13 (G)
E9 VDDQ DQ13 B8 MDB10
2
F1 VDDQ DQ14 A3 MDB14
H9 VDDQ DQ15 VRAM5_VREFCA
H2 VDDQ C7
VDDQ UDQS QSBP_1 75
1
B7
UDQS# QSBN_1 75
1
VRAM5_VREFDQ H1 C8838 R8833
VRAM5_VREFCA VREFDQ
SCD01U16V2KX-3GP
M8 F3 1K33R2F-GP
VREFCA LDQS QSBP_2 75
R79248 1 2 243R2F-2-GP VRAM_ZQ5 L8 G3 (G)
QSBN_2 75
2
ZQ LDQS# (G)
2
(G) K1
ODT FBB_A2 75
N3
75 FBB_A9 P7 A0 DG requires 5x0.1uF and 2x1.0uF and 1x10uF per
75 FBB_A11 A1
75 FBB_A8
P3
N2 A2 CS#
L2
T2
FBB_A0 75 VRAM chip
75 FBB_A25 A3 RESET# FBB_RST 75
P8
75 FBB_A10 A4
P2
75 FBB_A24 R8 A5 T7
75 FBB_A22 A6 NC#T7 FBB_A4 75 1D35V_VGA_S0
R2 L9
75 FBB_A7 T8 A7 NC#L9 L1
75 FBB_A21 R3 A8 NC#L1 J9
75 FBB_A6 A9 NC#J9
L7 J1
75 FBB_A29 R7 A10/AP NC#J1
75 FBB_A23 A11
N7
75 FBB_A28 A12/BC#
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
T3 J8
75 FBB_A20 A13 VSS
FOR VRAM5
1
M7 M1
75 FBB_A14 NC#M7 VSS M9 C8810 C8811 C8877 C8878 C8879
VSS J2 VRAM5_VREFDQ
2
M2 VSS P9
75 FBB_A12 N8 BA0 VSS G8 1D35V_VGA_S0
(G) (G) (G) (G) (G)
75 FBB_A27 BA1 VSS
1
M3 B3 C8840
75 FBB_A26 BA2 VSS
SCD01U16V2KX-3GP
T1
VSS A9
2
J7 VSS T9 (G)
29 CLKB0 K7 CK VSS E1
SC10U6D3V3MX-GP
29 CLKB0# CK# VSS P1
R79267 VSS
K9
75 FBB_A3 CKE
1
1 2 G1
VSSQ F9 C8841
D3 VSSQ E8
75 DQMB1
2
162R2F-GP UDM VSSQ
1
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
E7 E2 (G)
75 DQMB2 LDM VSSQ
1
(G) D8 C8812 C8813 C8814 C8625
R79250 R79249 VSSQ D1 (G) (G) (G) (G)
2
40D2R2F-GP 40D2R2F-GP L3 VSSQ B9
75 FBB_A13 K3 WE# VSSQ B1
(R) (R)
75 FBB_A15 J3 CAS# VSSQ G9
75 FBB_A30
2
C CLKB0_RC RAS# VSSQ C
MT41J128M16JT-107G-K-GP
1
C11372 (HKN.2GB0G.038,MVR.2GB04.003)
SCD01U16V2KX-3GP
CLOSE TO THE MEMORY
Under GPU.
2
(R)
1D35V_VGA_S0
VRAM6
MDB[7..0] 29
K8 E3 MDB3
K2 VDD DQ0 F7 MDB7
N1 VDD DQ1 F2 MDB0
R9 VDD DQ2 F8 MDB5
B2 VDD DQ3 H3 MDB1
D9 VDD DQ4 H8 MDB6
G7 VDD DQ5 G2 MDB2
R1 VDD DQ6 H7 MDB4
B N9 VDD DQ7 B
VDD MDB[31..24] 29
D7 MDB30
A8 DQ8 C3 MDB25
A1 VDDQ DQ9 C8 MDB31
C1 VDDQ DQ10 C2 MDB27
C9 VDDQ DQ11 A7 MDB28
D2 VDDQ DQ12 A2 MDB26
E9 VDDQ DQ13 B8 MDB29
F1 VDDQ DQ14 A3 MDB24
H9 VDDQ DQ15 DG requires 5x0.1uF and 2x1.0uF and 1x10uF per
VDDQ
H2
VDDQ UDQS
C7
B7
QSBP_3 75 VRAM5_VREFDQ
VRAM chip
VRAM5_VREFDQ UDQS# QSBN_3 75
H1
VRAM5_VREFCA M8 VREFDQ F3
VREFCA LDQS QSBP_0 75
1
R79251 1 2 243R2F-2-GP VRAM_ZQ6 L8 G3 C11380
ZQ LDQS# QSBN_0 75
SCD01U16V2KX-3GP
K1 1D35V_VGA_S0
(G) FBB_A2 75
2
N3 ODT (G)
75 FBB_A9 P7 A0
75 FBB_A11 P3 A1 L2
75 FBB_A8 A2 CS# FBB_A0 75
N2 T2
75 FBB_A25 A3 RESET# FBB_RST 75
P8
75 FBB_A10 A4
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
P2
75 FBB_A24 A5
FOR VRAM6
1
R8 T7
75 FBB_A22 A6 NC#T7 FBB_A4 75
R2 L9 C8843 C8844 C8880 C8881 C8882
75 FBB_A7 A7 NC#L9
T8 L1
75 FBB_A21
2
R3 A8 NC#L1 J9
75 FBB_A6 A9 NC#J9
L7 J1 (G) (G) (G) (G) (G)
75 FBB_A29 R7 A10/AP NC#J1 1D35V_VGA_S0
75 FBB_A23 N7 A11
75 FBB_A28 A12/BC#
T3 J8
75 FBB_A20 M7 A13 VSS M1
75 FBB_A14 NC#M7 VSS M9
VSS J2
SC10U6D3V3MX-GP
M2 VSS P9
75 FBB_A12 BA0 VSS
N8 G8
75 FBB_A27 BA1 VSS
1
M3 B3
75 FBB_A26 BA2 VSS T1 C8848
VSS
1
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
A9
2
J7 VSS T9 C8845 C8846 C8847 C8629 (G)
29 CLKB0 CK VSS
K7 E1 (G) (G) (G) (G)
29 CLKB0#
2
CK# VSS P1
K9 VSS
75 FBB_A3 CKE G1
VSSQ F9
D3 VSSQ E8
75 DQMB3 E7 UDM VSSQ E2
75 DQMB0 LDM VSSQ D8
VSSQ D1
L3 VSSQ B9 CLOSE TO THE MEMORY
A 75 FBB_A13
75 FBB_A15
K3 WE#
CAS#
VSSQ
VSSQ
B1 Under GPU. A
J3 G9
75 FBB_A30 RAS# VSSQ
MT41J128M16JT-107G-K-GP
(HKN.2GB0G.038,MVR.2GB04.003)
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
GPU-VRAM2 (3/4)
Size Document Number Rev
D
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 80 of 103
5 4 3 2 1
5 4 3 2 1
1D35V_VGA_S0
VRAM7
MDB[39..32] 29
K8 E3 MDB32
K2 VDD DQ0 F7 MDB35
N1 VDD DQ1 F2 MDB38
R9 VDD DQ2 F8 MDB33
B2 VDD DQ3 H3 MDB36
D9 VDD DQ4 H8 MDB39
G7 VDD DQ5 G2 MDB34
R1 VDD DQ6 H7 MDB37
N9 VDD DQ7
D VDD MDB[55..48] 29 D
D7 MDB48
A8 DQ8 C3 MDB53
A1 VDDQ DQ9 C8 MDB50 1D35V_VGA_S0
C1 VDDQ DQ10 C2 MDB55
C9 VDDQ DQ11 A7 MDB51
VDDQ DQ12
1
D2 A2 MDB54
E9 VDDQ DQ13 B8 MDB49 R8843
F1 VDDQ DQ14 A3 MDB52 1K33R2F-GP
H9 VDDQ DQ15 (G)
H2 VDDQ C7
QSBP_6 75
2
VDDQ UDQS B7
VRAM7_VREFDQ H1 UDQS# QSBN_6 75 VRAM7_VREFCA DG requires 5x0.1uF and 2x1.0uF and 1x10uF per
VREFDQ
VRAM7_VREFCA M8
VREFCA LDQS
F3
QSBP_4 75 VRAM chip
1
R79252 1 2 243R2F-2-GP VRAM_ZQ7 L8 G3
ZQ LDQS# QSBN_4 75
1
C8854 R8844
SCD01U16V2KX-3GP
(G) K1 1K33R2F-GP
ODT FBB_A18 75
N3 (G)
75 FBB_A9 1D35V_VGA_S0
2
P7 A0 (G)
75 FBB_A11
2
P3 A1 L2
75 FBB_A8 A2 CS# FBB_A16 75
N2 T2
75 FBB_A25 A3 RESET# FBB_RST 75
P8
75 FBB_A10 P2 A4
75 FBB_A24 A5
R8 T7
75 FBB_A22 A6 NC#T7 FBB_A4 75
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
R2 L9
75 FBB_A7 A7 NC#L9
FOR VRAM7
1
T8 L1
75 FBB_A21 A8 NC#L1
R3 J9 C8849 C8850 C8883 C8885 C8884
75 FBB_A6 L7 A9 NC#J9 J1
75 FBB_A29
2
R7 A10/AP NC#J1
75 FBB_A23 N7 A11 (G) (G) (G) (G) (G)
75 FBB_A28 T3 A12/BC# J8 1D35V_VGA_S0
75 FBB_A20 A13 VSS
M7 M1
75 FBB_A14 NC#M7 VSS M9
VSS J2
M2 VSS P9
75 FBB_A12 N8 BA0 VSS G8
SC10U6D3V3MX-GP
75 FBB_A27 BA1 VSS VRAM7_VREFDQ
M3 B3
75 FBB_A26 BA2 VSS T1
VSS
1
A9
VSS
1
J7 T9 C8856 C8857
29 CLKB1 CK VSS
1
SCD01U16V2KX-3GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
K7 E1
29 CLKB1#
2
CK# VSS P1 C8851 C8852 C8853 C8626 (G)
R79268
2
K9 VSS (G) (G) (G) (G) (G)
75 FBB_A19
2
1 2 CKE G1
VSSQ F9
D3 VSSQ E8
162R2F-GP 75 DQMB6 UDM VSSQ
E7 E2
75 DQMB4 LDM VSSQ
1
(G) D8
R79254 R79253 VSSQ D1
40D2R2F-GP 40D2R2F-GP L3 VSSQ B9
75 FBB_A13 K3 WE# VSSQ B1
(R) (R)
C 75 FBB_A15
J3 CAS# VSSQ G9 CLOSE TO THE MEMORY C
75 FBB_A30 Under GPU.
2
CLKB1_RC RAS# VSSQ
MT41J128M16JT-107G-K-GP
1
C11373 (HKN.2GB0G.038,MVR.2GB04.003)
SCD01U16V2KX-3GP
Add VRAM decoupling cap--Kai 0315
2
(R)
Add VRAM decoupling cap--Kai 0329
1
N2 T2 C11381
75 FBB_A25 A3 RESET# FBB_RST 75
SCD01U16V2KX-3GP
P8
75 FBB_A10 A4
P2
75 FBB_A24
2
R8 A5 T7 (G)
75 FBB_A22 A6 NC#T7 FBB_A4 75
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
R2 L9
75 FBB_A7 A7 NC#L9
FOR VRAM8
1
T8 L1
75 FBB_A21 R3 A8 NC#L1 J9 C8859 C8860 C8886 C8888 C8887
75 FBB_A6 A9 NC#J9
L7 J1
75 FBB_A29
2
R7 A10/AP NC#J1
75 FBB_A23 A11 1D35V_VGA_S0
N7 (G) (G) (G) (G) (G)
75 FBB_A28 T3 A12/BC# J8
75 FBB_A20 M7 A13 VSS M1
75 FBB_A14 NC#M7 VSS M9
VSS J2
M2 VSS P9
SC10U6D3V3MX-GP
75 FBB_A12 N8 BA0 VSS G8
75 FBB_A27 M3 BA1 VSS B3
75 FBB_A26 BA2 VSS
1
T1
VSS A9 C8864
J7 VSS T9
29 CLKB1
2
CK VSS
1
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
K7 E1 (G)
29 CLKB1# CK# VSS P1 C8862 C8861 C8863 C8630
K9 VSS (G) (G) (G) (G)
75 FBB_A19
2
CKE G1
VSSQ F9
D3 VSSQ E8
75 DQMB5 E7 UDM VSSQ E2
75 DQMB7 LDM VSSQ D8
VSSQ D1
L3 VSSQ B9
75 FBB_A13 K3 WE# VSSQ B1
75 FBB_A15 J3 CAS# VSSQ G9 CLOSE TO THE MEMORY
A 75 FBB_A30 RAS# VSSQ Under GPU. A
MT41J128M16JT-107G-K-GP
(HKN.2GB0G.038,MVR.2GB04.003)
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
GPU-VRAM4 (4/4)
Size Document Number Rev
D
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 81 of 103
5 4 3 2 1
5 4 3 2 1
5V_S0
Vgs @ 4.5V, VIN RIPPLE CURRENT Imax=5.86.A DCBATOUT_VGA_CORE DCBATOUT DCBATOUT_VGA_CORE
Id = 18A,
1
PR1001 Rds(on) = 9~11.5mohm,
2D2R5J-1-GP PR8251 1 2 0R0805-PAD-2-GP-U
(G)
1
(G) PR8250 1 2 0R0805-PAD-2-GP-U
2
PR991
D D
2D2R5J-1-GP 84.SRA12.037 SIRA12DP (G) (G) (G) (G) (G) (G) PR8252 1 2 0R0805-PAD-2-GP-U
1
PC9232 PC9968 PC9969 PC835 PC837 PC838
Vgs @ 4.5V,
5
6
7
8
5
6
7
8
SCD1U25V3KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
PR8253 1 2 0R0805-PAD-2-GP-U
Id = 20A,
2
1
D
D
D
D
D
D
D
D
(G) PU48 PU49
2
PC153 Rds(on) = 4.4~6.0mohm,SIR472ADP-T1-GE3-GP SIR472ADP-T1-GE3-GP
1
SC2D2U10V3KX-1GP (G) add Short pad -- Jimmy 1007 (R)
1
PU50 PC834 PTC22
SE47U25VM-14-GP
SC1U16V3KX-2GP 4 4
2
NCP81172_VCC 15 21 NCP81172_PVCC
S
S
S
S
S
S
2
VCC PVCC
3
2
1
3
2
1
25 22 (G)
GND PGND PR4633
(G) (G)
2D2R5J-1-GP VDDC_PWR
2 PWR_VGA_CORE_UGATE1 1 2PWR_VGA_CORE_UGATE1_R
HG1 PWR_VGA_CORE_UGATE1_R
0.36uH, DCR=1.05~1.2mohm, Idc=30A
1 (G)
PWR_VGA_CORE_EN 3 BST1 24 PR4635 (G)
PWR_VGA_CORE_PSI 4 EN PH1 23 2D2R5J-1-GP PC839 SCD1U50V3KX-GP (G)
PWR_VGA_CORE_PGOOD 16 PSI LG1 PWR_VGA_CORE_BOOT1 1 2PWR_VGA_CORE_BOOT1_1 1 2 PL401 2IND-D36UH-19-GP
PWR_VGA_CORE_TALERT 14 PGOOD
(R) PWR_VGA_CORE_VID 5 TALERT# 17 PWR_VGA_CORE_PHASE1
PR918 2 1 100KR2F-L1-GP (G) VID HG2 18 VDDC_PWR VGA_CORE
3D3V_VGA_S0 BST2
2
PR926 2 1 100KR2F-L1-GP NCP81172_TSENSE 13 19 (G)
3D3V_VGA_S0 TSNS PH2
5
6
7
8
1
20 PWR_VGA_CORE_LGATE1 PR4637 (G) (G) (G)
LG2
5
6
7
8
D
D
D
D
PR1002 1 20R2J-2-GP PR1003 (G) (G) 2D2R5J-1-GP PC836 PTC30 PTC23
21,30,66 DGPU_PWROK
D
D
D
D
ST330U2VDM-6-GP
ST330U2VDM-6-GP
1 2 0R0402-PAD PR994 1 2 20KR2F-L-GP PWR_VGA_CORE_VREF 8 PR4634 PQ89
SC22U6D3V5MX-2GP
1NCP81172_PH1_SB
30 GPIO9_ALERT#
2
PWR_VGA_CORE_REFIN VREF NCP81172_FBRTN
SIRA12DP-T1-GE3-GP
(G) 7 10 2D2R5J-1-GP PQ90
1
REFIN FBRTN NCP81172_FB PWR_VGA_CORE_UGATE2
SIRA12DP-T1-GE3-GP
6 11 1 2
VIDBUF FB
1
(R) (G) 9 12 NCP81172_COMP (G) 4
G
1 2 SC1000P50V3JN-GP-U FS COMP 4
S
S
S
PC790 PC841 PR4636
G
SCD1U25V2KX-GP
S
S
S
2D2R5J-1-GP
PWR_VGA_CORE_REFADJ
2
3
2
1
1
PWR_VGA_CORE_TON
NCP81172MNTXG-GP-U PWR_VGA_CORE_BOOT2 1 2 (G)
3
2
1
PR1004 (G) (G) PC154
PWR_VGA_CORE_BOOT2_1
PWR_VGA_CORE_VREF_1
30 GPIO11_PWM_VID 1 2 0R0402-PAD PR9238 SC1500P50V3KX-GP
PWR_VGA_CORE_PHASE2
2KR2F-3-GP 330uF/2.5V, ESR=9mohm
2
(R)
2
(G)
1
(G) PC615
PWR_VGA_CORE_VREF PR9235 1 2 5K9R3F-3-GP SC2700P50V3KX-1GP PWR_VGA_CORE_LGATE2 (G)
C C
2
DCBATOUT_VGA_CORE
1
(G) R79175
PR995 1 2 20KR2F-L-GP
1
6K98R2F-GP
NCP81172_TSENSE (G) (G)
PR981
2
1
(G) 49K9R2F-L-GP
PC344
2
SCD1U16V2ZY-2GP (G) (G) (G) (G) (G)
2
5
6
7
8
1
(G) (G) PC9233 PC9970 PC842 PC843 PC844
PWR_VGA_CORE_UGATE2_R
1
5
6
7
8
D
D
D
D
SCD1U25V3KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
(G) PR9924 PC9257 PU56
D
D
D
D
PR476 18KR2F-GP SC2700P50V3KX-1GP SIR472ADP-T1-GE3-GP PU57
2
NTC-100K-8-GP SIR472ADP-T1-GE3-GP
2
Put colse to
2
2
4
G
VCORE hot spot
1
PWR_VGA_CORE_VREF_2 PWR_VGA_CORE_UGATE2_R 4
S
S
S
(G)
Iomax=40A
S
S
S
PC9219
3
2
1
OCP>60A
SCD1U50V3KX-GP
2
3
2
1
2
PR9239 VDDC_PWR
(G)
0R0402-PAD (G) 0.36uH, DCR=1.05~1.2mohm, Idc=30A
1
(G)
PL41 1 2 IND-D36UH-19-GP
3D3V_VGA_S0
2
(G)
5
6
7
8
5
6
7
8
1
(G) PR4638 (G) (G) (G)
D
D
D
D
D
D
D
D
R996 2D2R5J-1-GP PC840 PTC31 PTC24
ST330U2VDM-6-GP
ST330U2VDM-6-GP
33KR2F-GP PQ101 PQ102
SC22U6D3V5MX-2GP
2
2
SIRA12DP-T1-GE3-GP
SIRA12DP-T1-GE3-GP
1 NCP81172_PH2_SB
1
2
R989 4 4
G
B B
S
S
S
S
S
S
0R0402-PAD
2 1 PWR_VGA_CORE_PSI
30 GPIO13_NVVDD_PSI
3
2
1
3
2
1
(G)
1
(R) PC341
R988 SC1500P50V3KX-GP
1
(R) 15KR2F-GP
2
C842 (G) (G)
SCD01U25V2KX-L1-GP 330uF/2.5V, ESR=9mohm
1
(G)
PR470
3D3V_VGA_S0 100R2F-L1-GP-U
2
1
PR1000
(G) 1 2 0R0402-PAD
VGACORE_GND_SENSE_1 27
R997
47KR2J-2-GP
0805 change to 1206 -- NaNcy 0306
2
R1005 (G)
0R0402-PAD (G) PC9252
PWR_VGA_CORE_EN 2 1 (G) PR9925 SC47P50V2JN-3GP
GPU_THERM_SHUTDOWN* 30 PC9250 SC22P50V2JN-4GP 51R2F-2-GP PR999
1 2 1 2 NCP81172_FB1
1 2 PWR_VGA_CORE_SENCE+_1 1 2 0R0402-PAD
VGACORE_VDD_SENSE_1 27
(G)
(G) (G) PC9251
1
1
A SC1U10V2KX-1GP 82KR2F-1-GP PR9231 A
2 1 NCP81172_COMP11 2 2 10KR2F-2-GP
1 (G)
2
PR471
100R2F-L1-GP-U
<Core Design>
2
0805 change to 1206 -- NaNcy 0306
83 PWR_VGA_CORE_EN
VDDC_PWR Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
GPU PWR_NVVDD(NCP81172)
Size Document Number Rev
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 82 of 103
5 4 3 2 1
5 4 3 2 1
20130910 Ryan
Power-on: 1D35V_S0 1D35V_VGA_S0
3D3V_VGA_S0-->NVVDD==1D05V_VGA_S0-->1D35V_VGA_S0
Power-off:
The timing of all power rail need power down to 0V under 10ms.
+3VS to 3.3V_DELAY Transfer
D DCBATOUT D
R79273 1 2 0R3J-0-U-GP
(G) DCBATOUT
3D3V_VGA_S0
1
S R79275 1D05V_S0
3D3V_S0
1
D 100KR2J-1-GP 1D35V_S3
D
DMP2130L-7-GP 100KR2J-1-GP
2
R9302 84.02130.031 DGPU_PG1 (G)
G
1
(R) 100KR2J-1-GP 2ND = 84.03413.A31
2
DGPU_PG10
(G78.47520.5BL)
R79276 C11335 C11336 3.856A
SC4D7U6D3V3KX-LL-GP
SCD1U25V2KX-LL-GP
100KR2J-1-GP
2
2
3.3V_ALW_1
(G78.10422.5FL)
(G) R79283
5
6
7
8
5
6
7
8
100KR2J-1-GP
D
D
D
D
D
D
D
D
U9303 (G) U9302
1
TPCA8062-H-GP TPCA8062-H-GP
2
6
Q9301 R9304
4
2N7002KDW-GP (R) 100R2J-2-GP (G) (G)
84.2N702.A3F 3D3V_VGA_S0 Q9615
4
1D35V_S0
G
S
S
S
G
S
S
S
2nd = 84.DM601.03F 2N7002KDW-GP
2
4
3
2
1
4
3
2
1
1
3.2A 2N7002KDW-GP 1D05V_VGA_S0
3
R79279 (G75.27002.E7C)
1
10KR2J-3-GP R79274 3.2A
3
3.3V_RUN_VGA_1 (G) R79286
DGPU_PG2 1 2 DGPU_PG3 1 2 10KR2J-3-GP R79281
2
R9308 10KR2J-3-GP (G)
10KR2F-2-GP DGPU_PWROK (G) C11392 (G) DGPU_PG20 1 2 DGPU_PG30 1 2
2
1
3D3V_S0 1 2 3D3V_VGA_S0_EN SCD1U16V2KX-3GP TC9302 10KR2J-3-GP
1
SCD1U16V2KX-3GP
10KR2J-3-GP
(R) C9302 R79280 ST100U6D3VBM-5GP (G) C11395 (R)
82 PWR_VGA_CORE_EN
1
10KR2J-3-GP
R79277 R79278 (R) (G) 77.C1071.081 SCD1U16V2KX-3GP
1
SCD1U16V2KX-3GP
1 C9308 82K5R2F-GP 100KR2J-1-GP C9304 (R77.21071.07L) C11393 R79287
2
(R) SCD22U25V3KX-GP (G64.82025.6DL) (G) SCD1U16V2KX-3GP R79284 R79285 (R)
1
2 DCBATOUT (G) 82K5R2F-GP 100KR2J-1-GP C11394 (G)
2
(G64.82025.6DL) (G) SCD1U16V2KX-3GP
2
DCBATOUT (R)
2
C C
21,30,65,66 DGPU_PWROK
C11340 3D3V_S5
B B
SCD1U10V2MX-3GP
1
(R78.10421.2FL)
1
PR8301
10KR2F-2-GP PC8308
(R) SC1U16V3KX-2GP 2D2R5J-1-GP
PR8303
Iomax=4.5A
2
1
PWR_VRAMPW_SS 1
PC8305
PC8301
PC8302
PC8303
PC8304
7 2 PC8307
SS
1
PR8305 PWR_VRAMPW_SVIN8
PC8340
PC8306
PC8341
SCD1U50V3KX-GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
6 PR8307
SVIN FB
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
10R3F-GP 11
GND EN
5 (R) SCD047U25V2KX-GP R1127KR2F-GP
1
SCD1U50V3KX-GP
2
1
SC22P50V2JN-4GP
1 2
2
SY8036LDBC-GP (R)
(R) (R)
2
PC8342 (R)
2
SC1U16V3KX-2GP PWR_VRAMPW_VFB
1
2
2
(R)
V0=0.6*(R1+R2)/R2
A A
<Variant Name>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
D D
C C
B B
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
D D
C C
B B
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
2
H1 H2 STF296R205H152-GP STF296R205H152-GP STF296R205H152-GP
3
2
4
4 4 1
For EMC--Kai 0515
1 1
5 8
5 8 5 8 VCC_CORE
1
6
7
6
1
GENS315R158-8-F-A-GP C64 C65 C63
GENS315R158-8-F-A-GP GENS315R158-8-F-A-GP SC1KP50V2KX-1GP SC1KP50V2KX-1GP SC1KP50V2KX-1GP
VGA
2
D D
HS4 HS5
STF296R205H152-GP STF296R205H152-GP
(G) (G)
1
H4 H5 H6
3
2
4 4 4
1 1 1
5 8 5 8 5 8
6
7
GENS315R158-8-F-A-GP GENS315R158-8-F-A-GP GENS315R158-8-F-A-GP
2011/10/7 Add the stand off hole Done
HS7
STF256R113-UH258-GP
1
C C
DUMMY BOM
Material part
LGA115x CPU SOCKET Symbol
SKT4
SKT2 Back Plate (R) SKT3 ILMCOVER (R) ILMCOVER
SKT1 Load Plate (R) (R60.3EE01.001)
Vendor: LOTES Vendor:LOTES
P/N:22.78002.011 Vendor:LOTES P/N: 22.78005.171
Vendor:LOTES P/N: 22.78005.171
P/N:22.78003.011 Thickness: max 2.2mm (含mylar及及及及)
Vendor:FOXCONN
Vendor: FOXCONN Vendor:FOXCONN P/N: 22.78005.161
Vendor:FOXCONN P/N:22.78006.011 P/N: 22.78005.161
P/N:22.78006.001
Thickness:2.0mm(含mylar)
B B
LABEL
BAT1
BATTERY CR2032_30MM
LBL4 (R23.21221.024)
LABEL Wire Length:30mm
LAN ID :
F80F4105EB9A
(40.3KP03.001) MB serial NO# and MAC address
45.41101.001 -> 35 x 15mm (DEL) Vendor
LBL6
LABEL 40.3KP03.001 -> 35 x 15mm (耐及耐) P/N:
LAN ID : (R45.3J904.011) 45.41107.011 -> 70 x 8mm 23.21221.024
F80F4105EB9A
45.41115.001 -> 34 x 13.5mm 23.21212.031
LBL5
LABEL
LAN ID : (R)
F80F4105EB9A
A A
D D
C C
B B
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
D D
C C
B B
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
D D
C C
B B
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
D D
C C
B B
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
D D
C C
B B
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
D D
C C
B B
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
D D
C C
B B
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
D D
C C
B B
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
D D
C C
B B
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
D D
C C
B B
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
GA20IN GA20
C C
1D35V_S3 0D765V_S0
5V_A 5V_S5 PM_SLP_S4# 1D05V_PWROK
DCBATOUT CTRL0_EUP
USB_EN
3D3V_A 3D3V_S5
USB 5V/3.3V
B B
5V_S0
PM_SLP_S3#
3D3V_VGA_S0
3D3V_S0
3D3V_S0
VGA_CORE 1D05V_VGA_S0
12V_S0 DGPU_PWROK
1D35V_VGA_S0
1D05V_S0
A
3D3V_S0 A
1D5V_S0
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
5V_CHARGER
D D
3D3V_AUX_S5
0D675V_EN
PU5305
1D05V_PWROK
1D05V_S0
PU4601
1D35V_PWROK 1D05V_S0
PM_SLP_S4#
1D35V_S3 1D35V_S3
0D675V_EN
0D75V_S0
PLT_RST#
C C
U7901 PCH1 CPU1
U3701
PCH
ATXPG PM_DRAM_PWRGD H_CPU_SVIDCLK
VDDPWRGOOD
ITE8731 S0_PWR_GOOD CPU
SUSB# And Gate AND GATE
PU39
ALL_POWER_OK
GPU sequence
SYS_PWROK
CPU_CORE VCC_CORE
H_CPU_SVIDCLK
B IMVP_PWRGD B
AND GATE
S0_PWR_GOOD
Reserve
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
19V57
Scalar VCCK_1V2 41
LDO P1P2V 42
AP1122DG
42
N-MOS
TMDS_VDD12
41
AOS4407AL 57
N-MOS P3P3V
Imax=1.5A N-MOS
D AO3418L 42 42
3D3V_USB 44 V_3_CARD 40 D
P-MOS AO446844
19V_AMP
DMP3098L 42 42
N-MOS RES
3D3V_S5 V_3P3_LAN 37
AO4468L 51 51
0 OHM 37
3D3V_AUX_S5
59
LDO
1D5V_S0
APL5930 62
Imax=1.4A 62
FDS8884*1 3D3V_A N-MOS
PWM FDS6690AS*1
59
Imax=6A 59
AO4468L 51 3D3V_S0 P-MOS
51
3D3V_VGA_S0
DMP2130
66 66
1 Phase Design
TPS51225 Charger IC
1 Phase Design 2543 5V_USB_CHARGER
45 45
59
SIR172DP*1 5V_CHARGER
SIRA12DP*1 59 Imax=11A 59 N-MOS
5V_S0 51 5V_HDMI 49
AO4468 51
C
5V_AUX_S5 C
59 N-MOS
5V_S5 51 V_5_CODEC
38
5V_ODD 43 5V_HDD 43
AO4468 51
SIR172DP*4 VCC_CORE
PWM
SIRA12DP*4 64 Imax=26A 64
TDC=32A UP7534 USB30_VCCA
N-MOS 45 45
ISL95812 2 Phase Design AO3418 42
N-MOS
63,64
VCC5_USB 44
AO3418 44
5V_S5_AMP
42
PWM
5V_VA_O 41
SIR172DP*4 VGA_CORE VCC5_RF 55
ISL62882 SIRA12DP*4 65 Imax=40A 65
B B
PWM
SIR172DP*1 1D05V_S0 N-MOS
1D05V_VGA_S0
RT8237 SIRA12DP*1 61 Imax=11A 61 FDMS0310 66 66
61
1 Phase Design
PWM
SIR172DP*1 1D35V_S3 N-MOS
1D35V_VGA_S0
TPS51116 SIRA12DP*2 60 Imax=18A 60 FDMS0310 66 66
1 Phase Design
60
DDR_VREF_PWR 0D675V_S0
60 Imax=1A 60
A
DDR_VREF_S3 A
60
<Core Design>
PWM
12V_S0 Wistron Corporation
SIR4214D*1
NCP1589 58
Imax=3A 58 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
58 Title
1 Phase Design POWER DELIVERY CHART
Size Document Number Rev
C
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 99 of 103
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
GPIO table
Size Document Number Rev
D
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 100 of 103
5 4 3 2 1
5 4 3 2 1
CPU HASWELL
SA_CK_N_0
M_A_DIM0_CLK_DDR#0/M_A_DIM0_CLK_DDR0
SA_CK_P_0
SA_CK_N_1 M_A_DIM0_CLK_DDR#1/M_A_DIM0_CLK_DDR1
DIMM1
SA_CK_P_1
D D
SB_CKN0
M_B_DIM0_CLK_DDR#0/M_B_DIM0_CLK_DDR0
SB_CK0
SB_CKN1 M_B_DIM0_CLK_DDR#1/M_B_DIM0_CLK_DDR1 DIMM2
SB_CK1
100MHz
CLKOUT_DMI_N
CLKOUT_DMI_P
BCLK
100MHz
CLKOUT_DP_N
CLKOUT_DP_P
SSC_DPLL_REF
100MHz
CLKOUT_DPNS_N
CLKOUT_DPNS_P
DPLL_REF
B SIO IT8732F B
CLK_48M_SIO
CLKOUTFLEX1/GPIO65 CLKIN(37)
RTCCLK CLK_PCI_SIO
CLKOUT_33MHZ3 PCICLK(47)
HDA_BCLK PCH_HDA_BITCLK_R/24MHZ
(for Master)
AUDIO ALC269Q
XTAL25_OUT
25MHz XTAL25_IN
SPI_CLK 24MHz/48MHz/100MHz SPI ROM
(for RTC)
32.768KHz RTCX1 CLKOUT_33MHZ1
33MHz LPC Debug Port
RTCX2
A A
<Core Design>
Title
CLOCK MAP
Size Document Number Rev
C
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 101 of 103
5 4 3 2 1
5 4 3 2 1
PCH SMBus Block Diagram 3D3V_S5 3D3V_S0 SIO SMBus Block Diagram Thermal Block Diagram
5V_S0
‧ ‧
3D3V_S0 ‧
SRN2K2J-1-GP SRN2K2J-1-GP
‧
SMBCLK SMB_CLK
DIMM 1 SRN10KJ-5-GP PAGE28 DXP P2800_DXP
‧ ‧PCH_SMBCLK MMBT3904-3-GP
SMBDATA SMB_DATA
‧ ‧ PCH_SMBDATA
SCL
SDA
PSDAT1 TPDATA TPDATA
TouchPad Conn.
TPDATA DXN P2800_DXN
SC2200P50V2KX-2GP
‧
3D3V_S5
SMBus Address:A0 PSCLK1 TPCLK
‧ TPCLK TPCLK UMA Place near CPU
D
‧
2N7002SPT
3D3V_AUX_KBC
Thermal PWM CORE D
SRN2K2J-8-GP
P2800
‧
MMBT3904-3-GP
‧ PCH_SMBDATA SDA
GPIO17/SCL1 BAT_SCL BATA_SCL_1 CLK_SMB G
VR
SML0DATA SML0_DATA GPIO22/SDA1 BAT_SDA BATA_SDA_1 DAT_SMB SMBus address:16 Put under CPU(T8 HW shutdown)
‧ SMBus Address:A4
SRN2K2J-1-GP GPIO4 VGA_THRM TDR
3D3V_S0 GPIO94 GPIO56 PAGE28
BQ24745 DXP
P2800_VGA_DXP
THRMDA
XDP SIO
FAN_TACH1
SCL SC2200P50V2KX-2GP SC2200P50V2KX-2GP
‧ ‧
8732F-CX SDA SMBus address:12 VGA P2800_VGA_DXN VGA
PCH ‧
Thermal
DXN THRMDC
FAN1_DAC
SRN2K2J-1-GP
UMA SCL
LCDVDD_eDP
TACH Place near GPU(DISCRETE only).
SDA PCH P2800
SDVO_CTRLCLK PCH_HDMI_CLK Level DDC_CLK_HDMI
‧ FAN
SDVO_CTRLDATA PCH_HDMI_DATA
Shift DDC_DATA_HDMI Minicard LCDVDD_eDP 5V VIN
MMBT3904-3-GP
SMB_DATA
eDP OTZ
PH
‧ LCD_SMBCLK SCL
SMBus address:XX VSET VOUT
VIN
‧ ‧ LCD_SMBDATA SDA
C FAN CONTROL C
SRN2K2J-1-GP Minicard GPIO73/SCL2 SML1_CLK
UMA SRN0J-6-GP
PCH_SMBCLK
W-WAN GPIO74/SDA2 SML1_DATA
‧
‧
2N7002DW-1-GP
P2793
SMB_CLK
L_DDC_CLK LVDS_DDC_CLK_R PAGE28
PCH_SMBDATA
SMB_DATA
L_DDC_DATA LVDS_DDC_DATA_R
UMA
3D3V_VGA_S0
CRT_DDC_CLK CRT_DDC_CLK
CRT_DDC_DATA CRT_DDC_DATA
‧ Scalar
RTD2487
Audio Block Diagram
SRN2K2J-1-GP
DIS
SRN0J-6-GP
DDC2CLK VGA_CRT_DDCCLK
switch
DDC2DATA VGA_CRT_DDCDATA
HP
3D3V_S0 DIS 5V_S0 HP
HDMI/MHL
VGA ‧ ‧
Mic
3D3V_S0
SRN2K2J-1-GP SRN10KJ-6-GP
UMA
UMA
‧ Front Jack
B SRN0J-6-GP B
CRT_DDCCLK_CON
CRT_DDCDATA_CON
CRT CONN
5V_S0
3D3V_VGA_S0 UMA
2N7002DW-1-GP
‧
‧ (A)
switch
5V_S0
SRN1K5J-GP AMP
SRN2K2J-1-GP
DIS TAS5707
DDC2CLK GPU_HDMI_CLK DDC_CLK_HDMI
DDC2DATA GPU_HDMI_DATA
TSCBTD3305CPWR DDC_DATA_HDMI
HDMI CONN Audio Codec
ALC269Q
SRN0J-6-GP
DIS
HP
Internal SPK
Connector
Mic1 (A)
ADC
PCM1808
A
Line1
A
HDA
SPK
<Core Design>
Title
D D
Realtek
ALC269 VC
Intel rPGA 946B/947 pin
CPU Core Regulator(VRD 12.5) 5V_S5 V_5_CODEC 5V (30 mA)
V_CPU_CORE
DCBATOUT 2-phase Switching 55A
3.3V (60 mA)
ISL95812 3D3V_S0
HASWELL
P_CPU_VCCIO VCCIO_OUT
SVID Bus & XDP 1V 300mA 2.1A
RTL8111GA
P_CPU_VCCIOA VCOMP_OUT 3D3V_S5 V_3P3_LAN 3.3V 132mA
PEG & Display Port 1V 300mA
CPU / DDR3L
V_1P05_LAN 1.05V 110mA
5V_S5
V_SM 1D35V_S3 18A
1-phase Switching
V_SM_VTT
DDR3L DIMM X2 & Termination 0D675V_S0 1A
3D3V_S5
1D35V_S3 8732F_CX
V_SM(S0,S1) 7A 3D3V_A
TPS51116 +3.0V 4.5µA
V_SM(S3) 1.0A
0D675V_S0 3D3V_S0 +3.3V 22mA
C C
V_SM_VTT(S0) 1A
+3.3V S3 17mA
3D3V_5
Intel PCH Lynx Point
1.05V V_CPU_VCCIO2PCH 4mA
(V_PROC_IO) SPI ROM(8MB)
1D05V_S0 11A
1.05V V_1P05_PCH 1.29A 3D3V_A V_3P3_EPW +3.3V 175mA
1D05V_S0
(VCC)
RT8237
1.05V V_1P05_PCH 3.629A
(VCCIO)
1.5V V_1P5_PCH
(VCCVRM)
1D5V_S0 1.4A
3D3V_S0 1D5V_S0 1.5V V_1P5_PCH 60mA USB(5 Rear:3USB2.0
APL5930KAI (VCCADAC) ,2*USB3.0)
+19V
5V_S5
3.3V VCC3 0.133A S0: 5VDUAL_USB_R (5A)
3D3V_S0 (VCC3_3)
Imax= 0.016A
3.3V SB3V 0.261A
3D3V_A (VCCSUS3)
BAT
V_3P0_BAT_VREG 1mA
DIODE BAT54C HDMI
(VCCRTC)
3D3V_A
5V_S0 5V (0.5 A fuse x 1)
HDMI IN/MHL
A A
SYS Fans
<Core Design>
12V_S0 +12V 1A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
POWER MAP
Size Document Number Rev
D
PIM86L-Florence 1
Date: Tuesday, February 25, 2014 Sheet 103 of 103
5 4 3 2 1