Serial Interfaces (UART: Universal Asynchronous RX/TX) : LPC17xx
Serial Interfaces (UART: Universal Asynchronous RX/TX) : LPC17xx
Serial Interfaces (UART: Universal Asynchronous RX/TX) : LPC17xx
Serial Interfaces
UART0,2,3
UART: TX Character Framing
o Start Bit.
o Data Bits of 5, 6, 7 or 8.
o Parity Bit.
o Stop Bit of 1, 1.5 or 2.
LPC176x
+3.3V
0.1µF
16 0.1µF DB9 female
1
0.1µF 3 MAX 2 +5.5V Vss
4
3232 5
6 -5.5V
0.1µF 0.1µF 9
5 4
P0.3 9 8 TxD 8
RxD0 3
P0.2 10 7 RxD 7
TxD0 2
6
15 1
UART: Transmitter
o Parallel-to-serial conversion
o Non-FIFO Mode
n Transmit Holding Register (THR) and Transmit Shift Register (TSR)
o FIFO Mode
n Transmit (TX) FIFO and Transmit Shift Register (TSR)
o 16x timing for bit shifting.
o Character Framing.
o Parity Insertion.
o TX FIFO interrupt and status.
UART: Transmitter
o FIFO mode:
n Write Data to Transmit Holding
Register (THR).
n Transmit data is queued in TX FIFO.
n Data in TX FIFO is transferred to
Transmit Shift Register (TSR) when TSR is empty.
n TSR shifts data out on TX output pin.
UART: Receiver
o FIFO mode:
n Incoming data is received in the
Receive Shift Register (RSR).
n Received data is queued in the RX FIFO.
n Error tags associated with data in
RHR can be read via LSR.
n Read RHR to read the data out.
UART: RX Character Validation
n FIFO mode:
o RX FIFO is full and data is received in RSR.
o Data in RX FIFO is not overwritten by data in RSR.
UART: Baudrate
o Configurable baudrate:
PCLK[Hz] 1006 /4
n Example set baudrate (FR=1): U0DL16 = = = 81
16 ⋅Vt [baudios] 16 ⋅19200
DL=F_pclk/16*baud; // Round to the nearest whole!!!!
LPC_UART0->DLL= DL%256; //LSB
LPC_UART0->DLM= DL/256; //MSB
UART: Interrupt Enable Register
UART: Interrupt Identification Register
UART: Interrupt Handling
UART: FIFO Control Register
UART: Line Control Register
UART: Line Status Register
UART: Line Status Register (continued)
UART: Software example (I)
void uart0_init(int baudrate) {
LPC_UART0->LCR |= DLAB_ENABLE; // importante poner a 1
LPC_PINCON->PINSEL0 = (1 << 4) | (1 << 6); // Change P0.2 and P0.3 mode to TXD0 and RXD0 LPC_UART0->DLM = DL / 256; // parte alta
LPC_UART0->DLL = DL % 256; // parte baja
// Set 8N1 mode (8 bits/dato, sin paridad, y 1 bit de stop)
LPC_UART0->LCR |= CHAR_8_BIT | STOP_1_BIT | PARITY_NONE; LPC_UART0->LCR &= ~DLAB_ENABLE; // importante poner a 0
uart0_set_baudrate(baudrate); // Set the baud rate
if (FR=1)
LPC_UART0->IER = THRE_IRQ_ENABLE | RBR_IRQ_ENABLE; // Enable UART TX and RX interrupt (for LPC17xx UART)
NVIC_EnableIRQ(UART0_IRQn); // Enable the UART interrupt (for Cortex-CM3 NVIC) DL=162.73
} Baudrate= 9585 bps
/*
* The formula is :
* BaudRate= uClk * (mulFracDiv/(mulFracDiv+dividerAddFracDiv) / (16 * DLL)
*
* The value of mulFracDiv and dividerAddFracDiv should comply to the following expressions:
* 0 < mulFracDiv <= 15, 0 <= dividerAddFracDiv <= 15
*/
for (mulFracDiv = 1; mulFracDiv <= 15; mulFracDiv++) {
for (dividerAddFracDiv = 0; dividerAddFracDiv <= 15; dividerAddFracDiv++) {
temp = (mulFracDiv * uClk) / (mulFracDiv + dividerAddFracDiv);
void UART0_IRQHandler(void) {
switch(LPC_UART0->IIR&0x0E) {
o What is RS-485?
n RS-485 is a EIA standard interface which is very common in the data
acquisition world.
n It allows high data rates communications over long distances in real world
environments.
SLAVE-2 SLAVE-3
n The standard specifies
up to 32 drivers and
32 receivers can share
a multidrop network.
n Terminator resistors
avoid reflected signal
UART1: RS-485 Half and Full Duplex
Half-Duplex
Full-Duplex
UART1: RS-485 vs RS-232
UART1: RS-485 modes of operation
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