4 - Chapter 4 - DC Biasing-BJTs

Chapter 4
DC Biasing–BJTs
Biasing
Biasing: The DC voltages applied to a transistor in
order to turn it on so that it can amplify the AC signal.
VBE = 0.7 v
IE = (β +1) IB ≅ IC
IC = β IB
Electronic Devices and Circuit Theory, 10/e 2 Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky Upper Saddle River, New Jersey 07458 • All rights reserved.
Operating Point
The DC input establishes an operating or quiescent point called the Q-point.
The Three States of Operation
• Active or Linear Region Operation

Base–Emitter junction is forward biased
Base–Collector junction is reverse biased
• Cutoff Region Operation

Base–Emitter junction is reverse biased
Base–Collector junction is reverse biased
• Saturation Region Operation

Base–Emitter junction is forward biased
Base–Collector junction is forward biased
DC Biasing Circuits
• Fixed-bias circuit
• Emitter-stabilized bias circuit
• Collector-emitter loop
• Voltage divider bias circuit
• DC bias with voltage feedback
Fixed-Bias Configuration
For the dc analysis the network can be isolated from the indicated ac
levels by replacing the capacitors with an open-circuit equivalent
because the reactance of a capacitor is a function of the applied
frequency. For dc, f=0Hz, and xc = ½fc = ½(0)c =  .
The Base-Emitter Loop
From Kirchhoff’s voltage law:
+VCC – IBRB – VBE = 0
Solving for base current:
VC C  VBE
IB 
RB
Collector-Emitter Loop
Collector current:
I C  I B
VCE  VCC  I C R C
Transistor Saturation
When the transistor is operating in saturation, current through the
transistor is at its maximum possible value.
VCE  0 V
VCC
I Csat 
RC
Load Line Analysis
The end points of the load line are:
Circuit Values Affect the Q-Point
Emitter-Base Configuration
Adding a resistor (RE) to the

emitter circuit stabilizes the
bias circuit.
Base-Emitter Loop

 VCC - I E R E - VBE - I E R E  0
Since IE = ( + 1)IB:
VCC  I B R B  VBE  (  1)I B R E  0
Solving for IB:

VCC - VBE
IB 
R B  (  1)R E
I R V I R V 0
E E CE C C CC
Since IE  IC:
VCE  VCC – I C (R C  R E )
Also:
VE  I E R E
VC  VCE  VE  VCC - I C R C
VB  VCC – I R R B  VBE  VE
Improved Biased Stability
Stability refer s to a circuit condition in which the cur rents and voltages will remain
fair l y constant over a wide r ange of temper atures and tr ansistor Beta (β) values.
Adding R E to the emitter improves the stability of a tr ansistor.
Fixed-bias circuit Emitter-stabilized bias circuit
𝑉𝐶𝐶 −𝑉𝐵𝐸 𝑉𝐶𝐶 −𝑉𝐵𝐸

IB= I B=
𝑅𝐵 𝑅𝐵 +(𝛽+1)𝑅𝐸
Ic=IB
I B in fixed-bias circuit cannot change, so change in β results in large change in

output cur rent and voltage.
Saturation Level
The endpoints can be determined
from the load line.
VCEcutoff: ICsat:
VCE  VCC VCE  0 V
I C  0 mA VCC
IC 
RC  RE
Load-Line Analysis
Voltage-Divider Bias Configuration
This is a very stable bias circuit.
The currents and voltages are nearly

independent of any variations in .
Exact Analysis
Approximate Analysis
Where IB << I1 and I1  I2 :
Self Study
Voltage-Divider Bias Analysis
Transistor Saturation Level
Load Line Analysis

Cutoff Saturation
Collector Feedback Configuration
Another way to improve the

stability of a bias circuit is to
add a feedback path from
collector to base.
In this bias circuit the Q-point

is only slightly dependent on
the transistor beta, .
Base-Emitter Loop
VCC – I C R C – I B R B – VBE – I E R E  0
Where IB << IC:

I'  I  I  I
C C B C
Knowing IC = IB and IE  IC, the loop

equation becomes:
VCC –  I B R C  I B R B  VBE   I B R E  0
Solving for IB:
Applying Kirchoff’s voltage law:
IERE + VCE + I’CRC – VCC = 0

Since IC  IC , IC  IE and IC = IB:
IC(RC + RE) + VCE – VCC =0
Solving for VCE:
For the dc mode, the capacitor assumes the open-circuit
equivalence, and RB = RF1 + RF2.
Load Line Analysis:
Transistor Saturation Level
Cutoff:
VCE  VCC
I C  0 mA
Saturation:
V
I  CC
C R R
C E
VCE  0 V
Self Study
Emitter-Follower Configuration
Common-Base Configuration
Summary Table
Electronic Devices and Circuit Theory, 10/e Copyright ©2009 by Pearson Education, Inc.
Summary Table
Electronic Devices and Circuit Theory, 10/e Copyright ©2009 by Pearson Education, Inc.
Design Operations
Multiple BJT Networks
1. The R–C coupling
2. The Darlington configuration
3. The Cascade configuration
4. The Feedback Pair
5. The Direct Coupled
Multiple BJT Networks: R–C coupling
Multiple BJT Networks: Darlington
DC Bias of Darlington Circuits
Base current:
V  VBE
I B  CC
R B   DR E
Emitter current:
I E  ( D  1)I B   D I B
Emitter voltage:
VE  I E R E
Base voltage:
VB  VE  VBE
Multiple BJT Networks: Cascade & Feedback
Current Mirror Circuits
Current mirror circuits provide

constant current in integrated
circuits.
Current Source Circuits
Constant-current sources can be built using FETs, BJTs, and
combinations of these devices.
IE  IC
VZ  VBE
I  IE 
RE
Transistor Switching Networks
Transistors with only the DC source applied can be used

as electronic switches.
Switching Circuit Calculations
Saturation current:
VCC
I Csat 
RC
To ensure saturation:
I
I B  C sat
 dc
Emitter-collector resistance
at saturation and cutoff:
VCEsat
R sat 
I Csat
VCC
R cutoff 
I CEO
NOT Gate
Switching Time
Transistor switching times:
t on  t r  t d
t off  t s  t f
Logic Gates Using Transistors
Troubleshooting Hints
• Approximate voltages
– VBE 0 .7 V for silicon transistors
– VCE  25% to 75% of VCC
• Test for opens and shorts with an ohmmeter.
• Test the solder joints.
• Test the transistor with a transistor tester or a curve tracer.
• Note that the load or the next stage affects the transistor operation.
pnp Transistors
The analysis for pnp transistor biasing circuits is the same as that
for npn transistor circuits.
pnp transistor is similar to the npn transistor, except that the

voltage polarities and current directions are reversed.
Transistors: Some Practical Applications
1. BJT Diode Usage and Protective Capabilities
2. Relay Driver
3. Light Control
4. Maintaining a Fixed Load Current
5. Alarm System with a CCS
6. Voltage Level Indicator
7. Logic Gates
Simulation Using Multisim: NPN Fixed-Bias Cofiguration
12 V
+
0.010 A
-
100kΩ
600Ω
+ - +
0.110m A 5.853 V
-
2N3904
+
0.010 A
-

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Chapter 4

• Active or Linear Region Operation

• Cutoff Region Operation

• Saturation Region Operation

From Kirchhoff’s voltage law:

+VCC – IBRB – VBE = 0

Solving for base current:

From Kirchhoff’s voltage law:

The end points of the load line are:

Adding a resistor (RE) to the

From Kirchhoff’s voltage law:

VCC  I B R B  VBE  (  1)I B R E  0

Solving for IB:

Adding R E to the emitter improves the stability of a tr ansistor.

Fixed-bias circuit Emitter-stabilized bias circuit

𝑉𝐶𝐶 −𝑉𝐵𝐸 𝑉𝐶𝐶 −𝑉𝐵𝐸

I B in fixed-bias circuit cannot change, so change in β results in large change in

The currents and voltages are nearly

Transistor Saturation Level

Load Line Analysis

Another way to improve the

In this bias circuit the Q-point

Where IB << IC:

Knowing IC = IB and IE  IC, the loop

Solving for IB:

Applying Kirchoff’s voltage law:

IERE + VCE + I’CRC – VCC = 0

IC(RC + RE) + VCE – VCC =0

Solving for VCE:

1. The R–C coupling

2. The Darlington configuration

3. The Cascade configuration

4. The Feedback Pair

5. The Direct Coupled

Current mirror circuits provide

Transistors with only the DC source applied can be used

Transistor switching times:

pnp transistor is similar to the npn transistor, except that the

4. Maintaining a Fixed Load Current

5. Alarm System with a CCS

6. Voltage Level Indicator

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