UNIVERSITY OF ENGINEERING AND

MANAGEMENT , KOLKATA

LABORATORY COPY
BASIC ELECTRICAL ENGINEERING
LABORATORY
PAPER CODE :- ESC191

Student Name:- SAHIL SENGRA

Year:- 2020
Stream:- CST
Section:- L
Roll No.:- 52
Enrollment No.:- 12020009022268
LIST OF EXPERIMENTS
1. Verification of Superposition Theorem.
2. Verification of Thevenin’s Theorem.
3. Verification of Norton’s Theorem.
4. Verification of Pure Resistive, R-L and R-C circuit
Experiment No.:- ESC191/1

TITLE OF THE EXPERIMENT:- Verification of Superposition

Theorem.

OBJECTIVE:- To verify the Superposition Theorem using

PSPICE SIMULATION SOFTWARE

CIRCUIT DIAGRAM:-
THEORY:-
SUPERPOSITION THEOREM STATEMENT
In any linear bilateral network containing two or more energy
sources, the response at any element is equivalent to the
algebraic sum of the responses caused by the individual sources.
i.e. While considering the effect of individual sources, the other
ideal voltage sources and ideal current sources in the network are
replaced by short circuit and open circuit across the terminals.
This theorem is valid only for linear systems.
PROCEDURE:-
(i) At first open the PSPICE SCHEMATIC WINDOW.
(ii) Then go to DRAW menu and click on GET NEW PART
option.
(iii) Then search for the required elements and sources in the
PART NAME BOX.
(iv) Place all the required elements in the PSPICE SCHEMATIC
WINDOW and arrange all the parts properly.
(v) Then again go to DRAW menu and click on WIRE to select
wire and connect all the element as per the given circuit diagram.
(vi) After completing the connection, go to FILE MENU and
SAVE the drawn circuit.
(vii) Now, go to ANALYSIS MENU and click on SIMULATE
to simulate the circuit.
(viii) Finally, ENABLE BIAS VOLTAGE and ENABLE BIAS
CURRENT to see the required output.
 CONCLUSION:- We have drawn all the circuit required to
verify the Superposition Theorem in PSPICE SCHEMATIC and
observed all the output data. So, we have successfully verified
the Superposition Theorem.

DATA SHEET
Verification of Superpostion Theorem
APPARATUS REQUIRED:-
Sl. Name of Range Type Quantity
No. Apparatus
1. Voltage Source 100V,200V DC 2
2. Resistor 5Ω,10Ω - 3
3. GND_EARTH - - As per
Required
EXPERIMENTAL DATA/ OUTPUT GRAPHS:-

Voltage Source Current through

10Ω Resistor
E1 E2
200 volt (active) 100 volt (active) 12 amp (upward
direction)
200volt (active) - 4 amp
(downward
direction)
- 100 volt (active) 8 amp (upward
direction)
 Experiment No.:- ESC191/2

TITLE OF THE EXPERIMENT:- Verification of

Thevenin’s Theorem.

OBJECTIVE:- To verify the Thevenin’s Theorem using

PSPICE SIMULATION SOFTWARE.

CIRCUIT DIAGRAM:-
THEORY:-
THEVENIN’S THEOREM STATEMENT
The current flowing through a load resistance RL connected
across any two terminals A and B of a linear , bilateral
network is given by
Voc/Ri+RL , where Voc is the open circuit voltage (i.e.
voltage across terminals AB when RL is removed) and Ri is
the internal resistance of the network as viewed back into the
open circuited network from terminals AB deactivating all
the independent sources.

PROCEDURE:-
(i) At first open the PSPICE SCHEMATIC WINDOW.
(ii) Then go to DRAW menu and click on GET NEW PART
option.
(iii) Then search for the required elements and sources in the
PART NAME BOX.
(iv) Place all the required elements in the PSPICE
SCHEMATIC WINDOW and arrange all the parts properly.
(v) Then again go to DRAW menu and click on WIRE to
select wire and connect all the element as per the given
circuit diagram.
(vi) After completing the connection, go to FILE MENU and
SAVE the drawn circuit.
(vii) Now, go to ANALYSIS MENU and click on SIMULATE to
simulate the circuit.
(viii) Finally, ENABLE BIAS VOLTAGE and ENABLE BIAS
CURRENT to see the required output.

CONCLUSION:- We have drawn all the circuit required to

verify the Thevenin’s Theorem in PSPICE SCHEMATIC
and observed all the output data. So, we have successfully
verified the Thevenin’s Theorem.

DATA SHEET
Verification Of Thevenin’s Theorem
APPARATUS REQUIRED:-
Sl.No Name of Range Typ Quantit
. Apparatus e y
1. Voltage 48V,5V DC 1
Source
2. Resistor 12Ω,2Ω, - 5
4Ω,5Ω,1000000000000
0Ω
3. GND_EART - - As per
H require
d

EXPERIMENTAL DATA/ OUTPUT GRAPHS:-

The Given
Circuit IL 1.200A
When the
Target Branch VTh 12V
is opened
Deactivating the
voltage source RTh 5Ω
Thevenin’s IL1 1.200A
Equivalent
Circuit

IL=IL1=1.200A
Hence the Thevenin’s Theorem is justified.

Experiment No.:- ESC191/3

TITLE OF THE EXPERIMENT:- Verification of Norton’s

Theorem.

OBJECTIVE:- To verify the Norton’s Theorem using PSPICE

SIMULATION SOFTWARE.
CIRCUIT DIAGRAM:-
THEORY:-
NORTON’S THEOREM STATEMENT
Any two-terminal active network containing voltage sources and
resistances when viewed from its output terminals is equivalent to a
constant current source and an internal (parallel) resistance.The constant
current source (known as Norton’s equivalent current source) is of the
magnitude of the short circuit current at the terminals.The internal
resistance is the equivalent resistance of the network looking back into
the terminals with all the sources replaced by their internal resistances .
PROCEDURE:-
(i) At first open the PSPICE SCHEMATIC WINDOW.
(ii) Then go to DRAW menu and click on GET NEW PART option.
(iii) Then search for the required elements and sources in the PART
NAME BOX.
(iv) Place all the required elements in the PSPICE SCHEMATIC
WINDOW and arrange all the parts properly.
(v) Then again go to DRAW menu and click on WIRE to select wire
and connect all the element as per the given circuit diagram.
(vi) After completing the connection, go to FILE MENU and SAVE the
drawn circuit.
(vii) Now, go to ANALYSIS MENU and click on SIMULATE to
simulate the circuit.
(viii) Finally, ENABLE BIAS VOLTAGE and ENABLE BIAS
CURRENT to see the required output.

CONCLUSION:- We have drawn all the circuit required to verify the

Superposition Theorem in PSPICE SCHEMATIC and observed all the
output data. So, we have successfully verified the Superposition
Theorem.

DATA SHEET
Verification of Norton’s Theorem
APPARATUS REQUIRED:-

Sl.N Name of Range Typ Quanti

o. Apparatus e ty
1. Voltage 2
20V,1 DC
Source
0V
2. Resistor 5Ω,2.5 5
-
Ω
3. GND_EART - As per
-
H require
d
4. IPROBE - - 1
5. IDC - - 1

EXPERIMENTAL DATA/ OUTPUT GRAPHS:-

 Sl. No. IN RN IL
1. 1.333A 3.003Ω 727.42mA

Hence, Norton’s theorem is

verified.

EXPERIMENT NO.: - ESC191/4

VERIFICATION OF PURE RESISTIVE, R-L AND R-C
CIRCUIT
OBJECTIVE: To analyze series R-L-C circuit using PSPICE
SIMULATION SOFTWARE
THEORY:
Purely Resistive Circuit-
This is a purely resistive circuit where a resistor is connected
across a sinusoidal voltage source.

v= Vmaxsin𝜔t……(i)
v
I= R = Vmaxsin𝜔t/R
Imax= Vmax/R
i= Imaxsin𝜔t……(ii)
Therefore, from the above equations (i) and (ii), we can say
that current flowing through the circuit is in phase with the
voltage.
The phasor diagram is shown below: -
Purely Inductive Circuit-
This is purely capacitive circuit where the inductor is
connected across a sinusoidal voltage source.

v=
Vmaxsin𝜔t……………(i)
di
L dt =Vmaxsin𝜔t
Vmax sin ω t
di= L
Vmax
∫di= L ∫sin𝜔t dt
Vmax
i= ω L (-cos 𝜔t)
Vmax π
i= ωL sin(𝜔t- 2 )……(ii)
π
Therefore, current is maximum when 𝜔𝑡− 2 is unity or 1
Vmax
Therefore, the maximum value of current = ωL
Vmax
Therefore, Imax= ωL

Therefore, the equation (ii) can be written as….

π
i=Imaxsin(𝜔t- 2 )……………(iii)
Things to be concluded:
 Comparing equations(i) and (iii), it is clear that current
π
lags behind the applied voltage by an angle of 2 or 90˚.
 Hence in an purely inductive circuit the current lags
π
behind the applied voltage by an angle of 2 or 90˚.
The phasor diagram is drawn below: -
Purely Capacitive Circuit-
This is a purely capacitive circuit where the capacitor is
connected to a sinusoidal voltage source.

We know that:
dv
i=C× dt
Now, the applied voltage,
v=Vmaxsin(ωt) ……(i)
d
i=C dt (Vmaxsinωt)
i=CωVmaxcosωt
π
i=ωCVmaxsin(ωt+ 2 )
V max π
i= 1/ωC sin(ωt+ 2 )
Therefore, the maximum current,
V max
Imax= 1/ωC
 V max
Imax= Xc ………(ii)
1
The term ωC is known as capacitive resistance and denoted
by Xc.
Things to be concluded:
 Comparing equations (i) and (ii) we can conclude that
π
current leads the applied voltage by 2 .
 Hence in a capacitive circuit, current flowing in the
circuit leads the applied voltage by 90˚.
The phasor diagram is given below: -

PROCEDURE:
i. At first open the PSPICE SCHEMATIC WINDOW.
ii. Then go to DRAW menu and click on GET NEW PART
option.
iii. Then search for the required elements and sources in
the PART NAME BOX.
iv. Place all the required elements in the PSPICE
SCHEMATIC WINDOW and arrange all the parts
properly.
 v. Then again go to DRAW menu and click on WIRE to
select wire and connect all the element as per the given
circuit diagram.
vi. After completing the connection, go the FILE MENU and
SAVE the drawn circuit.
vii. Now, go to ANALYSIS MENU and click on SETUP option.
Then click on TRANSIENT option and set the final time
as 100ms. For pure Resistive, R-L and R-C circuit go to
the ANALYSIS MENU and click on AC SWEEP option and
set the end frequency as 20. Now, go to ANALYSIS
MENU and click on SIMULATE to simulate the circuit.
viii. After simulating the circuit one graph window will
appear, in that window go to TRACE menu and click on
ADD TRACE. Then select required trace expression to
observe the output waveforms.
CIRCUIT DIAGRAMS:
I. Pure resistive circuit
 II. R-L circuit

III. R-C circuit

CONCLUSION: We have drawn all the required circuits to
analyse the R-L-C series circuit in PSPICE SCHEMATIC and
observed all the output waveforms. So, we have successfully
analyzed the R-L-C series circuit.