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Chapter 4 - Lecture-1 Error Detection and Hamming Code

This document discusses various methods for error detection and correction in data transmission. It describes asynchronous and synchronous transmission and explains how parity checks, cyclic redundancy checks (CRCs), and checksums can be used to detect errors. It also discusses Hamming codes, which use additional redundancy bits to allow for error correction by identifying single bit errors. The key aspects of Hamming codes are calculating the appropriate number of redundancy bits needed and their positions to enable error detection and correction.

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Galata Tasfaye
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0% found this document useful (0 votes)
64 views

Chapter 4 - Lecture-1 Error Detection and Hamming Code

This document discusses various methods for error detection and correction in data transmission. It describes asynchronous and synchronous transmission and explains how parity checks, cyclic redundancy checks (CRCs), and checksums can be used to detect errors. It also discusses Hamming codes, which use additional redundancy bits to allow for error correction by identifying single bit errors. The key aspects of Hamming codes are calculating the appropriate number of redundancy bits needed and their positions to enable error detection and correction.

Uploaded by

Galata Tasfaye
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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CHAPTER 4

DATA LINK CONTROL PROTOCOLS

Error Control

References:
Chapter 6 - Data and Computer Communications, by William
Stallings
Lecture - Outline
❑Asynchronous and Synchronous Transmission
❑Types of error
❑Error detection techniques
➢Parity check
➢Two dimensional parity check
➢Checksum
➢Cyclic redundant check
❑Error correction code
➢Hamming code
Asynchronous and Synchronous
Transmission
❑The receiver must know the rate at which bits are being received so
that it can sample the line at appropriate intervals to determine the
value of each received bit.

❖receiver samples stream at bit intervals


❖if clocks not aligned and drifting will sample at wrong time after
sufficient bits are sent

❑Two solutions to synchronizing clocks

❖asynchronous transmission
❖synchronous transmission
Asynchronous Transmission
Each character of data is treated independently. The strategy with this scheme is to
avoid the timing problem by not sending long, uninterrupted streams of bits.

Assume that the receiver is fast


by 6%,.
Thus, the receiver samples the
incoming character every 94 µs
(based on the transmitter's clock).
As can be seen, the last sample is
erroneous.
Asynchronous - Behavior
❑simple

❑cheap

❑overhead of 2 or 3 bits per char (~20%)

❑good for data with large gaps (keyboard)


Synchronous Transmission
❑block of data transmitted sent as a frame
❑clocks must be synchronized
❖can use separate clock line
❖or embed clock signal in data
❑need to indicate start and end of block
❖use preamble and postamble
❑more efficient (lower overhead) than async

Asynchronous transmission requires 20% or more overhead. The control information,


preamble, and postamble in synchronous transmission are typically less than 100 bits.
Type of Errors
•Data can be corrupted during transmission, due to transmission
impairments.
• For reliable communication, error must be detected and corrected
Type of Errors
❑ Single-Bit Error

~ when only one bit in the data unit has changed.

occurs in serial communication


❑ Burst Error

~ means that 2 or more consecutive bits in the data unit have changed

occurs in serial communication


4.1.1 Error Detection
❑ Error detection uses the concept of redundancy, which means
adding extra bits for detecting errors at the destination
Detection(cont’d)

❑Detection methods
1. Parity Check - Vertical Redundancy Check
❑The simplest error-detecting scheme is to append a parity bit to the end
of a block of data.

❑A parity bit is added to every data unit so that the total number of 1s
(including the parity bit) becomes even for even-parity check or odd
for odd-parity check
parity-check
❑A simple parity-check code can detect an odd number of errors.

❑Note, however, that if two (or any even number) of bits are
inverted due to error, an undetected error occurs.

❑The use of the parity bit is not perfect, as noise impulses are often
long enough to destroy more than one bit, particularly at high data
rates.
2. Cyclic Redundancy Check (CRC)
❑One of the most common, and one of the most powerful, error-
detecting codes is the cyclic redundancy check (CRC).

❑Given a k-bit block of bits, or message, the transmitter generates a


sequence, known as a frame check sequence (FCS), such that the
resulting frame, consisting of n bits, is exactly divisible by some
predetermined number.

❑The receiver then divides the incoming frame by that number and,
if there is no remainder, assumes there was no error.
CRC(Cyclic Redundancy Check)
~ is based on binary division.

Modulo 2 arithmetic uses binary addition with no carries,which is just the exclusive-OR (XOR)
operation. Binary subtraction with no carries is also interpreted as the XOR operation: For example,
Calculating and Using CRCs
1. Let the information byte F = 1001011
2. The sender and receiver agree on an arbitrary binary pattern P.
❖ Let P = 1011.
3. Shift F to the left by 1 less than the number of bits in P.
❖ Now, F = 1001011000.
4. Let F be the dividend and P be the divisor. Perform “modulo 2
division”.
5. After performing the division, we ignore the quotient. We got 100 for
the remainder, which becomes the actual CRC checksum.
6. Add the remainder to F, giving the message M:
1001011 + 100 = 1001011100 = M 24
Calculating and Using CRCs
7. M is decoded and checked by the message receiver using the
reverse process.

____1010100
1011 | 1001011100
1011
001001
1001
0010
001011
1011
0000  Remainder
25
3. Checksum
❑Checksum Generator
Error Correction
❑ Can be handled in two ways

1. When an error is discovered, the receiver can have the sender


retransmit the entire data unit.

2. A receiver can use an error-correcting code, which automatically


corrects certain errors.

❑Single-Bit Error Correction

❖The secret of error correction is to locate the invalid bit or bits

❖ For ASCII code, it needs a three-bit redundancy code(000-111)


Error Correction(cont’d)
❑Redundancy Bits

~ to calculate the number of redundancy bits (R) required to correct


a given number of data bit (M)
Error Correction(cont’d)
❑If the total number of bits in a transmittable unit is m+r, then r
must be able to indicate at least m+r+1 different states
r
2 m+r+1
Example

For value of m is 7(ASCII), the smallest r value that can satisfy


this equation is 4

24  7 + 4 + 1
Error Correction(cont’d)
❑Relationship between data and redundancy bits

Number of Data Bits Number of Redundancy Bits Total Bits


(m) (r) (m+r)

1 2 3
2 3 5
3 3 6
4 3 7
5 4 9
6 4 10
7 4 11
Hamming Code
❑ Single parity bit can only detect error, not correct it

❑ Error-correcting codes require more than a single parity bit

❑ The key to the Hamming Code is the use of extra parity bits to
allow the identification of a single error.

❑ Positions of redundancy bits in Hamming code for 7-bit data.


Error Correction(cont’d)

❑Redundancy bits and their responsibility

r1 = bits 1, 3, 5, 7, 9, 11
r2 = bits 2, 3, 6, 7, 10, 11
r4 = bits 4, 5, 6, 7
r8 = bits 8, 9, 10, 11
Error Correction(cont’d)
❑Redundancy bits calculation(cont’d)
Error Correction(cont’d)
❑Redundancy bits calculation
Error Correction(cont’d)
❑Calculating the r values

Calculating Even
Parity
Error Correction(cont’d)
❑Error Detection and Correction
Error Correction(cont’d)
❑Error detection using Hamming Code
Summary
❑ Types of Error Detection/Correction Methods

- Parity & Cyclic Redundancy Check (CRC)

- Can only detect errors.

- Hamming Codes

- Can detect and correct errors.

- The more parity bits added, the more errors can be


detected and corrected.

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