ISSN (Print) : 2319-8613

ISSN (Online) : 0975-4024 P.Sathyanathan et al. / International Journal of Engineering and Technology (IJET)

Design Of 7 & 9 Level Inverter & DC-DC

Converter With Less Switches for Solar
Power Utilities
P.Sathyanathan#1, Dr. P.Usha Rani#2,
Electrical and Electronics Engineering#1, Electrical and Electronics Engineering#2
Vel Tech, Avadi, Chenai-62#1. R.M.D. Engineering College, Kavarapettei, Chenai- 601 206#2.
sathyanathanp@veltechengg.com, pur.eee@rmd.ac.in
Abstract— In this paper a multi (seven and nine) level inverter and DC-DC converter with less
number of switches for solar power utilities. The seven level inverter has six switches in the main circuit
and one high frequency switch for switching at any time to generate seven level output and the nine level
inverter has only seven switches. This reduces overall Total Harmonic Distortion, switching loss and
improves the output power and efficiency. The control circuit in this paper is simple by balancing the
voltage automatically. The necessary simulation results are explained in detail.
Keywords—DC-DC converter, multilevel inverter, solar power utilities and MATLAB/Simulink.
I. INTRODUCTION
Multilevel inverter has three types diode clamped [6-10], flying capacitor[11-13] and cascaded[14-18]. In
dcmli and flying capacitor always used a capacitor to build several voltage steps and it is hard to control the
voltage of these capacitors. The voltage in the output and power can be increase when the number of level
increases. Increasing voltage level increases main switching device and decreases the harmonic content and also
the filters used are reduced[20]. If the voltage level increases, the waveform has more free switching angles can
be reselected for harmonic elimination. The switching losses can be avoided In the absence of pulse width
modulation techniques. For a seven level inverter 12 switches in both diode clamped and flying capacitor types
but in cascaded type only 8 switches are used[2]. The switching devices in the multilevel inverter do not
encounter any voltage sharing problems. For this reason the multilevel inverter has more advantages such as
good power quality, good electromagnetic compatibility, low switching losses and high voltage capability.
Applications of the multilevel inverters are large motor drives and utility supplies.
II. PROPOSED CIRCUIT CONFIGURATION
The Fig 1. shows the configuration of proposed seven level inverter with DC-DC power converter.
The pv array is connected converter which converts the output power into two voltage sources which are
supplied to the inverter and the converter is a boost converter that incorporates a transformer with the turns ratio
of 2:1. The seven level inverter composed of capacitor and full bridge converter in cascade, the capacitor
selection circuits gives the output of three level dc output and further the full bridge converter converts this three
level dc output to seven level ac output.

Fig 1. Proposed System

DOI: 10.21817/ijet/2017/v9i3/170903S045 Vol 9 No 3S July 2017 286

ISSN (Print) : 2319-8613
ISSN (Online) : 0975-4024 P.Sathyanathan et al. / International Journal of Engineering and Technology (IJET)

Fig 2a. When the Switch (SD1 is ON) Fig 2b. When the Switch (SD1 is OFF)

The Fig 2a. consists of dc-dc power converter combines converter and a current fed converter.The boost
converter and the current fed converter contains diode, inductor and a switch charges the capacitor C2 and C1.
The Fig 2b. is the operating circuit of the converter when SD1 OFF and SD2 ON, the capacitor C1 is
connected to the capacitor C2 in parallel with transformer, the energy of the inductor and capacitor through
diode DD3and charge capacitor C1through transformer, diode DD1 during the off state of switch SD1. The boost
converter is operated in the continuous conduction mode.
The voltage in capacitor C2 is,
Vc2 = Vs / (1-D)
The voltage in capacitor C1 is,
Vc1= Vs / 2(1-D)
The operation is divided into positive cycle and negative cycle. For analysis, the switches used and
diodes are ideal, capacitors C1 and C2 are constant and equal to and 2Vdc/3, output current solar power is
sinusoidal and in phase with the voltage and in the positive half cycle of the utility the output current of seven
level inverter is also positive.
The operation of multi(seven) level inverter in the positive half cycle further divided into four modes as
shown in Fig3.

Fig 3a. In Positive half cycle (Mode 1) Fig 3b. In Positive half cycle (Mode 2)

Mode 1: Ss1 and Ss2 OFF, C1 is discharged through D1 and the output is Vdc/3. S1 and S4 ON, therefore the
output voltage of seven level inverter is Vdc/3.
Mode 2: Ss1 is OFF and Ss2 ON, C2 is discharged through Ss2 and D2 and the output is 2Vdc/3. S1 and S4 ON,
therefore the output voltage of seven level inverter is 2Vdc/3.

Fig 3c. In positive half cycle (Mode 3) Fig 3d. In positive half cycle (Mode 4)

Mode 3: D2 is reverse bias so Ss1 is ON and Ss2 may be ON or OFF because the state of Ss2 cannot affect the
current flow, C1 and C2 is discharged is series and the output is Vdc. S1 and S4 ON, therefore the output voltage
of seven level inverter is Vdc.
Mode 4: Ss1 and Ss2 OFF, the output is Vdc/3. S4 is ON, output current of the seven level inverter is positive and
passes through the filter inductor forces the diode of S2 to be switch ON for continuous conduction of the filter
inductor current therefore the output voltage of seven level inverter is Zero.

DOI: 10.21817/ijet/2017/v9i3/170903S045 Vol 9 No 3S July 2017 287

ISSN (Print) : 2319-8613
ISSN (Online) : 0975-4024 P.Sathyanathan et al. / International Journal of Engineering and Technology (IJET)

Fig 4a. In negative half cycle (Mode 5) Fig 4b. In negative half cycle (Mode 6)

Fig 4c. In negative half cycle (Mode 7) Fig 4d. In negative half cycle (Mode 8)

In the operation of the negative half cycle, the output current of the seven level inverter is negative. It can
also be divided into four modes and it is shown in the Fig 4. Compared with positive cycle, in this cycle has the
difference is Switch S2 and S3 ON during 5, 6, 7 modes and S2 may ON or OFF during mode 8 of negative half
cycle. The output voltage of negative cycle in seven level inverter also has four levels -Vdc, -2Vdc/3, -Vdc/3
and 0.
TABLE I. STATES OF SWITCHES AND DEVICES OPERATING IN ALL MODES

VO S1 S2 S3 S4 Ss1 Ss2 C1(VDC/3) C2(2VDC/3)

VDC/3 1 0 0 1 0 0 VDC/3 -
2VDC/3 1 0 0 1 0 1 - 2VDC/3
VDC 1 0 0 1 1 0 VDC/3 2VDC/3
0 0 0(D2ON) 0 1 0 0 - -
-VDC/3 0 1 1 0 0 0 -VDC/3 -
-2VDC/3 0 1 1 0 0 1 - -2VDC/3
-VDC 0 1 1 0 1 0 -VDC/3 -2VDC/3
0 0 1 0 0(D4ON) 0 0 - -
III. SIMULATION CIRCUITS AND RESULTS

Fig 5a. MATLAB Seven level inverter simulation circuit

DOI: 10.21817/ijet/2017/v9i3/170903S045 Vol 9 No 3S July 2017 288

ISSN (Print) : 2319-8613
ISSN (Online) : 0975-4024 P.Sathyanathan et al. / International Journal of Engineering and Technology (IJET)

Fig 5b. MATLAB Nine level inverter simulation circuit

To analyze and verify the circuit operation and characteristics of the proposed system, MATLAB
software is used for simulation. The Fig5a. shows the circuit diagram for multi(seven) level inverter consists of
six switches and three balancing capacitors and Fig5b. shows the circuit diagram for multi(nine) level inverter
consists of only seven switches and four balancing capacitors.

Fig 5c. Input Voltage of Seven level and Nine level Inverter

Fig 5d. Triggering pulses to the converter side of Seven level and Nine level Inverter

Fig 5e. Triggering pulses to the inverter side of Seven & Nine level Inverter

DOI: 10.21817/ijet/2017/v9i3/170903S045 Vol 9 No 3S July 2017 289

ISSN (Print) : 2319-8613
ISSN (Online) : 0975-4024 P.Sathyanathan et al. / International Journal of Engineering and Technology (IJET)

Fig 5f. Output voltage of Seven level and Nine level Inverter

Fig 5g. THD Analysis of Seven level and Nine level Inverter

The Fig5c shows the input voltage given to the seven level and nine level inverter which is from the closed
loop compared with the irradiance level in solar power and the inverter output.
The Fig5d. shows the triggering pulses given to the converter side generated by the pulse generator in the
period of 20ms and different phase delay for each switches.
The Fig5e. is the triggering pulses to the inverter side generated by the pulse generator in the period of 20ms
and different phase delay in each leg of the inverter switches to operate and to give the output. The Fig5f. shows
the output voltage of seven level and nine level inverter.
The Fig5g. shows the FFT analysis of single phase seven level and nine level inverter where the Total
Harmonic Distortion in Seven level Inverter is 18.08% and Nine level inverter is 10.80%.
TABLE II. COMPARISION OF THD IN MULTILEVEL INVERTER

PHASE MULTILEVEL INVERTER LEVEL THD

SINGLE CASCADED H-BRIDGE SINGLE 18.79%
SINGLE CASCADED H-BRIDGE SEVEN 18.08%
SINGLE CASCADED H-BRIDGE NINE 10.80%
IV. CONCLUSION
In this paper a pv generation system to convert the solar power output dc into ac output that is fed to the
utility. It has less number of switches when the level increases. The seven and nine level inverter contains six
switches and seven switches to generate the output of stepped ac sinusoidal waveform. The proposed inverter
has minimum number of automatic voltage balancing capacitors. Simulation results shows the output of
multi(seven and nine) level output voltage and the output current is in phase with voltage and also the THD
reduces by increasing the number of level.

DOI: 10.21817/ijet/2017/v9i3/170903S045 Vol 9 No 3S July 2017 290

ISSN (Print) : 2319-8613
ISSN (Online) : 0975-4024 P.Sathyanathan et al. / International Journal of Engineering and Technology (IJET)

REFERENCES
[1] Mastromauro R. A., Liserre M., and Dell’Aquila A., “Control issues in single-stage photovoltaic systems: MPPT, current and voltage
control,” IEEE Trans. Ind. Informat., vol. 8, no. 2, May. 2012, pp. 241–254.
[2] Dilip,Dr. A. Satheesh kumar, “ Design and Development of Multilevel Inverter for Solar Power Generstion”-International Journal of
Engineering Science and Innovative Technology (IJESIT), Vol.5,Issue 3, May 2016, pp 64-73.
[3] Hanif M., Basu M., and Gaughan K., “Understanding the operation of a Z-source inverter for photovoltaic application with a design
example,” IET Power Electron., vol. 4, no. 3, 2011, pp. 278–287.
[4] Shen J.-M, Jou H. L., and Wu J. C., “Novel transformer-less grid connected power converter with negative grounding for photovoltaic
generation system,” IEEE Trans. Power Electron., vol. 27, no. 4, Apr. 2012, pp. 1818–1829.
[5] Mohan N, Undeland T. M., and Robbins W. P, Power Electronics Converters, Applications and Design, Media Enhanced 3rd ed. New
York, NY, USA: Wiley, 2003.
[6] Hasegawa K. and Akagi H., “Low-modulation-index operation of a five level diode-clamped pwm inverter with a dc-voltage-balancing
circuit for a motor drive,” IEEE Trans. Power Electron., vol. 27, no. 8, Aug. 2012, pp. 3495–3505.
[7] Pouresmaeil E., Montesinos-Miracle D., and Gomis-Bellmunt O., “Control scheme of three-level NPC inverter for integration of
renewable energy resources into AC grid,” IEEE Syst. J., vol. 6, no. 2, Jun.2012, pp. 242–253.
[8] Srikanthan S. and. Mishra M. K, “DC capacitor voltage equalization in neutral clamped inverters for DSTATCOM application,” IEEE
Trans. Ind. Electron., vol. 57, no. 8, Aug. 2010, pp. 2768–2775.
[9] Nagarajan C and Madheswaran M. - ‘Experimental Study and steady state stability analysis of CLL-T Series Parallel Resonant
Converter with Fuzzy controller using State Space Analysis’- Iranian Journal of Electrical & Electronic Engineering, Vol.8 (3) ,
September 2012, pp.259-267.
[10] Nagarajan C and Madheswaran M – ‘Analysis and Implementation of LLC-T Series Parallel Resonant Converter with Fuzzy
controller’- International Journal of Engineering Science and Technology (IJEST), Applied Power Electronics and Intelligent Motion
Control. Vol.2 (10) , December 2010, pp 35-43
[11] Nagarajan C and Madheswaran M - ‘Performance Analysis of LCL-T Resonant Converter with Fuzzy/PID Using State Space
Analysis’- Springer, Electrical Engineering, Vol.93 (3) , September 2011, pp.167-178.
[12] Chaves M., Margato E, Silva J. F., and Pinto S. F, “New approach in back-to-back m-level diode clamped multilevel converter
modeling and direct current bus voltages balancing,” IET power Electron., vol. 3, no. 4, 2010, pp. 578–589.
[13] Barros J. D, Silva J. F. A, and Jesus E. G. A, “Fast-predictive optimal control of NPC multilevel converters,” IEEE Trans. Ind.
Electron., vol. 60, no. 2 Feb. 2013, pp. 619–627.
[14] A. K. Sadigh, S. H. Hosseini, M. Sabahi, and G. B. Gharehpetian, “Double flying capacitor multicell converter based on modified
phase-shifted pulse width modulation,” IEEE Trans. Power Electron., vol. 25, no. 6, pp. 1517–1526, Jun. 2010.
[15] S. Thielemans, A. Ruderman, B. Reznikov, and J. Melkebeek, “Improved natural balancing with modified phase-shifted PWM for
single-leg five level flying-capacitor converters,” IEEE Trans. Power Electron., vol. 27,no. 4, pp. 1658–1667, Apr. 2012.
[16] S. Choi and M. Saeedifard, “Capacitor voltage balancing of flying capacitor multilevel converters by space vector PWM,” IEEE Trans.
Power Delivery, vol. 27, no. 3, pp. 1154–1161, Jul. 2012
[17] L. Maharjan, T. Yamagishi, and H. Akagi, “Active-power control of individual converter cells for a battery energy storage system
based on a multilevel cascade pwm converter,” IEEE Trans. Power Electron., vol. 27, no. 3, pp. 1099–1107, Mar. 2012.
[18] X. She, A. Q. Huang, T. Zhao, and G. Wang, “Coupling effect reduction of a voltage-balancing controller in single-phase cascaded
multilevel converters,” IEEE Trans. Power Electron., vol. 27, no. 8, pp. 3530–3543, Aug. 2012.
[19] J. Chavarria, D. Biel, F. Guinjoan, C. Meza, and J. J. Negroni, “Energy balance control of PV cascaded multilevel grid-connected
inverters under level-shifted and phase-shifted PWMs,” IEEE Trans. Ind. Electron, vol. 60, no. 1, pp. 98–111, Jan. 2013.
[20] J. Pereda and J. Dixon, “High-frequency link: A solution for using only one DC source in asymmetric cascaded multilevel inverters,”
IEEE Trans. Ind. Electron., vol. 58, no. 9, pp. 3884–3892, Sep. 2011.3462 IEEE TRANSACTIONS ON POWER ELECTRONICS,
VOL. 29, NO. 7, JULY 2014.
[21] N. A. Rahim, K. Chaniago, and J. Selvaraj, “Single-phase seven-level grid-connected inverter for photovoltaic system,” IEEE Trans.
Ind. Electr. vol. 58, no. 6, pp. 2435–2443, Jun. 2011

Author Profile
P.SATHYANATHAN, M.E.(Ph.D), Assistant Professor in Electrical and Electronics
Engineering, Veltech, Avadi, Chennai-62. He received his B.E degree in Electrical and
Electronics Engineering from National Engineering College, Kovilpatti. M.E degree in Power
Electronics and Drives from Jerusalem College of Engineering, Chennai-100. Currently doing
PhD in Anna University. He has 4 years 6 months of Teaching Experience. His area of
interest is Power Electronics, Special Electrical Machines. He has published many papers in
International Conferences and Journals. He is a life member of ISTE.
Dr.P.USHA RANI, M.E. Ph.D, is Professor in Department of Electrical and Electronics
Engineering, since June 2014. She obtained her B.E (EEE) from Govt. College of Technology
in 1991, M.E (Power Systems) from College of Engineering, Anna University in 2002, and
Ph.D (Power Electronics & Drives) from College of Engineering, Anna university in 2011.
She has been in the teaching profession for the past 18 years and has handled PG / UG
programme and total experience of 23 years. Her areas of interest include Power Electronics,
Power Systems, Power Quality and FACTS. She has published 14 papers in International Journals and 15 papers
in International Conferences (IEEE Xplore-5). She is a recognized Supervisor of Anna University chennai and
currently guiding four students. She has conducted Anna University sponsored FDP related to her area of
interest. She has delivered lectures at AICTE and Anna University sponsored FDP’s conducted by various
colleges. She has a reviewer for international journals. She is a member of IEEE and life member of ISTE.

DOI: 10.21817/ijet/2017/v9i3/170903S045 Vol 9 No 3S July 2017 291