CSG TUTORIALS

Explain each of the following types of processor

a) Pipeline processor Pipelining is the process of accumulating instructions from
processor through a pipeline. It allows storing and executing instructions in an orderly
process. Pipelining is a technique where multiple instructions are over lapped during
execution and are divided into stages and these stages are connected to one another to
form a pipe like structure where instruction enter from one end e and leaves from the
other.
b) A multiprocessor system is defined as "a system with more than one processor",
and, more precisely, "a number of central processing units linked together to enable
parallel processing to take place.
c) Multicomputer: Multicomputer are distributed memory MIMD architectures. The
following diagram shows a conceptual model of a multicomputer

Multicomputer are message-passing machines which apply packet switching method to

exchange data. Here, each processor has a private memory, but no global address space
as a processor can access only its own local memory. So, communication is not
transparent: here programmers have to explicitly put communication primitives in their
code.
d) Parallel Processing Systems are designed to speed up the execution of programs by
dividing the program into multiple fragments and processing these fragments
simultaneously. Such systems are multiprocessor systems also known as tightly
coupled systems. Parallel systems deal with the simultaneous use of
multiple computer resources that can include a single computer with multiple
processors, a number of computers connected by a network to form a parallel
processing cluster or a combination of both.

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 e) computer/processor that has an architecture especially designed for
processing arrays (e.g. matrices) of numbers. The architecture includes a number of
processors (say 64 by 64) working simultaneously, each handling one element of the
array, so that a single operation can apply to all elements of the array in parallel. To
obtain the same effect in a conventional processor, the operation must be applied to
each element of the array sequentially, and so consequently much more slowly.
2) characteristics of Von Neumann architecture
The von Neumann architecture—also known as the von Neumann model or Princeton
architecture—is a computer architecture based on a 1945 description by John von Neumann and
others in the First Draft of a Report on the EDVAC. That document describes a design
architecture for an electronic digital computer with these components:
 A processing unit that contains an arithmetic logic unit and processor registers
 A control unit that contains an instruction register and program counter
 Memory that stores data and instructions
 External mass storage
 Input and output mechanisms

A von Neumann architecture scheme

The term "von Neumann architecture" has evolved to mean any stored-program computer in
which an instruction fetch and a data operation cannot occur at the same time because they share
a common bus. This is referred to as the von Neumann bottleneck and often limits the
performance of the system.
3) what is the full meaning of RISC and what are it characteristics.
REDUCED INSTRUTION SET COMPUTER.
Characteristic of RISC –
 Simpler instruction, hence simple instruction decoding.
 Instruction comes undersize of one word.
 Instruction takes a single clock cycle to get executed.
 More number of general-purpose registers.
 Simple Addressing Modes.
 Less Data types.

4) Examples of RISC and CISC processor.

RISC: Examples of processors with the RISC architecture include MIPS, PowerPC, Atmel's
AVR, the Microchip PIC processors, Arm processors, RISC-V, and all modern microprocessors
have at least some elements of RISC.

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CISC: Examples of CISC processors are the System/360, VAX, AMD, and Intel x86 CPUs.
Common RISC microprocessors are ARC, Alpha, ARC, ARM, AVR, PA-RISC, and SPARC.
5) The standard features of RISC processors are listed below:
1. RISC processors use a small and limited number of instructions.
RISC processors only support a small number of primitive and essential instructions. This puts
emphasis on software and compiler design due to the relatively simple instruction set.
2. RISC machines mostly uses hardwired control unit.
Most of the RISC processors are based on the hardwired control unit design approach. In
hardwired control unit, the control units use fixed logic circuits to interpret instructions and
generate control signals from them. It is significantly faster than its counterpart but are rather
inflexible.
3. RISC processors consume less power and have high performance.
RISC processors have been known to be heavily pipelined this ensures that the hardware
resources of the processor are utilized to a maximum giving higher throughput and also
consuming less power.
4. Each instruction is very simple and consistent.
Most instructions in a RISC instruction set are very simple that get executed in one clock cycle.

6) VON NEUMANN
MODEL
COMPUTER

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7) Diagram of hypothetical CPU.

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8) What is the role of the following register within the CPU
1) An instruction register holds a machine instruction that is currently being executed. In
general, a register sits at the top of the memory hierarchy. A variety of registers serve different
functions in a central processing unit (CPU) – the function of the instruction register is to hold
that currently queued instruction for use.
2 A memory buffer register (MBR) (also known as memory data register (MDR)) is
the register in a computer's processor, or central processing unit, CPU, that stores the data being
transferred to and from the immediate access storage.
3.) This register is used to access data and instructions from memory during the execution phase
of instruction. MAR holds the memory location of data that needs to be accessed. When reading
from memory, data addressed by MAR is fed into the MDR (memory data register) and then
used by the CPU. When writing to memory, the CPU writes data from MDR to the memory
location whose address is stored in MAR. MAR, which is found inside the CPU, goes either to
the RAM (random-access memory).
4) The program counter, PC, is a special-purpose register that is used by the processor to hold the
address of the next instruction to be executed. The PLA automatically updates the PC to point to
the next instruction during the op-code decode cycle.
9) What are the elements of an Instruction set:
The instruction set consists of addressing modes, instructions, native data types, registers,
memory architecture, interrupt, and exception handling, and external I/O. An example of
an instruction set is the x86 instruction set, which is common to find on computers today
10) Give the format of an instruction set and explain each part.

The term addressing modes refers to the way in which the operand of an instruction is specified.
Information contained in the instruction code is the value of the operand or the address of the
result/operand. Following are the main addressing modes that are used on various platforms and
architectures.

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  Index Mode: The address of the operand is obtained by adding to the contents of the
general register (called index register) a constant value. The number of the index
register and the constant value are included in the instruction code. Index Mode is used
to access an array whose elements are in successive memory locations. The content of
the instruction code, represents the starting address of the array and the value of the
index register, and the index value of the current element. By incrementing or
decrementing index register different element of the array can be accessed.
 Indirect Mode: The effective address of the operand is the contents of a register or
main memory location whose address appears in the instruction. Indirection is noted by
placing the name of the register or the memory address given in the instruction in
parentheses. The register or memory location that contains the address of the operand is
a pointer. When an execution takes place in such mode, instruction may be told to go to
a specific address. Once it's there, instead of finding an operand, it finds an address
where the operand is located.

NOTE:

Two memory accesses are required in order to obtain the value of the operand (fetch operand
address and fetch operand value).

 
 Register Mode: The name (the number) of the CPU register is embedded in the
instruction. The register contains the value of the operand. The number of bits used to
specify the register depends on the total number of registers from the processor set.

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 Displacement Mode: Similar to index mode, except instead of a index register a base
register will be used. Base register contains a pointer to a memory location. An integer
(constant) is also referred to as a displacement. The address of the operand is obtained
by adding the contents of the base register plus the constant. The difference between
index mode and displacement mode is in the number of bits used to represent the
constant. When the constant is represented a number of bits to access the memory, then
we have index mode. Index mode is more appropriate for array accessing; displacement
mode is more appropriate for structure (records) accessing.
 Auto increment /Auto decrement Mode: A special case of indirect register mode. The
register whose number is included in the instruction code, contains the address of the
operand. Auto increment Mode = after operand addressing, the contents of the register is
incremented. Decrement Mode = before operand addressing, the
NOTE: the above sequence can be re-rewritten proposing an "auto decrement instruction", not
real in MIPS architecture.

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11) Give the format of an instruction and explain each part
Three address instruction. This means there will be three operands in the instruction all
operand address is explicitly defined. These can be a processor register or it can be a memory
Two address instruction: They are most common in commercial computers and each address
can be specified either a processor register operand or a memory word.
One address instruction: one address instruction use an implied accumulator register for all
data multiplication and for multiplication and division, we need a second register and has an
explicit address field.
Zero address instruction: is a stack organized instruction that contains no address field,
operand sources and destination are both implicit, (PUSH and POP instruction).

12) Name and explain types of instructions

 Integer Instructions – These include arithmetic, compare, logical, and rotate/shift

instructions. They operate on byte, halfword, word, and doubleword operands.
 Floating-Point Instructions – These include floating-point arithmetic, multiply-add,
compare, and move instructions, as well as instructions that affect the Floating-Point
Status and Control Register (FPSCR). Floating-point instructions operate on single-
precision and double-precision floating-point operands.
 Load and Store Instructions – These include integer and floating-point load and store
instructions, with byte-reverse, multiple, and string options for the integer loads and
stores.
 Memory Synchronization Instructions – These instructions control the order in which
memory operations are completed with respect to asynchronous events, and the order in
which memory operations are seen by other processors or memory-access mechanisms.
The instruction types include load and store with reservation, synchronization, and
enforce in-order execution of I/O. They are especially useful for multiprocessing.
 Flow Control Instructions – These include branch, Condition-Register logical, trap, and
other instructions that affect the instruction flow.
 Processor Control Instructions – These instructions are used for synchronizing memory
accesses and managing caches, Translation Lookaside Buffers (TLBs), segment registers,
and other privileged processor states. They include move-to/from special-purpose register
instructions.
 Memory and Cache Control Instructions – These instructions control caches, TLBs, and
segment registers.
 External Control Instructions – These instructions allow a user-level program to
communicate with a special-purpose device.

13) What are the functional requirements of a control unit.

The functional requirements of control unit are those functions that the control unit must
perform. And these are the basis for the design and implementation of the control unit.

A three step process that lead to the characterization of the Control Unit:
·        Define the basic elements of the processor
·        Describe the micro-operations that the processor performs
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 ·        Determine the functions that the control unit must perform to cause the micro-
operations to be performed.

1.  Basic Elements of Processor

The following are the basic functional elements of a CPU:

·        ALU: is the functional essence of the computer.
·        Registers: are used to store data internal to the CPU.

2.  Types of Micro-operation

These operations consist of a sequence of micro operations. All micro instructions fall into one
of the following categories:
·        Transfer data between registers
·        Transfer data from register to external
·        Transfer data from external to register
·        Perform arithmetic or logical ops

3.  Functions of Control Unit

Now we define more explicitly the function of control unit. The control unit perform two tasks:
·        Sequencing: The control unit causes the CPU to step through a series of micro-
operations in proper sequence based on the program being executed.
·        Execution: The control unit causes each micro-operation to be performed.

For the control unit to perform its function, it must have inputs that allow it to determine the state
of the system and outputs that allow 

it to control the behavior of the system. These are the external specifications of the control unit.
Internally, the control unit must have the logic required to perform sequencing and execution
functions.

Control unit Inputs

The possible inputs for the control units are:

Clock: The control unit uses clock to maintain the timings.

Instruction register: Op-code of the current instruction is used to determine which micro-
instructions to be performed during the execution cycle.

Flags: These are needed by the control unit to determine the status of the CPU and outcome of
previous ALU operations.

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Example: As seen earlier the instruction ISZ, which is increment and skip if zero, the control unit
will increment the PC if the zero flag is set.

Control signals from control bus: the control bus portion of the system bus provides signals to
the control unit, such as interrupt signals and acknowledgements.
14) What are the component of a CPU
Common CPU components
The central processing unit (CPU) consists of six main components:
control unit (CU)
arithmetic logic unit (ALU)
registers
cache
buses
clock
All components work together to allow processing and system control.
Control unit
The CU provides several functions:
it fetches, decodes and executes instructions
it issues control signals that control hardware
it moves data around the system
Arithmetic logic unit
The ALU has two main functions:
It performs arithmetic and logical operations (decisions). The ALU is where calculations are
done and where decisions are made.
It acts as a gateway between primary memory and secondary storage . Data transferred between
them passes through the ALU.
The ALU performs calculations and makes logical decisions.
Registers
Registers are small amounts of high-speed memory contained within the CPU. They are used by
the processor to store small amounts of data that are needed during processing, such as:
the address of the next instruction to be executed
the current instruction being decoded
the results of calculations
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Different processors have different numbers of registers for different purposes, but most have
some, or all, of the following:
program counter
memory address register (MAR)
memory data register (MDR)
current instruction register (CIR)
accumulator (ACC)
Cache
Cache is a small amount of high-speed random access memory (RAM) built directly within the
processor. It is used to temporarily hold data and instructions that the processor is likely to reuse.
This allows for faster processing as the processor does not have to wait for the data and
instructions to be fetched from the RAM.
Buses
A bus is a high-speed internal connection. Buses are used to send control signals and data
between the processor and other components.
Three types of bus are used:
Address bus - carries memory addresses from the processor to other components such as primary
memory and input/output devices.
Data bus - carries the actual data between the processor and other components.
Control bus - carries control signals from the processor to other components. The control bus
also carries the clock's pulses.
Clock
The CPU contains a clock which is used to coordinate all of the computer's components. The
clock sends out a regular electrical pulse which synchronizes (keeps in time) all the components.
The frequency of the pulses is known as the clock speed. Clock speed is measured in hertz. The
higher the frequency, the more instructions can be performed in any given moment of time.
In the 1980s, processors commonly ran at a rate of between 3 megahertz (MHz) to 5 MHz, which
is 3 million to 5 million pulses or cycles per second. Today, processors commonly run at a rate of
3 gigahertz (GHz) to 5 GHz, which is 3 billion to 5 billion pulses or cycles per second.

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