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    Final Exam: Question 1 (L.O.2) (2.0pts.) : Node-Voltage Method

    Uploaded by

    Pham Lê Huy
    This document contains a final exam for a course on Introduction to Electrical and Computer Engineering. The exam contains 7 questions testing various concepts related to node-voltage analysis, Thévenin and Norton equivalent circuits, diodes, bipolar junction transistors, number systems, Boolean algebra, and logic gates. The exam instructions specify that students must show their work and include units in their answers. Exam supervisors will sign the document before and after the exam is administered.

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    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd

    Final Exam: Question 1 (L.O.2) (2.0pts.) : Node-Voltage Method

    Uploaded by

    Pham Lê Huy
    45 views4 pages
    This document contains a final exam for a course on Introduction to Electrical and Computer Engineering. The exam contains 7 questions testing various concepts related to node-voltage analysis, Thévenin and Norton equivalent circuits, diodes, bipolar junction transistors, number systems, Boolean algebra, and logic gates. The exam instructions specify that students must show their work and include units in their answers. Exam supervisors will sign the document before and after the exam is administered.

    Original Title

    192-EE1029-Final_Exam

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    © © All Rights Reserved

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    This document contains a final exam for a course on Introduction to Electrical and Computer Engineering. The exam contains 7 questions testing various concepts related to node-voltage analysis, Thévenin and Norton equivalent circuits, diodes, bipolar junction transistors, number systems, Boolean algebra, and logic gates. The exam instructions specify that students must show their work and include units in their answers. Exam supervisors will sign the document before and after the exam is administered.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    45 views4 pages

    Final Exam: Question 1 (L.O.2) (2.0pts.) : Node-Voltage Method

    Uploaded by

    Pham Lê Huy
    This document contains a final exam for a course on Introduction to Electrical and Computer Engineering. The exam contains 7 questions testing various concepts related to node-voltage analysis, Thévenin and Norton equivalent circuits, diodes, bipolar junction transistors, number systems, Boolean algebra, and logic gates. The exam instructions specify that students must show their work and include units in their answers. Exam supervisors will sign the document before and after the exam is administered.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 4

    (Date) (Date)

    Lecturer: Approved by:


    (Signature & Fullname) (Signature, Position & Fullname)

    (The above part must be hidden when copying for exam)

    Semester/Academic year 2 2019-2020


    FINAL EXAM Date 23/07/2020
    Course title Introduction to Electrical and Computer Engineering
    UNIVERSITY OF TECHNOLOGY - VNUHCM Course ID EE1029
    FACULTY OF EEE Duration 90 mins. Question sheet code
    Notes:  Answer on this question sheet.
     Lectures, class notes, books, laptops, iPads, iPhones, etc. are NOT allowed.
     Arithmetic-only calculators are accepted.
     Show all your work, e.g., your solution process, the equation(s) that you use, the values of the
    variables used the equation(s), etc.
     Include the unit of measurement in each answer.
     Do NOT communicate with any other students.

    Exam supervisor 1 (Signature & Fullname) Exam supervisor 2 (Signature & Fullname)
    Score:

    Question 1 (L.O.2) (2.0pts.): Node-voltage Method


    The voltages V1, V2, V3, and V4 are the node voltages corresponding to nodes 1, 2, 3, and
    4 in figure below. Use the node-voltage method to determine the values of these node
    voltages.

    Stu.ID: ......................................... Stu. Fullname: ............................................................................................................ Page 1/4


    Question 2 (L.O.2) (2.0pts.): Thévenin & Norton Equivalent Circuits
    Find the Thévenin equivalent circuit with respect to the terminals a,b for the circuit below.

    RTH
    a
    +
    VTH 2.0kΩ
    12 V RL
    VA
    1.0kΩ
    R1
    -

    b

    1. (1.5 pts.) By finding the open-circuit voltage and the short-circuit current.

    2. (0.5 pts.) Solve for the Thévenin resistance (RTH) by removing the independent
    sources.

    Question 3 (L.O.3) (1.5pts.): Diodes


    Use the ideal diode model to determine the state (ON or OFF) of each diode (D1, D2).

    Stu.ID: ......................................... Stu. Fullname: ............................................................................................................ Page 2/4


    Question 4 (L.O.3) (1.5pts.): BJT
    Given BJT parameters: VBEON= 0.7V; β= 100; VCESAT = 0.2V

    1. (1.0 pts) Determine IB, IC, IE, VCE and the state of BJT.
    Note that use the equation IE = IB + IC for calculating the IE current.

    2. (0.5 pts) Determine the power dissipated in BJT.

    Question 5 (L.O.4) (1.0pts.): Number system conversion


    Convert the hexadecimal number 605.B4 to decimal number.
    1. (0.5pts) From hexadecimal number:

    2. (0.5pts) From binary number:

    Stu.ID: ......................................... Stu. Fullname: ............................................................................................................ Page 3/4


    Question 6 (L.O.4) (1.0pts.): Basic Boolean Algebra Identities
    Using Boolean identities, prove that C D  B .C  A BD  A  C B  C B  D

    Question 7 (L.O.4) (1.0pts.): Basic Logic Gates


    Given the logic circuit below.

    A
    B
    C F

    1. (0.5 pts) Determine the truth table for F(A,B,C).

    A B C F Show all your work here.


    0 0 0
    Boolean expression for F(A,B,C):
    0 0 1
    0 1 0 F(A,B,C) =
    0 1 1
    1 0 0
    1 0 1
    1 1 0
    1 1 1

    2. (0.5 pts) Design the circuit using NAND gates. Assuming that the complemented inputs
    are available.

    Stu.ID: ......................................... Stu. Fullname: ............................................................................................................ Page 4/4

    --- END ---

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