PR Controller
PR Controller
PR Controller
#include "DSP28x_Project.h"
#include "math.h"
// Device Headerfile and Examples Include File
#if (CPU_FRQ_150MHZ) // Default - 150 MHz SYSCLKOUT
#define ADC_MODCLK 0x3 // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 150/(2*3) = 25.0
MHz
#endif
#if (CPU_FRQ_100MHZ)
#define ADC_MODCLK 0x2 // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 100/(2*2) = 25.0
MHz
#endif
#define ADC_CKPS 0x0 // ADC module clock = HSPCLK/1 = 25.5MHz/(1) = 25.0
MHz
#define ADC_SHCLK 0x1 // S/H width in ADC module periods = 2
ADC cycle
int a=4;
int b;
float ir = 0.0;
float del_ts = 0.00001492,Ws= 314.16,Wc=50.;
float ir_diffi, ir_diffi_pre=0., ir_diffi_pre1=0.;
float
Kp=.3,Ki=600.,Kr=50.,pr_r,Ir_r,prlimit1=.7,Ir_r_limit=3,iout_error_resonance_limit=
3,iout_error_resonance1_limit=1,iout_error_resonance2_limit=1,Error_r;
float iout_error_resonance=0., iout_error_resonance_pre=0.,
iout_error_resonance_pre1=0.,iout_error_resonance1=0.,
iout_error_resonance1_pre=0.,
iout_error_resonance1_pre1=0.,iout_error_resonance2=0.,
iout_error_resonance2_pre=0., iout_error_resonance2_pre1=0.;
float
a10,b01,b10,a1,a2,b0,b1,b2,c10,x=0.,a101,b011,b101,a11,a21,b00,b11,b21,c101,y=0.,a1
02,b012,b102,a12,a22,b000,b12,b22,c102,z=0.;
// Prototype statements for functions found within this file.
__interrupt void adca1_isr(void);
void main(void)
{
// This is because the ADC can only be configured with a frequency of 25MHz.
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
// This function is found in DSP2833x_PieVect.c.
InitPieVectTable();
InitAdc();
EALLOW;
AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x0;
AdcRegs.ADCTRL1.bit.CONT_RUN = 0; // Setup continuous run
AdcRegs.ADCTRL2.bit.SOC_SEQ1 = 0x1;
// Interrupts that are used in this example are re-mapped to
//GpioDataRegs.GPCDAT.bit.GPIO76 =1;
// PI Controller
pr_r=ir_diffi*Kp;
if(pr_r>prlimit1)pr_r=prlimit1;
if(pr_r<-prlimit1)pr_r=-prlimit1;
Ir_r = Ir_r+Ki*ir_diffi*del_ts;
iout_error_resonance=b0*ir_diffi+b1*ir_diffi_pre+b2*ir_diffi_pre1+a1*iout_error_res
onance_pre-a2*iout_error_resonance_pre1;
iout_error_resonance_pre1= iout_error_resonance_pre;
iout_error_resonance_pre= iout_error_resonance;
ir_diffi_pre1= ir_diffi_pre;
ir_diffi_pre= ir_diffi;
if (iout_error_resonance>= iout_error_resonance_limit)
iout_error_resonance= iout_error_resonance_limit;
if (iout_error_resonance<=-iout_error_resonance_limit)
iout_error_resonance=-iout_error_resonance_limit;
iout_error_resonance1=b0*ir_diffi+b1*ir_diffi_pre+b2*ir_diffi_pre1+a1*iout_error_re
sonance1_pre-a2*iout_error_resonance1_pre1;
iout_error_resonance1_pre1= iout_error_resonance1_pre;
iout_error_resonance1_pre= iout_error_resonance1;
ir_diffi_pre1= ir_diffi_pre;
ir_diffi_pre= ir_diffi;
if (iout_error_resonance1>=
iout_error_resonance1_limit) iout_error_resonance1= iout_error_resonance1_limit;
if (iout_error_resonance1<=-iout_error_resonance1_limit)
iout_error_resonance1=-iout_error_resonance1_limit;
iout_error_resonance2=b0*ir_diffi+b1*ir_diffi_pre+b2*ir_diffi_pre1+a1*iout_error_re
sonance2_pre-a2*iout_error_resonance2_pre1;
iout_error_resonance2_pre1=
iout_error_resonance2_pre;
iout_error_resonance2_pre=
iout_error_resonance2;
ir_diffi_pre1= ir_diffi_pre;
ir_diffi_pre= ir_diffi;
if (iout_error_resonance2>=
iout_error_resonance2_limit) iout_error_resonance2= iout_error_resonance2_limit;
if (iout_error_resonance2<=-
iout_error_resonance2_limit) iout_error_resonance2=-iout_error_resonance2_limit;
Error_r= pr_r+Ir_r+iout_error_resonance+
iout_error_resonance1+iout_error_resonance2 ;
ir=(AdcRegs.ADCRESULT1>>4);
b=b+1;
if(b>100)
b=0;
// Import and offset. 2080 was for 20khz board. 2067 for 10 kHz board.
return;
}
//===========================================================================
// No more.
//==========================================================================