EE 230 - Analog Lab - 2021-22/I (Autumn) Experiment 2: DC Power Supply
EE 230 - Analog Lab - 2021-22/I (Autumn) Experiment 2: DC Power Supply
EE 230 - Analog Lab - 2021-22/I (Autumn) Experiment 2: DC Power Supply
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1.2.1 NGSPICE Simulation
Simulate the Bridge rectifier circuit. Plot the Vout waveform as one plot; plot the currents through the diodes D1
and D3 as the second plot. Choose RL = 1 kΩ. Do not connect any Capacitor for this part. Note that the
transformer output voltage of 15 V is its RMS value. Choose a voltage source as appropriate.
Hint: You need to use the .tran command for analysis. Also, choose a sine waveform with the correct amplitude
and frequency. Use appropriate voltage sources for obtaining the currents through D1 and D2.
Diode Model:
You need to use an appropriate diode model for the diodes used. Note that the diodes used (1N4007) are not
switching diodes, but power diodes. 1N4007 has a peak current rating of 1 A and breakdown voltage 1000 V.
Model for 1N914 switching diode is given below (taken from WEL Lab site).
For a given load RL, one solution employed by some to reduce the ripple voltage is to increase C. In the
following NGSPICE simulations you should investigate and decide for yourself whether this strategy is right or
not.
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1.3 DC Power Supply with Zener Diode Regulator
1.3.1 Zener Regulator - Analysis
Analyse the Zener diode regulator circuit given below.
Case (i): For Vin = 20 V (dc). Choose RS = 470 Ω, RL = 1 kΩ. Assume Zener voltage = 12 V and Zener
region diode resistance = 125 Ω. Calculate Vout, IS, IZ and IL.
Case (ii): For Vin varying from 15 V to 25 V. RS = 470 Ω, RL = 1 kΩ. (Zener voltage = 12 V and Zener
region diode resistance = 125 Ω). Consider a few Vin values between 15 and 25 V.
Hint: For a given Vin value, apply Thevenin’s theorem and represent the Zener regulator by its equivalent
Thevenin voltage and resistance. This would make it easier to calculate Vout, and IL , and then IS and IZ.
.SUBCKT ZENER_12 1 2
D1 1 2 DF
DZ 3 1 DR
VZ 2 3 10.8
.MODEL DF D ( IS=27.5p RS=0.620 N=1.10 CJO=78.3p VJ=1.00 M=0.330 TT=50.1n )
.MODEL DR D ( IS=5.49f RS=50 N=1.77 )
.ENDS
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You may key in the above sub circuit in your .CIR file and then use it through the sub circuit command:
x1 A K ZENER_12
where A and K are the anode and cathode nodes of the Zener diode, respectively.
b) See how well the Zener regulator regulates Vout for a range of Vin values. You should use the .dc
command for this purpose. Format for the .dc command:
.dc source startval stopval stepsize
Obtain the Vout, IS, IZ and IL values when Vin is varied from 15 to 25 V in steps of 0.5 V. (Assume
RS = 470 Ω, RL = 1 kΩ). Observe IZ values for Vin ≤ 17 V and explain the results.
c) For Vin = 20 V, and RS = 470 Ω, simulate for different values of RL lower than 1 kΩ. For the given
values, verify the simulation results with he theoretical value for the lowest value of RL allowed for a Zener
regulator.
Note that VB = Vout . R2/(R1+R2), is directly proportional to Vout. Assume that Vout increases from the steady-
state value due to RL↑ (or less load current). This would result in VB also increasing proportionately, which
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would cause more base current to flow in Q2 and consequently more collector current in Q2, which would then
drain away some of the base current flowing into Q1, resulting in increased VCE drop in Q1, which would reduce
Vout. Similar argument can be given for corrections when Vout decreases. Hence, we see that the circuit
continuously samples Vout and corrects any voltage variations.
Format for BJTs: Q1 C B E bc547a, where C, B and E are the Collector, Base and Emitter nodes of the BJT.
Refer to the Common Emitter amplifier example given in Chapter 21 (page 451) of the NGSPICE-34-manual.
There a ‘generic npn’ model is used. Here we are specifying the model parameters.
Simulation
Create a .CIR file to simulate the BJT series regulator circuit of Fig.4. Use Vin = 20 V, RL = 1 kΩ.
Note that in Fig 4, the value of R1 is: 10kΩ + part of the 5 kΩ potentiometer; similarly, R2 is: 10 kΩ + the
remaining part of the 5 kΩ potentiometer). Hence, R1 + R2 = 25 kΩ.
Case i) For Vin = 20 V, RL = 1 kΩ, keep R1 = R2 = 12.5 kΩ. Print all the node voltages.
Case ii) Vary R1 and R2 (while keeping R1 + R2 = 25 kΩ) so as to get Vout = 12 V approximately.
Case iii) for the R1 and R2 values you got for Vout = 12 V, perform a .dc analysis. (Keep RL = 1 kΩ, and vary
Vin from 15 V to 25 V in steps of 0.5 V). Compare these results with the ones you got for the Zener regulator.
Lab Report
1. Hereafter, in view of the hardships you may be facing due to the online mode, we want you to submit
only a short Lab report, say a maximum of 3 or 4 pages.
2. For Experiment 2, please limit your Lab report to just 3 pages – one page for the Unregulated Supply
with Capacitive Filter, one page for the DC Power Supply with Zener Diode Regulator, and the last
page for the DC Power Supply with a BJT Series Regulator.
3. In each page, please include one of your NGSPICE programs, and one or two plots or the printed
values, as the case may be. No analysis required. Please also add one line of what you learned.
4. The purpose of asking you to make shorter Lab reports is to make sure that you save some time.
However, we assume that you have done all that was asked in the Lab handout (analysis and
simulations). These and related topics may be asked in the Quizzes, as well as in the Midsem and
Endsem examinations.
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